1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
Y
B
Z
A
GND2
DW PACKAGE
GND2
NC
R
RE
D
D1
DE
VCC1
GND1
D2
VCC2
DE 7
D8
R5
6
RE
Y
Z
B
A
14
11
12
13
NGALVANIC ISOLATIO
D1
2OSC
1
D2
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
Isolated 5V RS-485 Transceiver With Integrated Transformer Driver
Check for Samples: ISO3086T
1FEATURES
•3000 VRMS / 4242 VPK Isolation
•Bus-Pin ESD Protection
–11 kV HBM Between Bus-Pins and GND2
–6 kV HBM Between Bus-Pins and GND1
•1/8 Unit Load –Up to 256 Nodes on a Bus
•Designed for RS-485 and RS-422 Applications
•Signaling Rates up to 20 Mbps
•Thermal Shutdown Protection
•Typical Efficiency >60% (ILOAD = 100 mA) - see FUNCTION DIAGRAM
SLUU469
•Low Bus Capacitance 7 pF (Typ)
•50 kV/µs Typical Transient Immunity
•UL 1577, IEC 60747-5-2 (VDE 0884, Rev. 2)
Approvals Pending
•Fail-safe Receiver for Bus Open, Short, Idle
•Logic Inputs are 5-V Tolerant
APPLICATIONS
•Isolated RS-485/RS-422 Interfaces
•Factory Automation
•Motor/Motion Control
•HVAC and Building Automation Networks
•Networked Security Stations
DESCRIPTION
The ISO3086T is an isolated differential line transceiver with integrated oscillator outputs that provide the primary
voltage for an isolation transformer. The device is a full-duplex differential line transceiver for RS-485 and
RS-422 applications that can easily be configured for half-duplex operation by connecting pin 11 to pin 14, and
pin 12 to pin 13.
These devices are ideal for long transmission lines since the ground loop is broken to allow for a much larger
common-mode voltage range. The symmetrical isolation barrier of the device is tested to provide 3000 VRMS or
4242 VPK of isolation for 1 minute per VDE between the bus-line transceiver and the logic-level interface.
Any cabled I/O can be subjected to electrical noise transients from various sources. These noise transients can
cause damage to the transceiver and/or near-by sensitive circuitry if they are of sufficient magnitude and
duration. These isolated devices can significantly increase protection and reduce the risk of damage to
expensive control circuits.
The ISO3086T is specified for use from –40°C to 85°C.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright ©2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
C2
1
2
3
4
5
6
7
8
D1
D2
VCC1
GND1
R
RE
DE
D
VCC2
A
B
GND2
Z
Y
C3
16
14
13
12
11
15
9, 10
OUT
NC
C6
IN
EN
GND
5
1
LDO
1
3
2
C5C4
D1
D2
8
7
6
5
4
3
2
1
C1
X-FMR
ISO3086T
Isolated Supply to
other Components
RS-485 Bus
Interface
Control
Circuitry
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Figure 1. Typical Application Circuit (For Details See SLUU469)
PIN DESCRIPTIONS
NAME PIN No. FUNCTION
D1 1 Transformer Driver Terminal 1, Open Drain Output
D2 2 Transformer Driver Terminal 2, Open Drain Output
GND1 3 Logic-side Ground
VCC1 4 Logic-side Power Supply
R 5 Receiver Output
RE 6 Receiver Enable Input. This pin has complementary logic.
DE 7 Driver Enable Input
D 8 Driver Input
GND2 9, 15 Bus-side Ground. Both pins are internally connected.
NC 10 No Connect. This pin is not connected to any internal circuitry.
Y 11 Non-inverting Driver Output
Z 12 Inverting Driver Output
B 13 Inverting Receiver Input
A 14 Non-inverting Receiver Input
VCC2 16 Bus-side Power Supply
2Copyright ©2011, Texas Instruments Incorporated
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
ABSOLUTE MAXIMUM RATINGS(1)
VALUE UNIT
VCC1, VCC2 Input supply voltage(2) –0.3 to 6 V
VA,VB,VY,VZVoltage at any bus I/O terminal (A, B, Y, Z) –9 to 14 V
VD1,VD2 Voltage at D1, D2 14 V
V(TRANS) Voltage input, transient pulse through 100Ω, see Figure 12 (A, B,Y, Z) –50 to +50 V
VIVoltage input at D, DE or RE terminal –0.5 to 7 V
IOReceiver output current ±10 mA
ID1, ID2 Transformer Driver Output Current 450 mA
Bus pins and ±6 kV
GND1
JEDEC Standard 22, Test Method
Human Body Model Bus pins and ±11 kV
A114-C.01 GND2
Electrostatic
ESD discharge All pins ±4 kV
Charged Device Model JEDEC Standard 22, Test Method ±1.5 kV
C101 All pins
Machine Model ANSI/ESDS5.2-1996 ±200 V
TJMaximum junction temperature 170 °C
TSTG Storage temperature –65 to 150 °C
(1) Stresses beyond those listed under "Absolute Maximum Ratings"may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions"is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values except differential I/O bus voltages are with respect to network ground terminal and are peak voltage values.
RECOMMENDED OPERATING CONDITIONS MIN TYP MAX UNIT
3.3 V Operation 3 3.3 3.6
VCC1 Logic-side supply voltage V
5 V Operation 4.5 5 5.5
VCC2 Bus-side supply voltage 4.5 5 5.5 V
VIor VIC Voltage at any bus terminal (separately or common-mode) –7 12 V
RE 2 VCC1
VIH High-level input voltage V
D, DE 0.7 VCC1
RE 0 0.8
VIL Low-level input voltage V
D, DE 0.3 VCC1
A with respect to B –12 12
VID Differential input voltage V
Dynamic See Figure 15
RLDifferential load resistance 54 60 Ω
Driver –60 60
IOOutput Current mA
Receiver –8 8
TAAmbient temperature –40 85 °C
TJOperating junction temperature –40 150 °C
1 / tUI Signaling Rate 20 Mbps
Copyright ©2011, Texas Instruments Incorporated 3
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
SUPPLY CURRENT and COMMON-MODE TRANSIENT IMMUNITY
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCC1 = 3.3 V ±10% 5 8 mA
Logic-side quiescent DE and RE = 0V or VCC1 (Driver and Receiver
ICC1(1) supply current Enabled or Disabled), D = 0 V or VCC1, No load VCC1 = 5 V ±10% 7 12
RE = 0 V or VCC1, DE = 0 V (driver disabled), No load 10 15 mA
Bus-side quiescent
ICC2(1) supply current RE = 0 V or VCC1, DE = VCC1 (driver enabled), D = 0 V or VCC1, No Load 10 15
Common-mode
CMTI See Figure 13, VI= VCC1 or 0 V 25 50 kV/µs
transient immunity
(1) ICC1 and ICC2 are measured when device is connected to external power supplies, VCC1 and VCC2. In this case, D1 and D2 are open and
disconnected from external transformer.
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IO= 0 mA, no load 3 4.3 VCC2
RL= 54 Ω(RS-485), See Figure 2 1.5 2.3
|VOD| Differential output voltage magnitude V
RL= 100 Ω(RS-422), See Figure 2 2 2.3
Vtest from –7 V to +12 V, SeeFigure 3 1.5
Change in magnitude of the differential
Δ|VOD| See Figure 2 and Figure 3 –0.2 0 0.2 V
output voltage
VOC(SS) Steady-state common-mode output voltage 1 2.6 3 V
Figure 4
Change in steady-state common-mode
ΔVOC(SS) –0.1 0.1 V
output voltage
VOC(pp) Peak-to-peak common-mode output voltage See Figure 4 0.5 V
IIInput current D, DE, VIat 0 V or VCC1 –10 10 µA
VYor VZ= 12V, 1
VCC2 = 0 V or 5 V, DE = 0 V
High-impedance state output current, Y or Z Other bus pin
IOZ µA
pin at 0 V
VYor VZ=–7 V, –1
VCC2 = 0 V or 5 V, DE = 0 V Other bus pin
IOS(1) Short-circuit output current –7 V ≤VYor VZ≤12 V –250 250 mA
at 0 V
(1) This device has thermal shutdown and output current limiting features to protect in short-circuit fault condition.
DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay 25 45
PWD(1) Pulse width distortion (|tPHL –tPLH|) See Figure 5 1 7.5 ns
tr, tfDifferential output signal rise time and fall time 7 15
tPZH, Propagation delay, high-impedance-to-high-level output, See Figure 6 25 55 ns
tPHZ Propagation delay, high-level-to-high-impedance output DE at 0 V
tPLZ, Propagation delay, low-level to high-impedance output, See Figure 7,25 55 ns
tPZL Propagation delay, high-impedance to low-level output DE at 0 V
(1) Also known as pulse skew
4Copyright ©2011, Texas Instruments Incorporated
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIT(+) Positive-going input threshold voltage IO= -8 mA –85 –10 mV
VIT(–)Negative-going input threshold voltage IO= 8 mA –200 –115 mV
Vhys Hysteresis voltage (VIT+ –VIT–) 30 mV
VCC1 = 3.3 V VCC1–0.4 3.1
VID = 200 mV, IO=–8 mA,
VOH High-level output voltage V
See Figure 8 VCC1 = 5 V 4 4.8
VCC1 = 3.3 V 0.15 0.4
VID = 200 mV, IO= 8 mA,
VOL Low-level output voltage V
See Figure 8 VCC1 = 5 V 0.15 0.4
IO(Z) High-impedance state output current VO= 0 or VCC1, RE = VCC1 –1 1 µA
VAor VB= 12 V 40 100
VAor VB= 12 V, VCC2 = 0 60 130
Other input
IA, IBBus input current µA
at 0 V
VAor VB=–7 V –100 –40
VAor VB=–7 V, VCC2 = 0 –100 –30
IIH High-level input current, RE VIH = 2. V –10 10 µA
IIL Low-level input current, RE VIL = 0.8 V –10 10
RID Differential input resistance A, B 96 kΩ
CID Differential input capacitance VI= 0.4 sin (4E6πt) + 0.5 V 7 pF
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH, tPHL Propagation delay 103 125
tsk(p) Pulse skew (|tPHL –tPLH|) See Figure 9 3 15 ns
tr, trOutput signal rise and fall time 1
tPHZ, Propagation delay, high-level to high-impedance output See Figure 10, DE at 0 V 11 22
tPZH Propagation delay, high-impedance to high-level output ns
tPLZ, Propagation delay, low-level to high-impedance output See Figure 11, DE at 0 V 11 22
tPZL Propagation delay, high-impedance to low-level output
TRANSFORMER DRIVER CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VCC1 = 5V ±10%, D1 and D2 connected to 350 450 610
transformer
fOSC Oscillator frequency kHz
VCC1 = 3.3V ±10%, D1 and D2 connected to 300 400 550
transformer
RON Switch on resistance D1 and D2 connected to 50Ωpull-up resistors 1 2.5 Ω
VCC1 = 5V ±10%, see Figure 14,(1) 80
tr_D D1, D2 output rise time ns
VCC1 = 3.3V ±10%, see Figure 14,(1) 70
VCC1 = 5V ±10%, see Figure 14,(1) 55
tf_D D1, D2 output fall time ns
VCC1 = 3.3V ±10%, see Figure 14,(1) 80
fSt Startup frequency VCC1 = 2.4 V, D1 and D2 connected to transformer 350 kHz
VCC1 = 5V ±10%, see Figure 14,(1) 38
tBBM Break before make time delay ns
VCC1 = 3.3V ±10%, see Figure 14,(1) 140
(1) D1 and D2 connected to 50Ωpull-up resistors
Copyright ©2011, Texas Instruments Incorporated 5
375
375
60
.+
-
D
DE
Y
Z
W
W
W
VCC2
0 or 3 V
GND2
VOD V =
-7 V to 12 V
TEST
0 or
II
VI
D
DE
Y
Z
VZVY
VOD
IY
IZ
GND2GND1
VCC1
VCC1
GND2GND1
RL
VOC
ZVZ
VY
Y
VOC(SS)
OC(p-p)
V
Generator: PRR= 100 kHz, 50 % duty
cycle, t r< 6ns , t f<6 ns , ZO= 50W
Input
Input
II
VI
D
DE
Y
ZVOD
27
±1%
W
VCC1
GND1 GND2
GND2
GND1
IY
IZ
VZVYVOC
27
±1%
W
RL=54 L= 50pF
50
D
Y
Z
DE
VI
Input
Generator
±20%
±1%
W
W
Generator: PRR = 100 kHz, 50 % duty cycle,
tr< 6ns , t f<6 ns, ZO= 50W
includes fixture and
instrumentation capacitance
C
L
C
VCC1
GND1
VOD 50%
3 V
tf
tr
tpLH
10%
90%
VI
90%
10%
50%
50 %50 %
VOD
VOD(H)
VOD(L)
tpHL
CL= 50 pF
Input
Generator 50
S 1
RL= 110
CL includes fixture and
instrumentation
capacitance
D
Y
Z
DE
±20 %
VO
VI
1 %
±
W
W
GND1 GND2
50% 50%
3 V
VOH
0 V
tpZH
50%
90%
0 V
VO
VI
»
Generator: PRR = 50 kHz, 50% duty
cycle, t <6ns, t <6ns, Z = 50
r f O W
tpHZ
D S1
3 V Y
0 V Z
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION
Figure 2. Driver VOD Test and Current Definitions Figure 3. Driver VOD With Common-Mode Loading
Test Circuit
Figure 4. Test Circuit and Waveform Definitions For The Driver Common-Mode Output Voltage
Figure 5. Driver Switching Test Circuit and Voltage Waveforms
Figure 6. Driver High-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
6Copyright ©2011, Texas Instruments Incorporated
VID
IO
A
B
R
IB
IA
V
IC
V
A
VB
VB
VA+
2
VO
Input
Generator
1.5 V
CL includesfixtureand
instrumentationcapacitance
A
B
R
±20 %
VO
VI
RE
50 W
CL= 15 pF
Generator: PRR = 100 kHz , 50 % duty cycle,
r< 6ns , t f< 6ns , ZO= 50 W
t
50 % 50 %
3 V
VOH
VOL
tf
tr
tpLH
10 %
90 %
50 % 50 %
0 V
VO
VI
tpHL
VCC
Input
Generator 50
R
A
B
CL includesfixture
andinstrumentation
capacitance
RE
VI
VO
W
CL= 15 pF ±20 %
S1
W
1 k ±1 %
1.5 V
0 V
Generator: PRR =100 kHz , 50 % duty cycle ,
r
<6ns , t f<6ns , ZO= 50 W
t
50%
V
OH
tpZH
50%
3 V
0 V
90%
VI
V
O
0 V
50%
»
tpHZ
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 7. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveform
Figure 8. Receiver Voltage and Current Definitions
Figure 9. Receiver Switching Test Circuit and Waveforms
Figure 10. Receiver Enable Test Circuit and Waveforms, Data Output High
Copyright ©2011, Texas Instruments Incorporated 7
VCC
Input
Generator 50
R
A
B
CL includesfixture
andinstrumentation
capacitance
RE
VI
VO
W
CL= 15 pF ±20 %
S1
W
1 k ±1 %
0 V
1.5 V
Generator : PRR =100 kHz , 50% duty cycle ,
r<6ns ,t f<6ns, ZO= 50 W
t
50%
3 V
0 V
VI
VCC
VOL
tpZL
VO
50%
50%
10%
tpLZ
B
A
R
100 W
±1%
+
–
Pulse Generator
15 ms duration
1% Duty Cycle
t , t 100 ns
r f £
Z
Y
D
100 W
±1%
+
–
DE
0 V or 3 V
0 V or 3 V
RE
VOL
VOH or
D
R
DE
VCC1
1 kW
RE
54 W
VCC2
GND1
VTEST
GND2
CL= 15 pF
( includesprobeand
jigcapacitance)
C = 0.1 F 1%
m±
A
B
GND 1
C = 0.1 F
m
±1%
S 1
2.0 V
0.8 V
VOL
VOH or
1.5 Vor 0 V
0 Vor 1.5 V
Z
Y
54 W
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 11. Receiver Enable Test Circuit and Waveforms, Data Output Low
Figure 12. Transient Over-Voltage Test Circuit
Figure 13. Common-Mode Transient Immunity Test Circuit
8Copyright ©2011, Texas Instruments Incorporated
D1
D2
tBBM
90%
10%
10%
90%
tr_D tf_D
tf_D tr_D
tBBM
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 14. Transition Times and Break-Before-Make Time Delay for D1, D2 Outputs
Copyright ©2011, Texas Instruments Incorporated 9
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0 2 4 6 8 10 12 14 16 18 20
Signaling Rate - Mbps
V - Differential Input Voltage - pk
ID
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
DEVICE INFORMATION
Figure 15. ISO3086T Recommended Minimum Differential Input Voltage vs Signaling Rate
Table 1. Driver Function Table(1)
INPUT ENABLE OUTPUTS
(D) (DE) Y Z
H H H L
L H L H
X L hi-Z hi-Z
X OPEN hi-Z hi-Z
OPEN H H L
(1) H = High Level, L= Low Level, X = Don’t Care, hi-Z = High Impedance (off)
Table 2. Receiver Function Table(1)
DIFFERENTIAL INPUT ENABLE OUTPUT
VID = (VA–VB) (RE) (R)
–0.01 V ≤VID L H
–0.2 V <VID –0.01 V L ?
VID ≤ –0.2 V L L
X H hi-Z
X OPEN hi-Z
Open circuit L H
Short Circuit L H
Idle (terminated) bus L H
(1) H = High Level, L= Low Level, X = Don't Care, hi-Z = High Impedance (Off), ? = Indeterminate
10 Copyright ©2011, Texas Instruments Incorporated
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
IEC INSULATION AND SAFETY RELATED SPECIFICATIONS FOR 16-DW PACKAGE
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
L(I01) Minimum air gap (Clearance(1)) Shortest terminal to terminal distance through air 8.3 mm
L(I02) Minimum external tracking (Creepage(1)) Shortest terminal to terminal distance across the 8.1 mm
package surface
CTI Tracking resistance(Comparative Tracking DIN IEC 60112 / VDE 0303 Part 1 400 V
Index)
Minimum Internal Gap (Internal Clearance) Distance through the insulation 0.008 mm
RIO Isolation resistance Input to output, VIO = 500 V, all pins on each >1012 Ω
side of the barrier tied together creating a
two-terminal device
CIO Barrier capacitance Input to output VI= VCC/2 + 0.4 sin (2πft), f = 1 MHz, VCC = 5 V 2 pF
CIInput capacitance to ground VIO = 0.4 sin (2πft), f = 1 MHz 2 pF
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care
should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on
the printed circuit board do not reduce this distance.
Creepage and clearance on a printed circuit board become equal according to the measurement techniques
shown in the Isolation Glossary. Techniques such as inserting grooves and/or ribs on a printed circuit board are
used to help increase these specifications.
IEC 60664-1 RATINGS TABLE
PARAMETER TEST CONDITIONS SPECIFICATION
Basic isolation group Material group II
Rated mains voltage ≤150 VRMS I-IV
Installation classification Rated mains voltage ≤300 VRMS I-III
Rated mains voltage ≤400 VRMS I-II
IEC 60747-5-2 INSULATION CHARACTERISTICS(1)
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS SPECIFICATION UNIT
VIORM Maximum working insulation voltage 566 VPK
VPR Input to output test voltage Method b1, VPR = VIORM ×1.875, 1062 VPK
100% Production test with t = 1 s,
Partial discharge <5 pC
Method a, After environmental tests subgroup 1, 906
VPR = VIORM ×1.6, t = 10 s,
Partial discharge <5pC
After Input/Output Safety Test Subgroup 2/3, 680
VPR = VIORM x 1.2, t = 10 s,
Partial discharge <5 pC
VIOTM Maximum transient overvoltage t = 60 s 4242 VPK
VIOSM Maximum surge voltage Tested per IEC 60065 (Qualification Test) 4242 VPK
RSInsulation resistance VIO = 500 V at TS>109Ω
Pollution degree 2
(1) Climatic Classification 40/125/21
Copyright ©2011, Texas Instruments Incorporated 11
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
REGULATORY INFORMATION
VDE UL
Certified according to DIN EN / IEC 60747-5-2 (VDE 0884 Part 2) Recognized under 1577 Component Recognition Program
Basic Insulation Single / Basic Isolation Voltage, 2500 VRMS(1)
Maximum Transient Overvoltage, 4242 VPK
Maximum Surge Voltage, 4242 VPK
Maximum Working Voltage, 566 VPK
File Number: 40016131 (Approval Pending) File Number: E181974 (Approval Pending)
(1) Production tested ≥3000 VRMS for 1 second in accordance with UL 1577.
IEC SAFETY LIMITING VALUES
Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry.
A failure of the IO can allow low resistance to ground or the supply. Without current limiting, sufficient power is
dissipated to overheat the die; and, damage the isolation barrier—potentially leading to secondary system
failures.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ISSafety input, output, or supply current θJA = 80.5°C/W, VI= 5.5 V, TJ= 170°C, TA= 25°C 327 mA
DW-16
TSMaximum case temperature 150 °C
The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum
ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the
application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the
Thermal Characteristics table is that of a device installed on a High-K Test Board for Leaded Surface Mount
Packages. The power is the recommended maximum input voltage times the current. The junction temperature is
then the ambient temperature plus the power times the junction-to-air thermal resistance.
THERMAL INFORMATION ISO3086T
THERMAL METRIC(1) DW UNITS
16 PINS
θJA Junction-to-ambient thermal resistance 80.5
θJC(TOP) Junction-to-case(top) thermal resistance 43.8
θJB Junction-to-board thermal resistance 49.7 °C/W
ψJT Junction-to-top characterization parameter 13.8
ψJB Junction-to-board characterization parameter 41.4
θJC(BOTTOM) Junction-to-case(bottom) thermal resistance n/a
PD(2) VCC1 = VCC2 = 5.5V, TJ= 150°C, RL= 54Ω, CL= 50pF (Driver), CL= 15pF 490 mW
(Receiver), Input a 10 MHz 50% duty cycle square wave to Driver and Receiver
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) PD= Maximum device power dissipation
12 Copyright ©2011, Texas Instruments Incorporated
0
50
100
150
200
250
300
350
0 50 100 150 200
T - Case Temperature - °C
C
V = V = 5.5 V
CC1 CC2
Safety Limiting Current - mA
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
Figure 16. DW-16 θJC Thermal Derating Curve per IEC 60747-5-2
Copyright ©2011, Texas Instruments Incorporated 13
16V
Input
B Input
16V
VCC 2
36 kW
36 kW
180 k
16V
Input
A Input
36 k
16V
W
W
36 kW
VCC 2
180 kW
16V
Output
Y and Z Outputs
16V
VCC 2
4
6 .5
W
W
VCC 1
R Output
output
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
EQUIVALENT CIRCUIT SCHEMATICS
14 Copyright ©2011, Texas Instruments Incorporated
W
VCC 1
1 M
VCC 1
VCC 1
500 W
W1 M
VCC 1
500 W
DE Input
VCC 1
inputinput
D, InputRE
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
Copyright ©2011, Texas Instruments Incorporated 15
0 5 10 15 20
Signaling Rate - Mbps
0
5
10
15
20
25
I - Supply Current - mA
CC
I @ 5 V
CC2
I @ 5 V
CC1
I @ 3.3 V
CC1
No Load
TA = 25°C,
PRBS Data 2 - 1
16
0 5 10 15 20
Signaling Rate - Mbps
I @ 3.3 V
CC1
I @ 5 V
CC1
I @ 5 V
CC2
Driver: R = 54 , C = 50 pF,
Receiver: C = 15 pF,
TA = 25°C,
PRBS Data 2 - 1
L L
L
W
16
0
10
20
30
40
50
60
I - Supply Current - mA
CC
20
22
24
26
28
30
32
34
Driver Propagation Delay - ns
-40 -15 10 35 60 85
T - Free-Air Temperature - °C
A
tPHL
tPLH
V = 3.3 V,
V = 5 V,
R = 54 ,
C = 50 pF
CC1
CC2
L
L
W
-40 -15 10 35 60 85
T - Free-Air Temperature - °C
A
20
22
24
26
28
30
Driver Propagation Delay - ns
tPLH
tPHL
V = V = 5 V,
R = 54 ,
C = 50 pF
CC1 CC2
L
L
W
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
TYPICAL CHARACTERISTICS
SUPPLY CURRENT SUPPLY CURRENT
vs vs
SIGNALING RATE (NO LOAD) SIGNALING RATE (WITH LOAD)
Figure 17. Figure 18.
DRIVER PROPAGATION DELAY DRIVER PROPAGATION DELAY
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 19. Figure 20.
16 Copyright ©2011, Texas Instruments Incorporated
97
98
99
100
101
102
103
104
105
-40 -15 10 35 60 85
T - Free-Air Temperature - °C
A
tPHL
tPLH
V = V = 5 V,
C = 15 pF
CC1 CC2
L
Reveiver Propagation Delay - ns
100
102
104
106
108
110
-40 -15 10 35 60 85
T - Free-Air Temperature - °C
A
Reveiver Propagation Delay - ns
tPHL
tPLH
V = 3.3 V,
V = 5 V,
C = 15 pF
CC1
CC2
L
5
5.5
6
6.5
7
7.5
8
8.5
9
9.5
10
Driver Rise, Fall Time - ns
-40 -15 10 35 60 85
T - Free-Air Temperature - °C
A
tf
tr
V = 3.3 V,
V = 5 V,
R = 54 ,
C = 50 pF
CC1
CC2
L
L
W
-40 -15 10 35 60 85
T - Free-Air Temperature - °C
A
V = V = 5 V,
R = 54 ,
C = 50 pF
CC1 CC2
L
L
W
5
5.5
6
6.5
7
7.5
8
8.5
9
9.5
10
Driver Rise, Fall Time - ns
tr
tf
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
TYPICAL CHARACTERISTICS (continued)
RECEIVER PROPAGATION DELAY RECEIVER PROPAGATION
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 21. Figure 22.
DRIVER RISE, FALL TIME DRIVER RISE, FALL TIME
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 23. Figure 24.
Copyright ©2011, Texas Instruments Incorporated 17
600
700
800
900
1000
1100
1200
-40 -15 10 35 60 85
T - Free-Air Temperature - °C
A
Receiver Rise, Fall Time - ps
V = 3.3 V,
V = 5 V,
C = 15 pF
CC1
CC2
L
tf
tr
-40 -15 10 35 60 85
T - Free-Air Temperature - °C
A
tf
tr
V = V = 5 V,
C = 15 pF
CC1 CC2
L
400
500
600
700
800
900
1000
1100
1200
1300
1400
Receiver Rise, Fall Time - ps
0 1 2 3 4 5
V - Output Voltage - V
O
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
I - Output Current - mA
O
T = 25°C,
V = 5 V
A
CC1
0 10 20 30 40 50 60 70
I - Load Current - mA
L
V = 5 V
CC2
V = 5.5 V
CC2
V = 4.5 V
CC2
T = 25°C
A
0
0.5
1
1.5
2
2.5
3
3.5
V - Differential Output Voltage - V
OD
100 W
50 W
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
RECEIVER RISE, FALL TIME RECEIVER RISE, FALL TIME
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 25. Figure 26.
DRIVER DIFFERENTIAL OUTPUT VOLTAGE RECEIVER HIGH-LEVEL OUTPUT CURRENT
vs vs
LOAD CURRENT HIGH-LEVEL OUTPUT VOLTAGE
Figure 27. Figure 28.
18 Copyright ©2011, Texas Instruments Incorporated
0
10
20
30
40
50
60
70
80
90
0 1 2 3 4 5
V - Output Voltage - V
O
I - Output Current - mA
O
T = 25°C,
V = 5 V
A
CC1
-60
-40
-20
0
20
40
60
-7 -4 -1 2 5 8 11
V - Bus Input Voltage - V
I
I - Bus Input Current - A
Im
T = 25°C,
V = 5 V
A
CC2
1.98
2
2.02
2.04
2.06
2.08
2.1
-40 -15 10 35 60 85
T - Free-Air Temperature - °C
A
V - Differential Output Voltage - V
OD
V = 5 V,
R = 54
CC2
LW
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
TYPICAL CHARACTERISTICS (continued)
RECEIVER LOW-LEVEL OUTPUT CURRENT INPUT BIAS CURRENT
vs vs
LOW-LEVEL OUTPUT VOLTAGE BUS INPUT VOLTAGE
Figure 29. Figure 30.
DIFFERENTIAL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
Figure 31.
Copyright ©2011, Texas Instruments Incorporated 19
ISO
GND2 N
ISO IN
Z
v = v
Z + Z
´
9
GN D2 ISO
9 4
N ISO IN
v R 10
= =
v R + R 10 + 6 10
1
16
GND2 ISO
ISO
N
ISO IN IN
1
v C 1 1
= = = = 0.94
1 1 C
v+ 1 +
1 +
C C C
VN
RIN
CIN
RISO
CISO
SystemGround(GND1)
BusReturn (GND2)
16 V
A, B, Y, orZ
ISO3086T
SLLSE27C –JANUARY 2011–REVISED JULY 2011
www.ti.com
APPLICATION INFORMATION
REFERENCE DESIGN
ISO3086T Reference design (SLUU469) and miniature evaluation boards are available.
TRANSIENT VOLTAGES
Isolation of a circuit insulates it from other circuits and earth so that noise develops across the insulation rather
than circuit components. The most common noise threat to data-line circuits is voltage surges or electrical fast
transients that occur after installation and the transient ratings of the ISO3086T are sufficient for all but the most
severe installations. However, some equipment manufacturers use their ESD generators to test transient
susceptibility of their equipment and can easily exceed insulation ratings. ESD generators simulate static
discharges that may occur during device or equipment handling with low-energy but very high voltage transients.
Figure 32 models the ISO3086T bus IO connected to a noise generator. CIN and RIN is the device and any other
stray or added capacitance or resistance across the A or B pin to GND2, CISO and RISO is the capacitance and
resistance between GND1 and GND2 of the ISO308x plus those of any other insulation (transformer, etc.), and
we assume stray inductance negligible. From this model, the voltage at the isolated bus return is
and will always be less than 16 V from VN. If the ISO3086 are tested as a stand-alone
device, RIN=6×104Ω, CIN= 16 ×10-12 F, RISO= 109Ωand CISO= 10-12 F.
spacer for space between the paragraphs
Note from Figure 32 that the resistor ratio determines spacer
the voltage ratio at low frequency and it is the inverse
capacitance ratio at high frequency. In the spacer
stand-alone case and for low frequency,
or essentially all of noise appears across the barrier.
At very high frequency,
and 94% of VNappears across the barrier. As long as
RISO is greater than RIN and CISO is less than CIN,
most of transient noise appears across the isolation
barrier, as it should.
We recommend the reader not test equipment
transient susceptibility with ESD generators or
consider product claims of ESD ratings above the Figure 32. Noise Model
barrier transient ratings of an isolated interface. ESD
is best managed through recessing or covering
connector pins in a conductive connector shell and
installer training.
20 Copyright ©2011, Texas Instruments Incorporated
ISO3086T
www.ti.com
SLLSE27C –JANUARY 2011–REVISED JULY 2011
REVISION HISTORY
Changes from Original (January 2011) to Revision A Page
•Changed the data sheet From: Preview To: Production ....................................................................................................... 1
•Changed the Features and Description ................................................................................................................................ 1
•Added Figure 1 Typical Application Circuit ........................................................................................................................... 2
Changes from Revision A (March 2011) to Revision B Page
•Deleted the MIN and MAX values from rows, tr_d, tf_D, and tBBM of the TRANSFORMER DRIVER
CHARACTERISTICS table ................................................................................................................................................... 5
Changes from Revision B (July 2011) to Revision C Page
•Added Note 1 to the TRANSFORMER DRIVER CHARACTERISTICS table ...................................................................... 5
•Changed the TRANSFORMER DRIVER CHARACTERISTICS table - fSt Test Conditions From: .VCC1 = 9V To: VCC1
= 2.4 and Changed the TYP value From: 230 To: 350 kHz ................................................................................................. 5
Copyright ©2011, Texas Instruments Incorporated 21
PACKAGE OPTION ADDENDUM
www.ti.com 31-May-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
ISO3086TDW ACTIVE SOIC DW 16 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
ISO3086TDWR ACTIVE SOIC DW 16 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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