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Silicon Power Transistor
TO-220
Pin 1. Base
2. Collector
3. Emitter
4. Collector (Case)
Plastic medium-power Silicon Transistors designed for general purpose amplifier and low speed switching applications
Dimensions Millimetres
Minimum Maximum
A 14.68 15.31
B 9.78 10.42
C 5.01 6.52
D 13.06 14.62
E 3.57 4.07
F 2.42 3.66
G 1.12 1.36
H 0.72 0.96
I 4.22 4.96
J 1.14 1.38
K 2.2 2.97
L 0.33 0.55
M 2.48 2.98
O 3.7 3.9
Maximum Ratings
Characteristics Symbol TIP117 Unit
Collector-Emitter Voltage VCEO 100 V
Collector-Emitter Voltage VCBO 100 V
Emitter-Base Voltage VEBO 5 V
Collector Current - Continuous
Peak
IC
ICM
2
4A
Base Current IB50 mA
Total Power Dissipation at Tc= 25°C
Derate above 25°C PD50
0.4
W
W/°C
Operating and Storage Junction Temperature Range TJ, TSTG -65 to +150 °C
Features:
•Collector-Emitter Sustaining Voltage -
VCE(SUS) = 100 V (Minimum) TIP117
•Collector-Emitter Saturation Voltage
VCE(Sat) = 2.5 V (Maximum) at IC = 2 A
•Monolithic Construction with Built-in Base-Emitter Shunt Resistor
Silicon Power Transistor
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Characteristics Symbol Maximum Unit
Thermal Resistance Junction to Case Rθjc 2.5 °C/W
Maximum Ratings
Electrical Characteristics (Tc = 25°C Unless Otherwise Noted)
Figure 1 Power Derating
PD, Power Dissipation (Watts)
TC, Temperature (°C)
Characteristics Symbol Minimum Maximum Unit
OFF Characteristics
Collector-Emitter Sustaining Voltage (1) VCEO(SUS) 100 V
Collector Cutoff Current
(VCE = 50 V, IB= 0) ICEO 2 mA
Collector Cutoff Current
(VEB = 5 V, IC= 0) IEBO 2 mA
Dynamic Characteristics
Small-Signal Current Gain
(Ic= 0.75 A, VCE = 10 V, f = 1 MHz) hfe 25
Output Capacitance Cob 150 PF
ON Characteristics (1)
DC Current Gain
(IC= 1 A, VCE = 4 V)
(IC= 2 A, VCE = 4 V)
hFE 1,000
500
Collector-Emitter Saturation Voltage
(IC= 2 A, IB= 8 mA) VCE(Sat) 2.5 V
Base-Emitter On Voltage
(IC= 2 A, VCE = 4 mA) VBE(ON) 2.8 V
(1) Pulse Test : Pulse Width = 300 us, Duty Cycle ≤ 2%
Silicon Power Transistor
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Internal Schematic Diagram
Fig-1 Switching Time
Fig-2 Capacitances
IC, Collector Current (A)
VR, Reverse Voltage (Volts)
t, Time (us)
Capacitances (pF)
PNP
Silicon Power Transistor
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Fig-3 Active Region Safe Operating Area
IC, Collector Current (A)
VCE, Collector Emitter Voltage (Volts)
There are two limitation on the power handling ability of a transistor : average junction temperature and second breakdown safe
operating area curves indicate Ic~ VCE limits of the transistor that must be observed for reliable operation i.e., the transistor must
not be subjected to greater dissipation than curves indicate.
The data of Fig-3 is base on TJ(PK)=150°C; TC is variable depending on power level, second breakdown pulse limits are valid for
duty cycles to 10% provided TJ(PK)≤150°C, at high case temperatures, thermal limitation will reduce the power that can be handled
to values less than the limitations imposed by second breakdown.
Part Number Table
Description Part Number
Silicon Power Transistor TIP117
Important Notice : This data sheet and its contents (the "Information") belong to the members of the Premier Farnell group of companies (the "Group") or are licensed to it. No licence is granted for the use of
it other than for information purposes in connection with the products to which it relates. No licence of any intellectual property rights is granted. The Information is subject to change without notice and replaces
all data sheets previously supplied. The Information supplied is believed to be accurate but the Group assumes no responsibility for its accuracy or completeness, any error in or omission from it or for any use
made of it. Users of this data sheet should check for themselves the Information and the suitability of the products for their purpose and not make any assumptions based on information included or omitted.
Liability for loss or damage resulting from any reliance on the Information or use of it (including liability resulting from negligence or where the Group was aware of the possibility of such loss or damage arising)
is excluded. This will not operate to limit or restrict the Group's liability for death or personal injury resulting from its negligence. Multicomp is the registered trademark of the Group. © Premier Farnell plc 2012.
