LTC7000/LTC7000-1
1
Rev. E
For more information www.analog.comDocument Feedback
V
IN
= 135V
20ns/DIV
V
INP
2V/DIV
V
LOAD
50V/DIV
TYPICAL APPLICATION
FEATURES DESCRIPTION
Fast 150V Protected
High Side NMOS Static Switch Driver
The LTC
®
7000/LTC7000-1 is a fast high side N-channel
MOSFET gate driver that operates from input voltages up
to 135V. It contains an internal charge pump that fully
enhances an external N-channel MOSFET switch, allowing
it to remain on indefinitely.
Its powerful driver can easily drive large gate capacitances
with very short transition times, making it well suited for
both high frequency switching applications or static switch
applications that require a fast turn-on and/or turn-off time.
When an internal comparator senses that the switch
current has exceeded a preset level, a fault flag is asserted
and the switch is turned off after a period of time set by
an external timing capacitor. After a cooldown period, the
LTC7000/LTC7000-1 automatically retries.
The LTC7000/LTC7000-1 is available in the thermally-
enhanced 16-lead MSOP packages.
LTC7000 LTC7000-1
Package 16-Lead MSOP
MSE16
16-Lead MSOP
MSE16(12)
High Voltage Pin Spacing 0.157mm 0.657mm
RUN/OVLO/ISET/IMON Pins Yes No
High Side Switch with 100% Duty Cycle and Overcurrent Protection Turn-On Transient Waveform
n Wide Operating VIN: 3.5V to 135V (150V Abs Max)
n 1Ω Pull-Down, 2.2Ω Pull-Up for Fast Turn-On and
Turn-Off Times with 35ns Propagation Delays
n Internal Charge Pump for 100% Duty Cycle
n Short-Circuit Protected
n Adjustable Current Trip Threshold (LTC7000)
n Current Monitor Output (LTC7000)
n Automatic Restart Timer
n Open-Drain Fault Flag
n Adjustable Turn-On Slew Rate
n Gate Driver Supply from 3.5V to 15V
n Adjustable VIN Undervoltage and Overvoltage
Lockouts (LTC7000)
n Adjustable Driver Supply VCC Undervoltage Lockout
n Low Shutdown Current: 1µA
n CMOS Compatible Input
n Thermally Enhanced, High Voltage Capable 16-Lead
MSOP Packages
n AEC-Q100 Qualified for Automotive Applications
APPLICATIONS
n Static Switch Driver
n Load and Supply Switch Driver
n Electronic Valve Driver
n High Frequency High Side Gate Driver
1µF
0.1µF
100k
1nF
0.007Ω
LOAD
3.5V TO 135V
3A CONTINUOUS MAX
V
IN
V
CC
FAULT
TIMER
INP
SNS
+
SNS–
BST
TGUP
TGDN
TS
LTC7000-1
V
CCUV
VIN
3.5V TO 135V
7000 TA01a
ON
OFF
GND
100Ω
All registered trademarks and trademarks are the property of their respective owners.
LTC7000/LTC7000-1
2
Rev. E
For more information www.analog.com
TABLE OF CONTENTS
Features ............................................................................................................................ 1
Applications ....................................................................................................................... 1
Typical Application ............................................................................................................... 1
Description......................................................................................................................... 1
Absolute Maximum Ratings ..................................................................................................... 3
Pin Configuration ................................................................................................................. 3
Order Information ................................................................................................................. 3
Electrical Characteristics ........................................................................................................ 5
Typical Performance Characteristics .......................................................................................... 7
Pin Functions ...................................................................................................................... 9
Block Diagram ....................................................................................................................10
Timing Diagram ..................................................................................................................11
Operation..........................................................................................................................11
Applications Information .......................................................................................................13
Package Description ............................................................................................................27
Revision History .................................................................................................................29
Typical Application ..............................................................................................................30
Related Parts .....................................................................................................................30
LTC7000/LTC7000-1
3
Rev. E
For more information www.analog.com
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Supply Voltages
VIN ....................................................... –0.3V to 150V
BST-TS ................................................... –0.3V to 15V
VCC......................................................... –0.3V to 15V
TS Voltage .................................................. –6V to 150V
BST, SNS+ and SNS– Voltages ................ –0.3V to 150V
SNS+ – SNS–
Continuous ......................................... –0.3V to +0.3V
<1ms ............................................ –100mA to +100mA
INP Voltage ................................................... –6V to 15V
Driver Outputs TGUP, TGDN ...............................(Note 7)
TIMER, FA U LT, Voltages ............................. –0.3V to 15V
(Note 1)
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC7000EMSE#PBF LTC7000EMSE#TRPBF 7000 16-Lead Plastic MSOP –40°C to 125°C
LTC7000IMSE#PBF LTC7000IMSE#TRPBF 7000 16-Lead Plastic MSOP –40°C to 125°C
LTC7000JMSE#PBF LTC7000JMSE#TRPBF 7000 16-Lead Plastic MSOP –40°C to 150°C
LTC7000HMSE#PBF LTC7000HMSE#TRPBF 7000 16-Lead Plastic MSOP –40°C to 150°C
LTC7000MPMSE#PBF LTC7000MPMSE#TRPBF 7000 16-Lead Plastic MSOP –55°C to 150°C
LTC7000EMSE-1#PBF LTC7000EMSE-1#TRPBF 70001 16-Lead Plastic MSOP –40°C to 125°C
LTC7000JMSE-1#PBF LTC7000JMSE-1#TRPBF 70001 16-Lead Plastic MSOP –40°C to 125°C
LTC7000HMSE-1#PBF LTC7000HMSE-1#TRPBF 70001 16-Lead Plastic MSOP –40°C to 150°C
LTC7000IMSE-1#PBF LTC7000IMSE-1#TRPBF 70001 16-Lead Plastic MSOP –40°C to 150°C
LTC7000MPMSE-1#PBF LTC7000MPMSE-1#TRPBF 70001 16-Lead Plastic MSOP –55°C to 150°C
LTC7000 LTC7000-1
1
2
3
4
5
6
7
8
RUN
VIN
VCC
VCCUV
FAULT
TIMER
INP
OVLO
17
GND
16
15
14
13
12
11
10
9
SNS+
SNS–
BST
TS
TGUP
TGDN
IMON
ISET
TOP VIEW
MSE PACKAGE
16-LEAD PLASTIC MSOP
(NOTE 6)
T
JMAX
= 150°C, θ
JA
= 45°C/W, θ
JC
= 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
1
3
5
6
7
8
16
14
12
11
10
9
TOP VIEW
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
T
JMAX
= 150°C, θ
JA
= 45°C/W, θ
JC
= 10°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
VIN
VCC
VCCUV
FAULT
TIMER
INP
SNS+
SNS–
BST
TS
TGUP
TGDN
17
GND
VCCUV Voltage ................................................ –0.3 to 6V
RUN Voltage (LTC7000) ........................... –0.3V to 150V
ISET, IMON, OVLO Voltages (LTC7000) .......... –0.3V to 6V
Operating Junction Temperature Range (Notes 2, 3, 4)
LTC7000E, LTC7000E-1, LTC7000I,
LTC7000I-1 ........................................ –40°C to 125°C
LTC7000J, LTC7000J-1 ..................... –40°C to 150°C
LTC7000H, LTC7000H-1 .................... –40°C to 150°C
LTC7000MP, LTC7000MP-1 ............... –55°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP Package ................................................. 300°C
LTC7000/LTC7000-1
4
Rev. E
For more information www.analog.com
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
AUTOMOTIVE PRODUCTS**
LTC7000EMSE#WPBF LTC7000EMSE#WTRPBF 7000 16-Lead Plastic MSOP −40°C to 125°C
LTC7000IMSE#WPBF LTC7000IMSE#WTRPBF 7000 16-Lead Plastic MSOP −40°C to 125°C
LTC7000JMSE#WPBF LTC7000JMSE#WTRPBF 7000 16-Lead Plastic MSOP −40°C to 150°C
LTC7000HMSE#WPBF LTC7000HMSE#WTRPBF 7000 16-Lead Plastic MSOP −40°C to 150°C
LTC7000EMSE-1#WPBF LTC7000EMSE-1#WTRPBF 70001 16-Lead Plastic MSOP −40°C to 125°C
LTC7000IMSE-1#WPBF LTC7000IMSE-1#WTRPBF 70001 16-Lead Plastic MSOP −40°C to 125°C
LTC7000JMSE-1#WPBF LTC7000JMSE-1#WTRPBF 70001 16-Lead Plastic MSOP −40°C to 150°C
LTC7000HMSE-1#WPBF LTC7000HMSE-1#WTRPBF 70001 16-Lead Plastic MSOP −40°C to 150°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
thesemodels.
LTC7000/LTC7000-1
5
Rev. E
For more information www.analog.com
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Supplies
VIN Input Voltage Operating Range 3.5 150 V
TS Operating Voltage Range 0 135 V
SNS+/– Input Voltage Range Independent of VIN 3.5 150 V
Total Supply Current (Note 8)
On or Sleep, Charge Pump Regulating
ON Mode, Charge Pump Overdriven
Sleep Mode, Charge Pump Overdriven
Shutdown Mode
CVCC=1µF,
VRUN = 2V, VBST=OPEN, VTS=VSNS=12V
VINP=4V, VRUN = 2V, VBST-TS = 13V
VINP=0.4V, VRUN = 2V, VBST-TS = 13V
VRUN=0V (LTC7000)
l
l
250
60
37
1
85
60
3
µA
µA
μA
μA
VIN DC Supply Current, Charge Pump Overdriven (Note5)
ON Mode
Sleep Mode
Shutdown Mode
CVCC=1µF, VBST-TS = 13V,
VINP=4V, VRUN = 2V
VINP=0.4V, VRUN = 2V
VRUN=0V (LTC7000)
35
25
1
µA
μA
μA
SNS+ Current VINP=4V, VRUN = 2V
VINP=0.4V, VRUN = 2V
VRUN=0V (LTC7000)
21
12
0
µA
μA
μA
SNS– Current VINP=4V, VRUN = 2V
VINP=0.4V, VRUN = 2V
VRUN = 0V (LTC7000)
l2 4
0
0
6.5 µA
μA
μA
VCC LDO Output Voltage CVCC=1µF, VIN = 12V 10 V
VCC LDO Dropout Voltage (VIN-VCC) VIN = 6V, IVCC = –1mA 0.2 V
VCC
UVLO
VCC Undervoltage Lockout VCCUV = OPEN, VIN=VCC
VCC Rising
VCC Falling
Hysteresis
VCCUV = 0V, VIN=VCC
VCC Rising
VCC Falling
Hysteresis
VCCUV = 1.5V, VIN=VCC
VCC Rising
VCC Falling
Hysteresis
l
l
l
l
6.5
5.8
3.1
2.8
9.7
9.1
7.0
6.4
600
3.5
3.2
300
10.5
9.9
600
7.5
6.9
3.7
3.4
10.9
10.3
V
V
mV
V
V
mV
V
V
mV
Bootstrapped Supply (BST-TS)
VBST-TS VTG Above VTS with INP=3V (DC) VIN=VCC=VTS=7V, IBST=0µA
VIN=VCC=VTS=10V, IBST=0µA
VIN=VTS=135V, IBST=0µA
l
l
9
10
10
11
12
12
14
14
14
V
V
V
Charge Pump Output Current VTS=20V, VBST-TS=10V l–15 –30 µA
BST-TS Floating UVLO BST-TS Rising
BST-TS Falling
3.1
2.8
V
V
Output Gate Driver (TG)
TG Pull-Up Resistance VIN=VBST=12V l2.2 7 Ω
TG Pull-Down Resistance VIN=VBST=12V l1 4 Ω
trOutput Rise Time 10% to 90%, CL=1nF
10% to 90%, CL=10nF
13
90
ns
ns
tfOutput Fall Time 10% to 90%, CL=1nF
10% to 90%, CL=10nF
13
40
ns
ns
tPLH
tPHL
Input to Output Propagation Delay VINP Rising, CL=1nF
VINP Falling, CL=1nF
l
l
35
35
70
70
ns
ns
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN=VSNS+=10V, VCC=VBST=10V, VTS=GND=0V,
unless otherwise noted.
LTC7000/LTC7000-1
6
Rev. E
For more information www.analog.com
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC7000/LTC7000-1 is tested under pulsed load conditions
such that TJ≈TA. The LTC7000E/LTC7000E-1 is guaranteed to meet
performance specifications from 0°C to 85°C. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC7000I/LTC7000I-1 is guaranteed over the –40°C to 125°C
operating junction temperature range, the LTC7000H/LTC7000H-1 is
guaranteed over the –40°C to 150°C operating junction temperature
range, the LTC7000J/LTC7000J-1 is guaranteed over the –40°C to 150°C
operating junction temperature range, and the LTC7000MP/LTC7000MP-1
is tested and guaranteed over the –55°C to 150°C operating junction
temperature range.
High junction temperatures degrade operating lifetimes; operating lifetime is
derated for junction temperatures greater than 125°C. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors.
Note 3: The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according to
the formula:
TJ = TA + (PD • θJA), where θJA is 45°C/ W.
Note 4: This IC includes over temperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Operation above the specified absolute maximum operating junction
temperature may impair device reliability or permanently damage the
device.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: For application concerned with pin creepage and clearance
distances at high voltages, the MSE16(12) variation package should be
used. See Applications Information.
Note 7: Do not apply a voltage or current source to these pins. They must
be connected to capacitive loads only; otherwise permanent damage may
occur.
Note 8: Total supply current is the sum of the current into the VIN, SNS+,
SNS– and TS pins.
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN=VSNS+=10V, VCC=VBST=10V, VTS=GND=0V,
unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Operation
VIH
VIL
Input Threshold Voltages VINP Rising
VINP Falling
Hysteresis
l
l
1.7
1.3
2
1.6
400
2.2
1.8
V
V
mV
Input Pull-Down Resistance VINP=1V 1 MΩ
RUN and OVLO Pin Threshold Voltages Rising
Falling
Hysteresis
1.16
1.05
1.21
1.10
110
1.26
1.15
V
V
mV
RUN and OVLO Leakage Current VRUN = 1.3V, VOVLO = 1.3V l–100 0 100 nA
TIMER Threshold Voltage VTIMER Rising to VFAULT Going Low 1.25 1.3 1.35 V
TIMER Early Warning Voltage VFAULT Going Low to (TG-TS) Going Low 75 100 125 mV
TIMER Pin Fault Pull-Up Current VTIMER=1.0V, ISET=OPEN l–115 –100 –80 µA
TIMER Pin Pull-Down Current VTIMER=0.6V ISET=OPEN
ΔVSNS=0mV
2.0 2.5 3.0 µA
FAULT Output Low Voltage IFAULT=1mA l0.2 0.5 V
FAULT Leakage Current VFAULT=5V l–100 0 100 nA
ΔVTH Current Sense Threshold Voltage
ΔVSNS = (VSNS+ – VSNS–)
ISET=OPEN or LTC7000-1
VISET=1.2V (LTC7000 Only)
VISET=0V (LTC7000 Only)
l22
54
15
30
60
20
36
64
24
mV
DRetry Duty Cycle ΔVSNS = 200mV
CTIMER = 1nF
l0.06 0.1 %
ISET (LTC7000 Only) and VCCUV Pull-Up Current VISET=1.0V, VCCUV = 1.0V –11.3 –10 –8.7 µA
IMON Output Voltage (LTC7000 Only) ΔVSNS=60mV, VTIMER=0V, VINP = 3.5V
ΔVSNS=30mV, VTIMER=0V, VINP = 3.5V
ΔVSNS=0mV, VTIMER=0V, VINP = 3.5V
l1.12
0.52
1.2
0.6
0
1.28
0.68
0.1
V
V
V
Over-Current to TG Low Propagation Delay ΔVSNS Step 10mV to 50mV, ISET=OPEN,
VTIMER=VCC, VINP = 3.5V
70 ns
LTC7000/LTC7000-1
7
Rev. E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
Total Supply Current vs
VIN Voltage
Driver On Resistance vs VBST-TS
Voltage
Charge Pump No-Load Output
Voltage vs VTS
Charge Pump Load Regulation
Charge Pump Output Current
vs VTS ∆VTH vs Temperature
RUN and OVLO Threshold
Voltages vs Temperature VCCUV Lockout vs Temperature
Driver On Resistance vs
Temperature
V
SNS+
= V
SNS–
= V
TS
V
TS
(V)
0
4
8
12
16
20
0
0.5
1.0
1.5
2.0
2.5
3.0
CURRENT (mA)
7000 G01
VIN = 5V
VIN = 12V
I
BST
= 0µA
V
CC
= 4V
V
CC
= 5V
V
CC
= 6V
V
CC
= 7V
V
CC
≥ 8V
V
TS
(V)
0
5
10
15
20
0
2
4
6
8
10
12
14
V
BST
- V
TS
(V)
7000 G03
V
CCUV
= 0V
TGUP
TGDN
V
BST-TS
(V)
3
6
9
12
15
0
1
2
3
4
5
6
R
DSON (Ω)
7000 G02
V
CC
= 4V
VTS = 4V
VTS = 6V
VTS = 8V
VTS = 10V
VTS = 12V
I
BST
(µA)
0
–20
–40
–60
–80
–1
1
3
5
7
9
11
13
15
V
BST
-V
TS
(V)
7000 G04
V
CC
= 7V
V
BST-TS
= 10V
25°C
150°C
V
TS
(V)
0
30
60
90
120
150
–45.0
–35.0
–25.0
–15.0
–5.0
5.0
I
BST
(µA)
7000 G05
ISET = 0V
ISET = OPEN
ISET = 1.2V
ISET = 1.5V
TEMPERATURE (°C)
–50
0
50
100
150
0
10
20
30
40
50
60
70
80
THRESHOLD VOLTAGE (mV)
CURRENT SENSE
7000 G06
RISING
FALLING
TEMPERATURE (°C)
–50
0
50
100
150
1.05
1.10
1.15
1.20
1.25
THRESHOLD VOLTAGE (V)
7000 G07
V
CCUV
= OPEN
RISING
FALLING
TEMPERATURE (°C)
–50
0
50
100
150
5.0
5.5
6.0
6.5
7.0
7.5
8.0
V
CCUV
LOCKOUT (V)
7000 G08
V
BST–TS
= 12V
TGUP
TGDN
TEMPERATURE (°C)
–50
0
50
100
150
0
1
2
3
4
RESISTANCE (Ω)
7000 G09
TA = 25°C, unless otherwise noted.
LTC7000/LTC7000-1
8
Rev. E
For more information www.analog.com
TYPICAL PERFORMANCE CHARACTERISTICS
VIN Supply Current vs
Temperature
SNS+ Supply Current vs
Temperature
SNS– Supply Current vs
Temperature
Input Threshold Voltage vs
Temperature
SNS+ FAULT Threshold vs
Temperature
Overcurrent to TGDN=LOW
Delay Time vs Temperature
Retry Duty Cycle vs Temperature
VBST-TS Floating UVLO Voltage vs
Temperature
ISET and VCCUV Pull-Up Current vs
Temperature
TEMPERATURE (°C)
–50
0
50
100
150
0
5
10
15
20
25
30
35
40
7000 G10
SHUTDOWN
SLEEP
ON
CURRENT (µA)
VIN = 10V
TEMPERATURE (°C)
–50
0
50
100
150
–10
0
10
20
30
CURRENT (µA)
7000 G11
SHUTDOWN
SLEEP
ON
VIN = VSNS+ = VSNS– = 10V
SHUTDOWN, SLEEP
ON
TEMPERATURE (°C)
–50
0
50
100
150
–2.0
0
2.0
4.0
6.0
7000 G12
CURRENT (µA)
VIN = VSNS+ = VSNS– = 10V
V
IN
= 10V
RISING
FALLING
TEMPERATURE (°C)
–50
0
50
100
150
0
0.5
1.0
1.5
2.0
2.5
3.0
THRESHOLD VOLTAGE (V)
7000 G13
RISING
FALLING
TEMPERATURE (°C)
–50
0
50
100
150
3.0
3.1
3.2
3.3
3.4
THRESHOLD VOLTAGE (V)
7000 G15
CTIMER = 1nF
TEMPERATURE (°C)
–50
0
50
100
150
18
19
20
21
22
TIME (µs)
7000 G15
C
TIMER
= 1nF
TEMPERATURE (°C)
–50
0
50
100
150
0.060
0.065
0.070
0.075
0.080
DUTY CYCLE (%)
7000 G16
RISING
FALLING
TEMPERATURE (°C)
–50
0
50
100
150
2.0
2.5
3.0
3.5
4.0
THRESHOLD VOLTAGE (V)
7000 G17
TEMPERATURE (°C)
–50
0
50
100
150
–11.0
–10.5
–10.0
–9.5
–9.0
PULL–UP CURRENT (µA)
7000 G18
VISET = 1.0V (LTC7000 ONLY)
VVCCUV = 1.0V
TA = 25°C, unless otherwise noted.
LTC7000/LTC7000-1
9
Rev. E
For more information www.analog.com
PIN FUNCTIONS
RUN (Pin 1/NA): Run Control Input. A voltage on this pin
above 1.21V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC7000, reducing quiescent
current to approximately 1µA. Optionally connect to the
input supply through a resistive divider to set the under-
voltage lockout.
VIN (Pin 2/Pin 1): Main Supply Pin. A bypass capacitor
with a minimum value of 0.1µF should be tied between
this pin and GND.
V
CC
(Pin 3/Pin 3): Output of internal LDO and power sup-
ply for gate drivers and internal circuitry. Decouple this pin
to GND with a minimum 1.0µF low ESR ceramic capacitor.
Do not use the VCC pin for any other purpose. VCC can
be overdriven from an external high efficiency source for
high frequency switching applications that require higher
power delivered to the external MOSFET. Do not connect
VCC to a voltage greater than VIN.
VCCUV (Pin 4/Pin 5): VCC Supply Undervoltage Lockout.
A resistor on this pin sets the reference for the Gate Drive
undervoltage lockout. The voltage on this pin in the range
of 0.4V to 1.5V is multiplied by 7 to be the undervoltage
lockout for the Gate Drive (VCC pin). Short to ground to
set the minimum gate drive UVLO of 3.5V. Leave open to
set gate drive UVLO to 7.0V
FAULT (Pin 5/Pin 6): Open Drain Fault Output. This pin
pulls low after the voltage on the TIMER pin has reached
the fault threshold of 1.3V. It indicates the pass transistor
is about to turn off due to an overcurrent condition. The
typical pull-down impedance is 200Ω. The FAULT pin does
not go to a high-impedance state until the overcurrent
condition and the TIMER cooldown period expire. If the
TIMER pin is pulled above 3.5V, the TIMER function is
disabled. In this state this pin pulls low when the VTGUP-TS
signal is driven high.
TIMER (Pin 6/Pin 7): Fault Timer Input. A timing capaci-
tor, CT, from the TIMER pin to GND sets the times for fault
warning, fault turn off and retry periods (see Applications
Information). When the TIMER pin is connected to a volt-
age higher than 3.5V, an overcurrent condition will immedi-
ately pull the TGDN pin to TS. TGUP will not go high again
until the fault condition is reset by the INP pin going low
and then back high.
INP (Pin 7/Pin 8): Input Signal. CMOS compatible input
reference to GND that sets the state of TGDN and TGUP
pins (see Applications Information). INP has an internal
1MΩ pull-down to GND to keep TGDN pulled to TS during
startup transients.
OVLO (Pin 8/NA): Overvoltage Lockout Input. Connect
to the input supply through a resistor divider to set the
overvoltage lockout level. A voltage on this pin above
1.21V causes TGDN to be pulled to TS. Normal operation
resumes when the voltage on this pin decreases below
1.11V. Triggering an OVLO causes a fault condition. OVLO
should be tied to GND when not used.
I
SET
(Pin 9/NA): Current Trip Threshold Set. A resistor
on this pin to GND sets the peak current threshold. The
voltage on this pin (internally clamped between 0.4V and
1.5V) is divided by 20 to be the current comparator ref-
erence. Short to GND for minimum peak current (20mV
ΔV
TH
). Leave open for an accurate peak current (30mV
ΔVTH).
IMON (Pin 10/NA): Current Monitor. The voltage on this
pin with respect to GND represents the voltage across
the sense resistor multiplied by 20. The range on this pin
is 0V to 1.5V.
TGDN (Pin 11/Pin 9): High Current Gate Driver Pull-Down.
This pin pulls down to TS. For the fastest turn-off, tie this
pin directly to the gate of the external high side MOSFET.
TGUP (Pin 12/Pin 10): High Current Gate Driver Pull-Up.
This pin pulls up to BST. Tie this pin to TGDN for maxi-
mum gate drive transition speed. A resistor can be con-
nected between this pin and the gate of the external
MOSFET to control the in-rush current during turn-on.
See Applications Information.
TS (Pin 13/Pin 11): Top (High Side) source connection or
GND if used in ground referenced applications.
BST (Pin 14/Pin 12): High Side Bootstrapped Supply. An
external capacitor with a minimum value of 0.1µF should
be tied between this pin and TS. Voltage swing on this pin
is 12V to (VIN+12V).
(LTC7000/LTC7000-1)
LTC7000/LTC7000-1
10
Rev. E
For more information www.analog.com
PIN FUNCTIONS
BLOCK DIAGRAM
SNS– (Pin 15/Pin 14), SNS+ (Pin 16/Pin 16): Current
Sense Comparator Input. Place a sense resistor in
series with the drain of the external MOSFET to set
the peak current. The SNS– pin should be connected
to the sense resistor using a minimum 100Ω resis-
tor. Use a Kelvin connection from the SNS+ pin to the
sense resistor. The current comparator trip threshold
voltage, ΔVTH is the ISET voltage divided by 20. The trip
threshold is internally clamped to a minimum of 20mV
and a maximum of 75mV. If ISET is open or greater than
2.0V, ΔVTH is set internally to 30mV.
GND (Exposed Pad Pin 17): Ground. The exposed pad
must be soldered to the PCB for rated electrical and ther-
mal performance.
1.0V 20mV TO 75mV
7000 BD
LOAD
CT
+
–
+
–
+
–
+
–
+
–
+
–
+
–
+
–
1.21V
LOGIC
LEVEL
SHIFT
UP
LEVEL
SHIFT
DOWN
CHARGE
PUMP
102.5µA/5µA
200Ω
2.3V
2.3V
2.5µA
16
15
12
14
11
13
6
5
SNS+
SNS+
3.2V
SNS–
BST
TGUP
TS
TGDN
FAULT
TIMER
2
9
10
3
V
CC
9R
R
1
8
7
4
RUN
VCCUV
OVLO
INP
V
IN
ISET
IMON
3.5V
1.4V
1.3V
0.4V
10µA
2.3V 100k
10µA
RSNS
1M
CVCC
CB
M1
PCH
NCH
/20
3.5V TO 135V
20x
VCC
D1
(OPTIONAL)
RF LT
LTC7000/LTC7000-1
11
Rev. E
For more information www.analog.com
OPERATION
The LTC7000/LTC7000-1 is designed to receive a ground-
referenced, low voltage digital input signal, INP and
quickly drive and protect a high side N-channel power
MOSFET whose drain can be up to 150V above ground.
The LTC7000/LTC7000-1 is capable of driving a 1nF load
using a 12V bootstrapped supply voltage (V
BST
–V
TS
) with
35ns of propagation delay and fast rise/fall times. The
high gate drive voltage reduces external power losses
associated with external MOSFET on-resistance. The
strong drivers not only provide fast turn on and off times
but hold the TGUP and TGDN to TS voltages in the desired
state in the presence of high slew rate transients which
can occur driving inductive loads at high voltages.
Overcurrent Protection
The LTC7000/LTC7000-1 protects a high side N-channel
MOSFET from an overcurrent condition by monitoring the
voltage across an external sense resistor placed in series
with the drain of an external MOSFET and forcing the
external MOSFET to turn off by pulling TGDN to TS when
the voltage across the sense resistor, ΔVSNS, exceeds
the current comparator threshold voltage, ΔV
TH
, after
a period of time set by the timing capacitor, CT. When
an overcurrent condition is detected with ISET open,
ΔVTH is internally programmed to a low value of 30mV
minimizing the external conduction loss associated with
current sensing by allowing the use of lower value sense
resistors. A resistor placed between ISET and ground
allows ΔVTH to be programmed from 20mV to 75mV.
An adjustable fault and overcurrent timer is enabled by
placing a capacitor, CT from the TIMER pin to ground
and allows the load to continue functioning during
brief overcurrent transient events while protecting the
MOSFET from long periods of high currents. An external
fault flag is available which can warn of an impending
MOSFET turn off. A fast turn-off mode where TGDN
is immediately pulled to TS due to an overcurrent is
available by connecting the TIMER pin to VCC.
Current Monitor (LTC7000 Only)
The LTC7000 provides an output voltage referenced to
ground on the IMON pin that reflects the current flowing
through the external sense resistor connected between
SNS+ and SNS– while TGUP is high. The voltage on IMON
is the voltage difference between the SNS+ and SNS– pins
multiplied by 20x and referenced to ground with a range
of 0V to 1.5V. The IMON output voltage has an output
impedance of 100kΩ and is pulled to ground with a
100kΩ resistor when INP is low.
VCC Power
Power for the MOSFET driver and internal circuitry is
derived from the VCC pin. The VCC pin voltage is gener-
ated from an internal P-channel LDO connected to VIN.
VCC can also be overdriven from a high efficiency exter-
nal source for high frequency switching applications that
require higher power delivered to external MOSFET. VCC
should never be driven higher than VIN or permanent
damage to the LTC7000/LTC7000-1 could occur.
(Refer to Block Diagram)
TIMING DIAGRAM
INPUT (INP)
OUTPUT (TG-TS)
INPUT RISE/FALL TIME < 10ns
t
PLH
t
r
t
PHL
t
f
90%
10%
V
IH
V
IL
7000 TD
LTC7000/LTC7000-1
12
Rev. E
For more information www.analog.com
OPERATION
Internal Charge Pump
The LTC7000/LTC7000-1 contains an internal charge
pump that enables the MOSFET gate drive to have 100%
duty cycle. The charge pump regulates the BST-TS volt-
age to 12V reducing external power losses associated
with external MOSFET on-resistance. The charge pump
uses the higher voltage of TS or V
CC
as the source for
the charge.
Start-Up and Shutdown
If the voltage on the RUN pin (LTC7000 only) is less than
0.7V, the LTC7000 enters a shutdown mode in which all
internal circuitry is disabled, reducing the DC supply cur-
rent to approximately 1µA. When the voltage on the RUN
pin exceeds 0.7V, the internal LDO connected to VIN is
enabled and regulates VCC to 10V. At VIN voltages less
than 10V, the LDO will operate in drop-out and VCC will
follow VIN. When the voltage on the RUN pin exceeds
1.21V, the input circuitry is enabled allowing TGUP and
TGDN to be driven high with respect to TS. The LTC7000-1
does not include the RUN pin. The internal LDO connected
to VIN and the input circuitry for the LTC7000-1 become
enabled when VIN is higher than 3.5V.
Protection Circuitry
When using the LTC7000/LTC7000-1, care must be taken
not to exceed any of the ratings specified in the Absolute
Maximum Ratings section. As an added safeguard, the
LTC7000/LTC7000-1 incorporates an overtemperature
shutdown feature. If the junction temperature reaches
approximately 180°C, the LTC7000/LTC7000-1 will enter
thermal shutdown mode and TGDN will be pulled to TS.
After the part has cooled below 160°C, TGDN will be
allowed to go back high. The overtemperature level is
not production tested. The LTC7000/LTC7000-1 is guar-
anteed to start a temperatures below 150°C.
The LTC7000/LTC7000-1 additionally implements protec-
tion features which prohibit TGUP being pulled to BST
when VIN, VCC or (VBST–VTS) are not within proper operat-
ing ranges. By using a resistive divider from V
IN
to ground
(LTC7000 only), the RUN and OVLO pins can serve as a
precise input supply overvoltage/undervoltage lockouts.
TGDN is pulled to TS when either RUN falls below 1.11V
or OVLO rises above 1.21V, which can be configured to
limit switching to a specific range on input supply volt-
ages. Furthermore, if VIN falls below 3.5V, an internal
undervoltage detector pulls TGDN to TS.
VCC contains an undervoltage lockout feature that will
pull TGDN to TS and is configured by the VCCUV pin. If
VCCUV is open, TGDN is pulled to TS until VCC is greater
than 7.0V. By using a resistor from VCCUV to ground, the
rising undervoltage lockout on VCC can be adjusted from
3.5V to 10.5V.
An additional internal undervoltage lockout is included
that will pull TGDN to TS when the floating voltage from
BST to TS is less than 3.1V (typical).
(Refer to Block Diagram)
LTC7000/LTC7000-1
13
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
Input Stage
The LTC7000/LTC7000-1 employs CMOS compatible
input thresholds that allow a low voltage digital signal
connected to INP to drive standard power MOSFETs.
The LTC7000/LTC7000-1 contains an internal voltage
regulator which biases the input buffer connected to INP
allowing the input thresholds (V
IH
=2.0V, V
IL
=1.6V) to be
independent of variations in VCC. The 400mV hysteresis
between VIH and VIL eliminates false triggering due to
noise events. However, care should be taken to keep INP
from any noise pickup, especially in high frequency, high
voltage applications.
INP also contains an internal 1MΩ pull-down resistor
to ground, keeping TGDN pulled to TS during startup
and other unknown transient events. During shutdown
(VRUN<0.7V) the internal 1MΩ pull-down resistor is dis-
abled and INP becomes high impedance.
INP has an Absolute Maximum of –6V to +15V which
allows the signal driving INP to have voltage excursions
outside the normal power supply and ground range. It is
not uncommon for signals routed with long PCB traces
and driven with fast rise/fall times to inductively ring to
voltages higher than power supply or lower than ground.
Output Stage
A simplified version of the LTC7000/LTC7000-1 output
stage is shown in Figure1. The pull-down device is an
N-channel MOSFET with a typical 1Ω RDS(ON) and the
pull-up device is a P-channel MOSFET with a typical
2.2Ω RDS(ON). The pull-up and pull-down pins have been
BST
TGUP
TGDN
TS
VCC
INP
12V
7000 F01
+
–
+
–
2.2Ω
1Ω
HIGH
SPEED
150V
LEVEL
SHIFTER
CHARGE
PUMP
30µA
LTC7000/LTC7000-1
AV = 1
Figure1. Simplified Output Stage
separated to allow the turn-on transient to be controlled
while maintaining a fast turn-off.
The LTC7000/LTC7000-1 powerful output stage (1Ω pull-
down and 2.2Ω pull-up) minimizes transition losses when
driving external MOSFETs and keeps the MOSFET in the
state commanded by INP even if high voltage and high
frequency transients couple from the power MOSFET back
to the driving circuitry.
The large gate drive voltage on TGUP and TGDN reduces
conduction losses in the external MOSFET because
RDS(ON) is inversely proportional to its gate overdrive
(VGS–VTH).
SNS+ and SNS– Pins
SNS+ and SNS– are the inputs to the high side current
comparator and current monitor. The common mode
operational voltage range for these pins is 3.5V to 150V
independent of any other voltages. SNS+ also provides
power to the current comparator and current monitor
and draws approximately 21µA when not shut down and
INP is high. SNS– draws a bias current of approximately
4µA when not shut down and INP is high. When SNS+
is less than 3.2V typical (3.5V minimum), a fault condi-
tion occurs and the adjustable fault timer is enabled with
the same behavior as an overcurrent fault. Normally the
SNS pins are connected to the drain side of the external
MOSFET. However, the SNS pins can be connected to the
source side of the external MOSFET as long as the source
voltage rises above 3.5V before the Fault Timer expires.
See Fault Timer and Fault Flag section.
A filter resistor, RF LT should be placed in series with the
SNS– pin as shown in Figure2. Note that the SNS– pin
takes 4µA of bias current which will affect the current
SNS+
SNS–
TGUP
TGDN
TS
7000 F03
LTC7000/
LTC7000-1
INP = LO, 0µA
INP = HI, 4µA
RF LT
CF LT RSNS
M1
POWER
LOAD
Figure2. Sense Pins Filtering
LTC7000/LTC7000-1
14
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
sense and current monitoring functions. RF LT should be
at least 2000x larger than RSNS (minimum 100Ω) to pro-
vide robustness during short circuit events. The current
injected into the SNS+ and SNS– pins during a short cir-
cuit event depends on the voltage on POWER, RSNS,
external MOSFET RDS(ON), timer capacitor value and the
value of RF LT .
ISET Pin (LTC7000 Only)
The current comparator has an adjustable threshold
voltage, ΔVTH, of 20mV to 75mV and is set by placing a
resistor to ground on the ISET pin. The ISET pin is biased
with an internal 10µA current source. Floating ISET
enables the current comparator to have an accurate 30mV
threshold voltage which allows for lower value sense
resistors and reduces the external power dissipation.
By placing a 40kΩ to 150kΩ resistor between ISET and
ground, the sense threshold voltage can be programmed
to values between 20mV and 75mV. The value of resistor
for a particular sense threshold voltage can be selected
using Figure3 or the following equation:
RISET =Δ VTH
0.5µA
Where 20mV< ΔVTH < 75mV.
ISET RESISTOR TO GROUND (kΩ)
0
30
60
90
120
150
180
210
240
0
10
20
30
40
50
60
70
80
CURRENT SENSE THRESHOLD ∆VTH (mV)
7000 F02
Figure3. RISET Selection
Fault Timer and Fault Flag
The LTC7000/LTC7000-1 includes an adjustable fault
timer. Connecting a capacitor from the TIMER pin to
ground sets the delay period before the external MOSFET
is turned off during an overcurrent fault condition. The
same capacitor also sets the cooldown period before the
external MOSFET is allowed to turn back on. Once a fault
condition is detected, a 100µA current charges the TIMER
pin. When the voltage on the TIMER pin reaches 1.3V, the
FA U LT pin pulls low to indicate the detection of a fault
condition and provide warning of an impending power
loss. After the TIMER voltage crosses the 1.4V thresh-
old, TGDN is immediately pulled to TS turning off the
external MOSFET. The on-time of the external MOSFET,
TOVER_CURRENT, during an overcurrent event is given by
the following equation:
TOVER_CURRENT =1.4V • CTIMER
100µA +1.5µs
The warning time, TWARNING, generated by an overcurrent
event is given by the following equation:
TWARNING =0.1V • CTIMER
100µA +1.5µs
If the overcurrent fault condition disappears before
TIMER has reached 1.4V, TIMER is discharged by a
2.5µA current. If TIMER had reached 1.3V (FA U LT has
gone low) and the overcurrent fault condition disappears,
TIMER is discharged with a 2.5µA current and FA U LT will
be reset when TIMER reaches 0.4V. The on-time and
warning times are shown graphically in Figure4.
TIME
VTMR (V)
7000 F04
TOVER_CURRENT
14ms/µF
TWARNING
1ms/µF
TFAULT
13ms/µF
1.4
1.3
Figure4. Fault Timer Trip Points
LTC7000/LTC7000-1
15
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
Cooldown Period and Restart
As soon as TIMER reaches 1.4V, TGDN is pulled to TS in an
overcurrent fault condition and the TIMER pin starts dis-
charging with a 2.5µA current. When TIMER reaches 0.4V,
TIMER charges with a 2.5µA current. When TIMER reaches
1.4V, it starts discharging again with a 2.5µA current. This
pattern repeats 32 times to form a long cooldown timer
period (TCOOL_DOWN) before retry (Figure5).
If INP is cycled low, TGDN will be pulled to TS and TIMER
will be pulled low with an internal 100kΩ resistor. If INP is
cycled low during the cooldown period, the timer counter
will be reset. If INP then goes high, TGUP will pulled to
BST and the fault timer will be reactivated with the TIMER
voltage starting from it’s current value.
At the end of the cooldown period (when TIMER drops
below 0.4V for the 32nd time), the LTC7000/LTC7000-1
retries, pulling TGUP to BST and turning on the external
MOSFET. The FAULT pin will then go to a high impedance
state. The total cooldown timer period is given by:
TCOOL _DOWN =63 • 1.0V • CTIMER
2.5µA
The retry duty cycle in percent is to a first order indepen-
dent of CT and is defined by:
D=100 • TOVER_ CURRENT
T
OVER_CURRENT
+T
COOL _DOWN
To defeat the automatic retry, place a 100kΩ resistor in
parallel with the TIMER capacitor. Note that the time to
turn off from an overcurrent fault will be increased by 7%
and the FAULT pin will remain low indicating a fault has
occurred. To get the LTC7000/LTC7000-1 to retry and to
clear the fault flag the INP signal needs to cycle low then
back high.
Typical turn-off times and cooldown periods for some
standard value timer capacitors are shown Table1:
Table1. Fault Time for Typical Capacitors
CTIMER
(nF)
TOVER_CURRENT
(µs)
TCOOL_DOWN
(s)
Retry Duty Cycle
%
<0.1 ~3 0.0005 ~0.6
1 16 0.025 0.06
10 142 0.250 0.06
100 1402 2.500 0.06
COOLDOWN PERIOD (TCOOL_DOWN)
7000 F05
TIMER
∆VSNS
V(TG-TS)
(TGUP SHORTED TO TGDN)
FAULT
>30mV
<30mV
0.4V
1ST 2ND 31ST 32ND
INP
1.30V
1.40V
Figure5. Auto Retry Cool-Down Timer Cycle
LTC7000/LTC7000-1
16
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
7000 F06
TIMER
∆VSNS
V(TG-TS)
(TGUP SHORTED TO TGDN)
FAULT
>30mV >30mV
<30mV
0.4V
1ST 1ST 31ST 32ND
INP
1.30V
1.40V
Figure6. Auto Retry with INP Cycling Low
Fast Turn-Off Mode
If the TIMER pin is connected to VCC or any other supply
greater than 3.5V (abs max 15V), an overcurrent event
will immediately pull TGDN to TS and the LTC7000/
LTC7000-1 will remain there until the INP signal has
cycled low and then back high. In fast turn-off mode, the
typical delay from a ΔVSNS overcurrent step to TG going
low is around 70ns, so very fast short-circuit events can
be detected. Also, when the TIMER pin is connected to a
voltage greater than 3.5V, the FAULT signal is redefined to
be the inverse state of the high side pull-up (VTGUP–VTS).
The FAULT signal can be used in this application as low-
voltage digital information that has been level shifted
down from the high side MOSFET. An application for this
could include using this signal to wait until V
TGUP
–V
TS
has
gone low before turning on a redundant power MOSFET.
High Side Current Monitor Output (LTC7000 Only)
The LTC7000 contains a high side current monitor output.
The high side differential voltage sensed across the SNS+
and SNS
–
pins (ΔV
SNS
) is multiplied by 20 and ground
referenced on the I
MON
pin which makes it suitable for
monitoring and regulating the MOSFET current. The work-
ing range of IMON is 0V to 1.5V as ΔVSNS varies from 0mV
to 75mV. The I
MON
pin is a voltage output whose nominal
output impedance is 100kΩ and should not be resistively
loaded. The current monitor output is only available after
the INP signal has been high for 150µs (typical), other-
wise the IMON pin is pulled to ground. A block diagram of
the IMON circuit is shown in Figure7. The gm of the tran-
simpedance amplifier tracks the 100kΩ internal resistor
to ground which makes variations over process minimal.
IMON
gm = 200µA/V
7000 F07
LTC7000
SNS+
SNS–
+
–
100k
INP
Figure7. IMON Block diagram
RUN Pin and External Input Overvoltage/Undervoltage
Lockout (LTC7000 Only)
The RUN pin has two different threshold voltage levels.
Pulling RUN below 0.7V puts the LTC7000 into a low
quiescent current shutdown mode (IQ ~ 1µA). When
the RUN pin is greater than 1.21V, the part is enabled.
Figure8 shows examples of configurations for driving
the RUN pin from logic.
The RUN and OVLO pins can alternatively be configured
as precise undervoltage (UVLO) and overvoltage (OVLO)
lockouts on the VIN supply with a resistive divider
LTC7000/LTC7000-1
17
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
from VIN to ground. A simple resistive divider can be
used as shown in Figure9 to meet specific VIN voltage
requirements. When RUN is less than 1.11V or OVLO is
greater than 1.21V, TGDN will be pulled to TS and the
external MOSFET will be turned off. The approximate
delay time for the OVLO pin to turn on or turn off the
external MOSFET is 2.5µs. The approximate delay time
for the RUN pin falling lower than 1.11V to turn off the
external MOSFET is 3.5µs.
SUPPLY VIN
R1
M2
7000 F08
LTC7000
RUN
LTC7000
RUN
Figure8. RUN Pin Interface to Logic
D5 7000 F09
VIN
R4
R3
R5
LTC7000
OVLO
RUN
Figure9. Adjustable UV and OV Lockout
The current that flows through the R3–R4–R5 divider
will directly add to the shutdown, sleep and active current
of the LTC7000, and care should be taken to minimize
the impact of this current on the overall current used by
the application circuit. Resistor values in the megaohm
range may be required to keep the impact of the quiescent
shutdown and sleep currents low. To pick resistor values,
the sum total of R3+R4+R5 (RTOTAL) should be chosen
first based on the allowable DC current that can be drawn
from V
IN
. The individual values of R3, R4 and R5 can then
be calculated from the following equations:
R5 =RTOTAL •
1.21V
Rising V
IN
OVLO Threshold
R4 =RTOTAL •
1.21V
Rising V
IN
UVLO Threshold – R5
R3
=
RTOTAL – R5 – R4
For applications that do not need a precise external OVLO
the OVLO pin is required to be tied directly to ground.
The RUN pin in this type of application can be used as an
external UVLO using the above equations with R5=0Ω.
Similarly, for applications that do not require a precise
UVLO, the RUN pin can be tied to VIN. In this configura-
tion, the UVLO threshold is limited by the internal VIN
UVLO thresholds as shown in the Electrical Characteristics
table. The resistor values for the OVLO can be computed
using the above equations with R3=0Ω.
Be aware that the OVLO pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the OVLO pin from exceeding 6V, the following
relationship should be satisfied:
VIN(MAX) •R5
R3
+
R4
+
R5
⎛
⎝
⎜⎞
⎠
⎟<6V
If the VIN(MAX) relationship for the OVLO pin cannot be
satisfied, an external 5V Zener diode should also be placed
from OVLO to ground in addition to any lockout setting
resistors.
Bootstrapped Supply (BST-TS)
An external bootstrapped capacitor, CB, connected
between BST and TS supplies the gate drive voltage for
the MOSFET driver. The LTC7000/LTC7000-1 keeps the
BST-TS supply charged with an internal charge pump,
allowing for duty cycles up to 100%. When the high side
external MOSFET is to be turned on, the driver places
the C
B
voltage across the gate-source of the MOSFET.
This enhances the high side MOSFET and turns it on. The
source of the MOSFET, TS, rises to VIN and the BST pin
follows. With the high side MOSFET on, the BST voltage
is above the input supply; VBST=VIN+12V. The boost
capacitor, CB, supplies the charge to turn on the external
MOSFET and needs to have at least 10 times the charge to
turn on the external MOSFET fully. The charge to turn on
the external MOSFET is referred to gate charge, QG, and
is typically specified in the external MOSFET data sheet.
Gate charge can range from 5nC to hundreds of nCs and is
influenced by the gate drive level and the type of external
MOSFET used. For most applications, a capacitor value
LTC7000/LTC7000-1
18
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
of 0.1µF for CB will be sufficient. However, the following
relationship for CB should be maintained:
CB>External MOSFET QG
1V
The internal charge pump that charges the BST-TS supply
outputs approximately 30µA to the BST pin. If the time
to charge the external bootstrapped capacitor, CB from
initial power-up with the internal charge pump is not suf-
ficient for the application, a low reverse leakage external
silicon diode, D1, with a reverse voltage rating greater
than VIN connected between VCC and BST should be used
as shown in Figure10. An external silicon diode between
VCC and BST should be used if the following relationship
cannot be met:
BST diode required if
power-up to INP going high < CB• 12V
30µA ≅40ms
Figure10. External BST Diode
7000 F10
D1
CB
LTC7000/
LTC7000-1
BST
TS
VCC
Another reason to use an external silicon diode between
VCC and BST is if the external MOSFET is switched at a
frequency so high that the BST-TS supply collapses. An
external silicon diode between VCC and BST should be
used if the following relationship cannot be met:
BST diode required
if switching frequency >30µA
2 • MOSFET Q
G
≅500Hz
A Schottky diode should not be used between VCC and
BST, as the reverse leakage of the Schottky diode at hot
will be more current than the charge pump can overcome.
Some example silicon diodes with low leakage include:
• MMBD1501A - Fairchild Semiconductor
• CMPD3003 - Central Semiconductor
VCC Generation
The VCC pin provides the power for the MOSFET gate
drivers and internal circuitry. The LTC7000/LTC7000-1
features an internal P-channel low dropout regulator
(LDO) that can supply power at VCC from the VIN supply
pin or VCC can be driven from an external power supply.
If the internal P-channel LDO is used to power V
CC
, it
must have a minimum 1.0µF low ESR ceramic capacitor to
ensure stability and should not be connected to any other
circuitry other than optionally biasing some pins on the
LTC7000/LTC7000-1 (FAULT, INP or TIMER).
If the internal P-channel LDO is used to power V
CC
and an
external silicon diode is used between VCC and BST, care
must be taken not to switch an external MOSFET at too
high a frequency that can collapse the internal LDO. The
internal LDO can only supply 1mA with a 200mV drop-out.
In order to keep the internal LDO supply from collapsing
when an external silicon diode is used from VCC to BST,
the following relationship should be maintained:
Maximum switching
frequency with internal LDO < 1mA
2 • MOSFET Q
G
≅20kHz
For higher gate charge applications, an external silicon
diode between VCC and BST should be used and VCC
can be driven from a high efficiency external supply. VCC
should never be driven higher than VIN or permanent
damage to the LTC7000/LTC7000-1 could occur.
VCC Undervoltage Comparator
The LTC7000/LTC7000-1 contains an adjustable
undervoltage lockout (UVLO) on the VCC voltage that
pulls TGDN to TS and can be easily programmed using a
resistor (RVCCUV) between the VCCUV pin and ground. The
voltage generated on VCCUV by RVCCUV and the internal
10µA current source set the VCC UVLO. The rising VCC
UVLO is internally limited within the range of 3.5V and
10.5V. If VCCUV is open the rising VCC UVLO is set internally
to 7.0V. The typical value of resistor for a particular rising
V
CC
UVLO can be selected using Figure11 or the following
equation:
RVCCUV =
Rising V
CC
UVLO
70µA
LTC7000/LTC7000-1
19
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
Where 3.5V < Rising VCC UVLO < 10.5V.
RISING V
CC
UVLO
FALLING V
CC
UVLO
V
CCUV
RESISTOR TO GROUND (kΩ)
0
30
60
90
120
150
180
210
240
0
1
2
3
4
5
6
7
8
9
10
11
V
CC
UVLO (V)
7000 F11
Figure11. VCCUV Resistor Selection
MOSFET Selection
The most important parameters in high voltage applica-
tions for MOSFET selection are the breakdown voltage
BV
DSS
, on-resistance R
DS(ON)
and the safe operating area,
SOA.
The MOSFET, when off, will see the full input range of the
input power supply plus any additional ringing than can
occur when driving inductive loads.
External conduction losses are minimized when using low
R
DS(ON)
MOSFETs. Since many high voltage MOSFETs
have higher threshold voltages (typical VTH≥5V) and
RDS(ON) is directly related to the (VGS–VTH) of the MOSFET,
the LTC7000/LTC7000-1 maximum gate drive of greater
than 10V makes it an ideal solution to minimize external
conduction losses associated with external high voltage
MOSFETs.
SOA is specified in Typical Characteristic curves in power
N-channel MOSFET data sheets. The SOA curves show
the relationship between the voltages and current allowed
in a timed operation of a power MOSFET without causing
damage to the MOSFET. The overcurrent trip point (RSNS
and R
ISET
) of the LTC7000/LTC7000-1 and TIMER capaci-
tor should be chosen to stay within the SOA region of the
MOSFET selected for the application.
Limiting Inrush Current During Turn-On
Driving large capacitive loads such as complex electrical
systems with large bypass capacitors should be powered
using the circuit shown in Figure12. The pull-up gate
drive to the power MOSFET from TGUP is passed through
an RC delay network, RG and CG, which greatly reduces
the turn-on ramp rate of the MOSFET. Since the MOSFET
source voltage follows the gate voltage, the load is pow-
ered smoothly from ground. This dramatically reduces
the inrush current from the source supply and reduces
the transient ramp rate of the load allowing for slower
activation of sensitive electrical loads. The turn-off of the
MOSFET is not affected by the RC delay network as the
pull-down for the MOSFET gate is directly from the TGDN
pin. Note that the voltage rating on capacitor CG needs
to be the same or higher than the external MOSFET and
CLOAD.
Adding CG to the gate of the external MOSFET can cause
high frequency oscillation. A low power, low ohmic value
resistor (10Ω) should be placed in series with CG to
dampen the oscillations as shown in Figure12 whenever
CG is used in an application. Alternatively, the low ohmic
value resistor can be placed in series with the gate of the
external MOSFET.
CB
1µF
CG
0.047µF
LOAD
10Ω
SNS+
SNS–
RG 100k
RF LT
7000 F12
LTC7000/
LTC7000-1
RSNS
VIN
CLOAD
100µF
TGUP
TGDN
BST
TS
Figure12. Powering Large Capacitive Loads
The values for RG and CG to limit the inrush current can
be calculated from the below equation:
IIN _RUSH ≅0.7 • 12V • CLOAD
R
G
• C
G
LTC7000/LTC7000-1
20
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
For the values shown in Figure12 the inrush current will be:
IIN _RUSH ≅0.7 • 12V • 100µF
100k
Ω
• 0.047µF ≅180mA
Correspondingly, the ramp rate at the load for the circuit
in Figure12 is approximately:
Δ VLOAD
Δ T ≅0.7 • 12V
R
G
• C
G
≅2V / ms
When CG is added to the circuit in Figure12, the value
of the bootstrap capacitor, CB, must be increased to be
able to supply the charge to both to MOSFET gate and
capacitor CG. The relationship for CB that needs to be
maintained when CG is used is given by:
CB>MOSFET QG
1V
+10 • C
G
Optional Schottky Diode Usage on TS
When turning off a power MOSFET that is connected to
an inductive load (inductor, long wire or complex load),
the TS pin can be pulled below ground until the current in
the inductive load has completely discharged. The TS pin
is tolerant of voltages down to –6V, however, an optional
Schottky diode with a voltage rating at least as high as the
load voltage should be connected between TS and ground
to prevent discharging the load through the TS pin of the
LTC7000/LTC7000-1. See Figure13.
L1
SNS+
SNS–
TGUP
TGDN
TS
7000 F13
LTC7000/
LTC7000-1
RSNS
M1A
VIN
LOAD
D2
RF LT
Figure13. Optional Schottky Diode Usage
Reverse Current Protection
To protect the load from discharging back into VIN when
the external MOSFET is off and the VIN voltage drops
below the load voltage, two external N-channel MOSFETs
should be used and must be configured in a back-to-back
arrangement as shown in Figure 14. Dual N-channel
packages such as the Vishay/Siliconix Si7956DP are a
good choice for space saving designs.
SNS+
SNS–
TGUP
TGDN
TS
INP
7000 F14
RSNS
M1A
M1B
VIN
LOAD
LTC7000/
LTC7000-1
RF LT
Figure14. Protecting Load from Voltage Drops on VIN
Design Example
As a design example, consider a fast power supply switch
with the following specifications: VIN=VLOAD=8V to
135V, ILOAD=3A, Insertion Loss < 0.5W at room temp
with maximum load, output rise time with a 1µF load
is 1V/µs (1A inrush current) and a shorted load should
immediately turn off the MOSFET.
The first item to select is the N-channel MOSFET. The
IRF7815PBF is selected because it has sufficient breakdown
voltage (BV
DSS_MIN
=150V), sufficient continuous current
rating for a 3A load (ID_MAX=4.1A) and the on-resistance
is low enough (RDS(ON)_MAX=43mΩ) to be able to meet
the power loss specification.
Examining the MOSFET data sheet, the VGS vs RDS(ON)
typical performance curve shows a sharp increase in
RDS(ON) as the MOSFET VGS gets below 8.0V. Since the
default VCC UVLO is 7.0V, a resistor (RVCCUV) should be
placed between V
CCUV
and ground to increase the V
CC
LTC7000/LTC7000-1
21
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
UVLO to 8.0V. The value of RVCCUV is calculated and
rounded to the nearest standard value as follows:
RVCCUV =8.0V
70µA =113kΩ
The value of the current sense resistor, RSNS is calculated
next. The LTC7000-1 has a fixed current sense thresh-
old, ΔVTH, of 30mV typical and 22mV minimum. To pro-
vide a minimum 3A load current, the minimum specified
ΔVTH=22mV should be used for the RSNS calculation
below:
RSNS =22mV
3A
=7.3mΩ
The closest standard value is 7mΩ. The power dissipation
of R
SNS
is 63mW so choose a power rating of greater than
0.25W to provide adequate margin.
The next item to check is to make sure the insertion loss
specification is satisfied. The insertion loss is given by:
PLOSS =ILOAD2• RDS(ON)(MAX) +RSNS
( )
=3A2• 0.043Ω + 0.007Ω
( )
=0.45W
Which meets the design specification of less than 0.5W.
The fast output slew rate specification of 1V/µs into a 1µF
load can be met by placing a resistor, RG, in series with
the TGUP pin to the MOSFET gate, as well as connecting
TGDN and a capacitor, CG, to ground on the MOSFET
gate. The values of RG and TG can be calculated from the
following expression:
RG• CG≅0.7 • 12V
1V / µs =8.4µs
CG needs to have a voltage rating as high as the BVDSS
of the MOSFET. A good choice for CG is the AVX
06032C471KAT2A which has a value of 470pF and a volt-
age rating of 200V. RG is then calculated to be 17.8 k Ω.
The bootstrap capacitor CB can be calculated from the
gate charge as specified in the MOSFET data sheet and
CG as follows:
CB>QG
1V +10 • CG=30nC
1V +10 • 470pF
≅0.33nF. 100nF will be used.
To meet the short-circuit specification, the TIMER pin
should be connected to VCC to enable immediate turn-off
(approximately 70ns) of the MOSFET in the case of an
overcurrent condition. If an overcurrent condition turns
off the MOSFET, it will not turn back on until the INP pin
has cycled low then back high.
The complete circuit is shown in Figure15.
Figure15. Design Example
0.1µF
CG
470pF
200V
1µF
1µF
SNS+
SNS–
VIN
VCC
TIMER
FAULT
INP
VCCUV
17.8k
7000 F15
LTC7000-1
0.007Ω
IRF7815TRPBF
LOAD
8V TO 135V
3A CONTINUOUS MODE
VIN
8V TO 135V
113k GND
10Ω
100Ω
TGUP
TGDN
BST
TS
Turn–On Transient
V
IN
= 135V
50µs/DIV
V
INP
5V/DIV
V
LOAD
50V/DIV
IDMOSFET
1A/DIV
7000 F15b
LTC7000/LTC7000-1
22
Rev. E
For more information www.analog.com
APPLICATIONS INFORMATION
PC Board Layout Considerations
1. Solder the exposed pad on the backside of the LTC7000/
LTC7000-1 packages directly to the ground plane of the
board.
2. Kelvin connect the SNS+ pin to the current sense
resistor.
3. Limit the resistance of the TS trace, by making it short
and wide.
4. CB needs to be close to chip.
5. Always include an option in the PC board layout to
place a resistor in series with the gate of any exter-
nal MOSFET. High frequency oscillations are design
dependent and having the option to add a series damp-
ening resistor can save a design iteration of the PC
board.
Pin Creepage and Clearance
In some higher voltage applications, the MSE16 package
may not provide sufficient PC board trace clearance
between high and low voltage pins. In applications where
clearance is required, the LTC7000-1 in the MSE16(12)
package can be used. The MSE16(12) package has
removed pins between all the adjacent high voltage
and low voltage pins, providing 0.657mm clearance,
which will be sufficient for most applications. For more
information, refer to the printed circuit board design
standards described in IPC-2221.
LTC7000/LTC7000-1
23
Rev. E
For more information www.analog.com
TYPICAL APPLICATIONS
Protected Redundant Supply Switchover with Shoot Through Protection
LOAD
10µF
TS
BST
NOTE: THE BACKUP PATH
WILL LATCH-OFF WITH AN
OVERCURRENT FAULT.
TS
BST
VIN
RUN
VIN
RUN
FAULT
VCCUV
IMON
ISET
0.0015Ω
2×
BSC320N20NS3G0.003Ω
2×
BSC320N20NS3G
1nF 4.99k
10Ω 10Ω
100Ω
100Ω
100Ω
SNS+
SNS+SNS–
SNS–TGDNTGDN TGUPTGUP
7000 TA02
LTC7000
VBACKUP
7V TO 135V
MAIN POWER
7V TO 135V
100k
0.1µF
0.1µF
1nF
1µF1µF
200k
6.98k
GND
LTC7000
GND
10µF
0.1µF
100Ω
10µF
0.1µF
0.1µF
VCCUV
IMON
ISET
VCC
TIMER
OVLO
VCC
INP
TIMER
OVLO
INP FAULT
VMAIN Falling Through 33V VMAIN Rising Through 36VVLOAD vs Main Power Voltage
VBACKUP = 60V
MAIN POWER (V)
0
10
20
30
40
50
60
70
80
30
40
50
60
70
80
V
LOAD
(V)
R
LOAD
= 50Ω
40µs/DIV
V
LOAD
20V/DIV
V
TG–TS
BACKUP
10V/DIV
V
TG–TS
MAIN
10V/DIV
7000 TA02c
R
LOAD
= 50Ω
10µs/DIV
V
LOAD
20V/DIV
V
TG–TS
BACKUP
10V/DIV
V
TG–TS
MAIN
10V/DIV
LTC7000/LTC7000-1
24
Rev. E
For more information www.analog.com
TYPICAL APPLICATIONS
0.1µF
7000 TA03a
LTC7000
0.005Ω
BSC12DN20NS3G
LOAD
3.5V TO 60V
10A CONTINUOUS MAX
VIN
3.5V TO 60V
(150V TOLERANT)
100k
150k
100Ω
GND
OVLO
FAULT
VCC
TIMER
1µF
1nF
953k
10µF
19.6k
SNS+
SNS–
TGUP
TGDN
VIN
RUN
INP
BST
TS
ISET
IMON
VCCUV
ON
OFF
0.1µF
SNS+
SNS–
TGUP
TGDN
VIN
INP
7000 TA04a
LTC7000-1
0.04Ω
BSC12DN20NS3G
LOAD
3.5V TO 135V
0.5A CONTINUOUS
VIN
3.5V TO 135V
100k
RTIMER
100Ω
GND
VCC
FAULT
TIMER
1µF
10nF
10µF
BST
TS
VCCUV
ON
OFF
12Ω/100ms LOAD PULSE
R
TIMER
= OPEN
100ms/DIV
R
LOAD
10kΩ/DIV
I
LOAD
1A/DIV
V
LOAD
10V/DIV
V
TIMER
1A/DIV
7000 TA04b
VIN = 12V
VINP = 4V
12Ω/100mS LOAD PULSE
R
TIMER
= 100k
100ms/DIV
R
LOAD
10kΩ/DIV
I
LOAD
1A/DIV
V
LOAD
10V/DIV
V
TIMER
1V/DIV
7000 TA04c
VIN = 12V
VINP = 4V
High Side Switch with Input Overvoltage and Overcurrent Protection
High Side Switch with Overcurrent Protection and Fault Latchoff
LTC7000/LTC7000-1
25
Rev. E
For more information www.analog.com
TYPICAL APPLICATIONS
Average Current Trip
0.1µF
0.1µF
2
18 5
4
3
7
6
SNS+
SNS–
TGUP
TGDN
VIN
RUN
INP
7000 TA05a
LTC7000
LTC1541
0.06Ω
SI7738DP
LOAD
3.5V TO 135V
<1A AVERAGE
VIN
3.5V TO
135V
100k
+
–
+
–
+
–
1.2V
1µF
RB
D Q
500k
AMPOUT
400k
150k
3.3V
3.3V
VINP
249Ω
GND
FAULT
VCC
VCCUV
TIMER
OVLO
1µF
BST
TS
IMON
ISET
VIN = 12V
Response to 1.2A Load Step
250ms/DIV
I
LOAD
1A/DIV
V
IMON
1V/DIV
V
AMPOUT
2V/DIV
V
LOAD
10V/DIV
LTC7000/LTC7000-1
26
Rev. E
For more information www.analog.com
TYPICAL APPLICATIONS
4.7µF
0.47µF
LOAD
15mF
7V TO 60V
100nF
1µF
47µF
+ 1µF SNS+
SNS–
TGUP
TGDN
BST
TS
IMON
ISET
RUN
VIN
VCC
VCCUV
FAULT
OVLO
INP
TIMER
7000 TA06
LTC7000
0.003Ω
IRFS4115PBF
7V TO 60V
(150V TOLERANT)
12.1k
590k
100k 220k 10Ω
DFLS1150
100Ω
GND
ON
OFF
High Side Switch with Auto-Retry, Inrush Control and OVLO
Turn-On Response
VIN = 48V
200ms/DIV
V
INP
4V/DIV
V
LOAD
20V/DIV
I
LOAD
1A/DIV
LTC7000/LTC7000-1
27
Rev. E
For more information www.analog.com
PACKAGE DESCRIPTION
MSOP (MSE16) 0213 REV F
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
16
16151413121110
12345678
9
9
18
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
BSC
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
0.1016 ±0.0508
(.004 ±.002)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.280 ±0.076
(.011 ±.003)
REF
4.90 ±0.152
(.193 ±.006)
DETAIL “B”
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.12 REF
0.35
REF
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
LTC7000/LTC7000-1
28
Rev. E
For more information www.analog.com
MSOP (MSE16(12)) 0213 REV D
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 –0.27
(.007 – .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
1.0
(.039)
BSC
1.0
(.039)
BSC
16
16 14 121110
1 3 5 6 7 8
9
9
18
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.10
(.201)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ±0.038
(.0120 ±.0015)
TYP
0.50
(.0197)
BSC
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
0.1016 ±0.0508
(.004 ±.002)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.280 ±0.076
(.011 ±.003)
REF
4.90 ±0.152
(.193 ±.006)
DETAIL “B”
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.12 REF
0.35
REF
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev D)
PACKAGE DESCRIPTION
LTC7000/LTC7000-1
29
Rev. E
For more information www.analog.com
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 07/17 Updated pin descriptions.
Modified Block Diagram.
Inserted paragraph.
Modified equations.
Changed from 3.3V to 3.5V in Fast Turn-Off Mode paragraph, updated Table 1 numbers.
Changed to Zener from Schottky diode.
Schematic clarification.
7
8
11, 13
13
14
15
22, 23
B 08/18 Added 100Ω resistor to Typical Application.
Changed Absolute Maximum Ratings for SNS+/SNS–.
Replaced Typical Performance Curve G01.
Modified Block Diagram.
Updated schematic and graphs TA02c and TA02d.
1
3
6
9
22
C 02/19 Removed the temperature dot from the TIMER Pin Pull-Down Current specification. 5
D 11/19 Added AEC-Q100 Qualified for Automotive Applications and orderable part numbers 1, 3, 4
E 03/20 Correct Top Mark from 7000-1 to 70001 3
LTC7000/LTC7000-1
30
Rev. E
For more information www.analog.com
ANALOG DEVICES, INC. 2018–2020
03/20
www.analog.com
RELATED PARTS
TYPICAL APPLICATION
PART NUMBER DESCRIPTION COMMENTS
LTC7001 Fast 150V High Side NMOS Static
Switch Driver
3.5V to 150V Operation, IQ=35µA, Turn-On (CL=1nF)=35ns,
Internal ChargePump
LTC4440/LTC4440-5/
LTC4440A-5
High Speed, High Voltage High Side
Gate Driver
Up to 100V Supply Voltage, 8V ≤ VCC ≤ 15V, 2.4A Peak Pull-Up/1.5Ω
Peak Pull-Down
LTC7138 High Efficiency, 150V 250mA/400mA Synchronous
Step-Down Regulator
Integrated Power MOSFETs, 4V ≤ VIN ≤ 150V, 0.8V ≤ VOUT ≤ VIN,
IQ=12µA, MSOP-16 (12)
LTC7103 105V, 2.3A Low EMI Synchronous Step-Down Regulator 4.4V ≤ VIN ≤ 105V, 1V ≤ VOUT ≤ VIN, IQ=2µA Fixed Frequency 200kHz
to 2MHz, 5mm x 6mm QFN
LTC7801 150V Low IQ, Synchronous Step-Down DC/DC Controller 4V ≤ VIN ≤ 140V, 150V abs max, 0.8V ≤ VOUT ≤ 60V, IQ=40µA,
PLL Fixed Frequency 320kHz to 2.25MHz
LT1910 Protected High Side MOSFET Driver 8V to 48V Operation, ΔVSNS=65mV, IQ=110µA, Turn-On
(CL=1nF)=220µs, Internal Charge Pump
LTC4367 100V Overvoltage, Undervoltage and Reverse Supply
Protection
2.5V ≤ VIN ≤ 60V, VOUT Protection Up to 100V,
Reverse Protection to –40V, MSOP-8, 3mm × 3mm DFN-8
LTC4368 100V Overvoltage, Undervoltage and Revernse Protection
Controller with Bidirectional Circuit Breaker
2.5V ≤ VIN ≤ 60V, VOUT Protection Up to 100V,
Reverse Protection to –40V, MSOP-8, 3mm × 3mm DFN-8
LTC4364 Surge Stopper with Ideal Diode 4V to 80V Operation, ΔVSNS=50mV, IQ=425µA, Turn-On
(CL=1nF)=500µs, Internal Charge Pump
LTC7860 High Efficiency Switching Surge Stopper 4V to 60V Operation, ΔVSNS=95mV, IQ=370µA, PMOS Driver
LTC4231 Micropower Hot Swap Controller 2.7V to 36V Operation, ΔVSNS=50mV, IQ=4µA, Turn-On
(CL=1nF)=1ms, Internal Charge Pump
LTC3895 150V Low IQ, Synchronous Step-Down DC/DC Controller PLL Fixed Frequency 50kHz to 900kHz, 4V ≤ VIN ≤ 140V,
0.8V≤VOUT≤60V, IQ=40µA
LTC4380 Low Quiescent Current Surge Stopper 4V to 80V Operation, ΔVSNS=50mV, IQ=8µA, Turn-On=5ms,
Internal Charge Pump
LTC3639 High Efficiency, 150V 100mA Synchronous Step-Down
Regulator
Integrated Power MOSFETs, 4V ≤ VIN ≤ 150V, 0.8V≤VOUT≤VIN,
IQ=12µA, MSOP-16(12)
0.1µF
1µF
VS-12CWQ10FN 48V, 500W MOTOR
BAS116L
7000 TA07
LTC7000
0.004Ω
BSC12DN20NS3G
LOAD
40V TO 60V
8A CONTINUOUS MAX
VIN
40V TO 60V
(150V TOLERANT)
100k
M
100Ω
GND
OVLO
TIMER
ISET
VCCUV
INP
IMON
1nF
100k
86.6k
590k
6.04k
12.1k
SNS+
SNS–
TGUP
TGDN
VIN
RUN
TS
BST
VCC
FAULT
PWM –20kHz
Protected Motor Driver