© Semiconductor Components Industries, LLC, 2012
February, 2012 Rev. 10
1Publication Order Number:
NCP380/D
NCP380, NCV380
Fixed / Adjustable Current-
Limiting Power-Distribution
Switches
The NCP380 is a high side powerdistribution switch designed for
applications where heavy capacitive loads and shortcircuits are likely
to be encountered. The device includes an integrated 55 mW (DFN
package), Pchannel MOSFET. The device limits the output current to
a desired level by switching into a constantcurrent regulation mode
when the output load exceeds the currentlimit threshold or a short is
present. The currentlimit threshold is either user adjustable between
100 mA and 2.1 A via an external resistor or internally fixed. The
powerswitch rise and fall times are controlled to minimize current
ringing during switching.
An internal reversevoltage detection comparator disables the
powerswitch if the output voltage is higher than the input voltage to
protect devices on the input side of the switch.
The FLAG logic output asserts low during over current,
reversevoltage or over temperature conditions. The switch is
controlled by a logic enable input active high or low.
Features
2.5 V – 5.5 V Operating Range
70 mW HighSide MOSFET
Current Limit:
User adjustable from 100 mA to 2.1 A
Fixed 500 mA, 1 A, 1.5 A, 2 A and 2.1 A
Under Voltage Lockout (UVLO)
Builtin Softstart
Thermal Protection
Soft Turnoff
Reverse Voltage Protection
Junction Temperature Range: 40°C to 125°C
Enable Active High or Low (EN or EN)
Compliance to IEC6100042 (Level 4)
8.0 kV (Contact)
15 kV (Air)
UL Listed File No. E343275
AECQ100 Qualified and PPAP Capable
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements
These are PbFree Devices
Typical Applications
Laptops
USB Ports/Hubs
TVs
UDFN6
MU SUFFIX
CASE 517AB
MARKING
DIAGRAMS
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XX M
1
2
3
6
5
4
1
5
TSOP5
SN SUFFIX
CASE 483
1
5
XXXAYWG
G
(Note: Microdot may be in either location)
1
TSOP6
SN SUFFIX
CASE 318G
XXX = Specific Device Code
A =Assembly Location
M = Date Code
Y = Year
W = Work Week
G= PbFree Package
XXXAYWG
G
1
See detailed ordering and shipping information in the package
dimensions section on page 21 of this data sheet.
ORDERING INFORMATION
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IN OUT
EN
ILIM*
GND
NCP380
USB
Port
GND
D+
D
VBUS
Rlim
USB INPUT
5V
EN
FLAG
USB
DATA
Rfault
*
Figure 1. Typical Application Circuit
100 kW1 mF120 mF
FLAG
*For adjustable version only.
(Top view)
Figure 2. Pin Connections
1
2
3
6
5
4
OUT
ILIM*
FLAG
IN
GND
EN
PAD1
UDFN6
OUT
GND
FLAG
IN
EN
1
2
3
5
4
TSOP5
1
2
3
6
4
OUT
ILIM*
5
FLAG
IN
GND
EN
TSOP6
*For adjustable version only, otherwise not connected.
PIN FUNCTION DESCRIPTION
Pin Name Type Description
EN INPUT Enable input, logic low/high (i.e. EN or EN) turns on power switch
GND POWER Ground connection;
IN POWER Powerswitch input voltage; connect a 1 mF or greater ceramic capacitor from IN to GND as close as
possible to the IC.
FLAG OUTPUT Activelow opendrain output, asserted during overcurrent, overtemperature or reversevoltage condi-
tions. Connect a 10 kW or greater resistor pullup, otherwise leave unconnected.
OUT OUTPUT Powerswitch output; connect a 1 mF ceramic capacitor from OUT to GND as close as possible to the IC
is recommended. A 1 mF or greater ceramic capacitor from OUT to GND must be connected if the USB
requirement (i.e.120 mF capacitor minimum) is not met.
ILIM* INPUT External resistor used to set currentlimit threshold; recommended 5 kW < RILIM < 250 kW.
PAD1** THERMAL Exposed Thermal Pad: Must be soldered to PCB Ground plane
*(For adjustable version only, otherwise not connected.
**For DFN version only.
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MAXIMUM RATINGS
Rating Symbol Value Unit
From IN to OUT Pins: Input/Output (Note 1) VIN , VOUT 7.0 to +7.0 V
IN, OUT, EN, ILIM, FLAG, Pins: Input/Output (Note 1) VEN, VILIM, VFLAG, VIN, VOUT 0.3 to +7.0 V
FLAG sink current ISINK 1 mA
ILIM source current ILIM 1 mA
ESD Withstand Voltage (IEC 6100042) (output only, when
bypassed with 1.0 mF capacitor minimum)
ESD IEC 15 Air, 8 contact kV
Human Body Model (HBM) ESD Rating (Note 2) ESD HBM 2000 V
Machine Model (MM) ESD Rating (Notes 2 and 3) ESD MM 200 V
Latchup protection (Note 4)
Pins IN, OUT, EN, ILIM, FLAG
LU
100
mA
Maximum Junction Temperature Range (Note 6) TJ40 to +TSD °C
Storage Temperature Range TSTG 40 to +150 °C
Moisture Sensitivity (Note 5) MSL Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. According to JEDEC standard JESD22A108.
2. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) $2.0 kV per JEDEC standard: JESD22A114 for all pins.
Machine Model (MM) $200 V per JEDEC standard: JESD22A115 for all pins.
3. Except EN pin, 150 V.
4. Latch up Current Maximum Rating: $100 mA per JEDEC standard: JESD78 class II.
5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: JSTD020.
6. A thermal shutdown protection avoids irreversible damage on the device due to power dissipation.
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OPERATING CONDITIONS
Symbol Parameter Conditions Min Typ Max Unit
VIN Operational Power Supply 2.5 5.5 V
VEN Enable Voltage 0 5.5
TAAmbient Temperature Range 40 25 +85 °C
TJJunction Temperature Range 40 25 +125 °C
RILIM Resistor from ILIM to GND pin 5.0 250 kW
ISINK FLAG sink current 1.0 mA
CIN Decoupling input capacitor 1.0 mF
COUT Decoupling output capacitor USB port per Hub 120 mF
RqJA Thermal Resistance JunctiontoAir UDFN6 package (Notes 7 and 8) 120 °C/W
TSOP5 package (Notes 7 and 8) 305 °C/W
TSOP6 package (Notes 7 and 8) 280 °C/W
IOUT Maximum DC current UDFN6 package 2.1 A
TSOP5, TSOP6 package 1.0 A
PDPower Dissipation Rating (Note 9) TA v 25°CUDFN6 package 830 mW
TSOP5 package 325 mW
TSOP6 package 350 mW
TA = 85°CUDFN6 package 325 mW
TSOP5 package 130 mW
TSOP6 package 145 mW
7. A thermal shutdown protection avoids irreversible damage on the device due to power dissipation.
8. The RqJA is dependent of the PCB heat dissipation. Board used to drive this data was a 2” x 2” NCP380EVB board. It is a 2 layers board
with 2once copper traces on top and bottom of the board. Exposed pad is connected to ground plane for UDFN6 version only.
9. The maximum power dissipation (PD) is given by the following formula:
PD+
TJMAX *TA
RqJA
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ELECTRICAL CHARACTERISTICS Min & Max Limits apply for TA between 40°C to +85°C and TJ up to + 125°C for VIN between
2.5 V to 5.5V (Unless otherwise noted). Typical values are referenced to TA = + 25°C and VIN = 5 V.
Symbol Parameter Conditions Min Typ Max Unit
POWER SWITCH
RDS(on) Static drainsource onstate
resistance DFN Package
TSOP Package
VIN = 5 V –40°C < TJ < 125°C 55 75 mW
2.5 V < VIN < 5.5 V –40°C < TJ < 125°C110
VIN = 5 V –40°C < TJ < 125°C 70 95 mW
2.5 V < VIN < 5.5 V –40°C < TJ < 125°C 135
TROutput rise time VIN = 5 V CLOAD = 1 mF,
RLOAD = 100 W (Note 10)
0.3 1.0 1.5 ms
VIN = 2.5 V 0.2 0.65 1.0
TFOutput fall time VIN = 5 V 0.1 0.5
VIN = 2.5 V 0.1 0.5
ENABLE INPUT EN OR EN
VIH Highlevel input voltage 1.2 V
VIL Lowlevel input voltage 0.4 V
IEN Input current VEN = 0 V, VEN = 5 V 0.5 0.5 mA
TON Turn on time CLOAD = 1 mF, R LOAD = 100 W (Note 11) 2.0 3.0 4.0 ms
TOFF Turn off time 1.0 3.0 ms
CURRENT LIMIT
IOCP Currentlimit threshold
(Maximum DC output current
IOUT delivered to load)
VIN = 5 V RILIM = 20 kW (Note 11) 1.02 1.20 1.38 A
RILIM = 40 kW
(Notes 11 and 13)
0.595 0.700 0.805
Fixed 0.5 A (Note 12) 0.5 0.58 0.65 A
Fixed 1.0 A (Note 12) 1.0 1.15 1.3
Fixed 1.5 A (Note 12) 1.5 1.75 1.9
Fixed 2.0 A (Note 12) 2.0 2.25 2.5
Fixed 2.1 A (Note 12) 2.1 2.25 2.5
TDET Response time to short circuit VIN = 5 V 2.0 ms
TREG Regulation time 1.8 3.0 4.0 ms
TOCP Overcurrent protection time 14 20 26 ms
REVERSEVOLTAGE PROTECTION
VREV Reversevoltage comparator trip
point (VOUT – VIN)
100 mV
TREV Time from reversevoltage
condition to MOSFET switch off
& FLAG low
VIN = 5 V 4.0 6.0 9.0 ms
TRREV Rearming Time 7.0 10 15 ms
UNDERVOLTAGE LOCKOUT
VUVLO IN pin lowlevel input voltage VIN rising 2.0 2.3 2.4 V
VHYST IN pin hysteresis TJ = 25°C 25 60 mV
TRUVLO Rearming Time 7.0 10 15 ms
SUPPLY CURRENT
IINOFF Lowlevel output supply current. VIN = 5 V, No load on OUT, Device OFF
VEN = 0 V or VEN = 5 V
1.0 2.1 mA
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ELECTRICAL CHARACTERISTICS Min & Max Limits apply for TA between 40°C to +85°C and TJ up to + 125°C for VIN between
2.5 V to 5.5V (Unless otherwise noted). Typical values are referenced to TA = + 25°C and VIN = 5 V.
Symbol UnitMaxTypMinConditionsParameter
SUPPLY CURRENT
IINON Highlevel output supply current. VIN = 5 V, device enable
2 A and 2.1 A versions
1 A and 1.5 A current versions
0.5 A current version
90
80
70
mA
IREV Reverse leakage current VOUT = 5 V, VIN = 0 V TJ = 25°C 1.0 mA
FLAG PIN
VOL FLAG output low voltage IFLAG = 1 mA 400 mV
ILEAK Offstate leakage VFLAG = 5 V 1.0 mA
TFLG FLAG deglitch FLAG deassertion time due to overcurrent or
reverse voltage condition
4.0 6.0 9.0 ms
TFOCP FLAG deglitch FLAG assertion due to overcurrent 6.0 8.0 12 ms
THERMAL SHUTDOWN
TSD Thermal shutdown threshold 140 °C
TSDOCP Thermal regulation threshold 125 °C
TRSD Thermal shutdown rearming
threshold
115 °C
10.Parameters are guaranteed for CLOAD and RLOAD connected to the OUT pin with respect to the ground, See Figure 3.
11. Adjustable current version, RILIM tolerance ±1%.
12.Fixed current version.
13.Not production test, guaranteed by characterization.
IN OUT
GND
NCP380 CLOAD RLOAD
VIN
1mF
Figure 3. Test Configuration
TON
TOFF
50%
90%
10%
VEN
VEN
VOUT
90%
10%
VOUT
10%
TRTF
Figure 4. Voltage Waveform
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BLOCK DIAGRAM
Gate Driver
UVLO
Vref
TSD
Control logic
and timer
EN block
Flag
Osc
IN OUT
/FLAG
GND
EN
Blocking control
Current
Limiter
ILIM*
Figure 5. Block Diagram
*For adjustable version only, otherwise not connected.
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Ton + TR
Figure 6. Ton Delay and Trise Time
Toff + Tfall
Figure 7. Toff Delay and Tfall
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Figure 8. Turn On a Short
Treg
TOCP
TSD
Warning
Figure 9. 2 W Short on Output. Complete Regulation Sequence
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Figure 10. OCP Regulation and TSD Warning Event
TFOCP
TSD Warning
Treg
TOCP
Figure 11. Timer Regulation Sequence During 2 W Overload
VIN
VOUT
IIN
/FLAG
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Figure 12. Direct Short on OUT Pin
Figure 13. From Timer Regulation to Load Removal Sequence
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TFOCP
Figure 14. From No Load to Direct Short Circuit
VREV
TFREV
Figure 15. Reverse Voltage Detection
VOUT
IOUT
/FLAG
VOUT
VIN
/FLAG
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T RREV
Figure 16. Reverse Voltage Removal
Figure 17. Undervoltage Threshold (Falling) and Hysteresis
TEMPERATURE (°C)
UVLO (V)
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LowLevel Output Supply Current vs Vin
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.4 2.9 3.4 3.9 4.4 4.9 5.4
Vin(V)
IINOFF (mA)
40°C 25°C 85°C 125°C
Figure 18. Standby Current vs Vin
HighLevel Output Supply Current vs Vin
0
10
20
30
40
50
60
70
80
90
100
2.4 2.9 3.4 3.9 4.4 4.9 5.4
Vin(V)
IINON (mA)
40°C 25°C 85°C 125°C
Figure 19. Quiescent Current vs Vin
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Figure 20. RDS(on) vs Temperature, TSOP Package
Figure 21. RDS(on) vs Temperature, mDFN Package
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FUNCTIONAL DESCRIPTION
Overview
The NCP380 is a high side P channel MOSFET power
distribution switch designed to protect the input supply
voltage in case of heavy capacitive loads, short circuit or
over current. In addition, the high side MOSFET is turned
off during under voltage, thermal shutdown or reverse
voltage condition. Adjustable version allows the user to
program the current limit threshold using an external
resistor. Thanks to the soft start circuitry, NCP380 is able to
limit large current and voltage surges.
Overcurrent Protection
NCP380 switches into a constant current regulation mode
when the output current is above the IOCP threshold.
Depending on the load, the output voltage is decreased
accordingly.
In case of hot plug with heavy capacitive load, the
output voltage is brought down to the capacitor voltage.
The NCP380 will limit the current to the IOCP threshold
value until the charge of the capacitor is completed.
VOUT
IOCP
IOUT
Drop due to
capacitor charge
Figure 22. Heavy capacitive load
In case of overload, the current is limited to the IOCP
value and the voltage value is reduced according to the
load by the following relation:
VOUT +RLOAD IOCP (eq. 1)
VOUT
IOCP
IOUT
IOCP x RLOAD
Figure 23. Overload
In case of short circuit or huge load, the current is
limited to the IOCP value within TDET time until the
short condition is removed. If the output remains
shorted or tied to a very low voltage, the junction
temperature of the chip exceeds TSDOCP value and the
device enters in thermal shutdown (MOSFET is
turnedoff).
VOUT
IOCP
IOUT
Thermal
Regulation
Threshold
Timer
Regulation
Mode
TREGTOCP
Figure 24. Short circuit
Then, the device enters in timer regulation mode, described
in 2 phases:
Offphase: Power MOSFET is off during TOCP to allow
the die temperature to drop.
Onphase: regulation current mode during TREG. The
current is regulated to the IOCP level.
The timer regulation mode allows the device to handle
high thermal dissipation (in case of short circuit for
example) within temperature operating condition.
NCP380 stays in onphase/offphase loop until the over
current condition is removed or enable pin is toggled.
Remark: Other regulation modes can be available for
different applications. Please contact our On Semiconductor
representative for availability.
FLAG Indicator
The FLAG pin is an opendrain MOSFET asserted low
during over current, reversevoltage or over temperature
conditions. When an over current or a reverse voltage fault
is detected on the power path, FLAG pin is asserted low at
the end of the associate deglitch time (see electrical
characteristics). Thanks to this feature, the FLAG pin is not
tied low during the charge of a heavy capacitive load or a
voltage transient on output. Deglitch time is TFOCP for over
current fault and TREV for reverse voltage. The FLAG pin
remains low until the fault is removed. Then, the FLAG pin
goes high at the end of TFGL.
Undervoltage Lockout
Thanks to a builtin under voltage lockout (UVLO)
circuitry, the output remains disconnected from input until
VIN voltage is below VUVLO. When VIN voltage is above
VUVLO, the system try to reconnect the output after a
rearming time. TRUVLO. This circuit has a VHYST hysteresis
witch provides noise immunity to transient.
Thermal Sense
Thermal shutdown turns off the power MOSFET if the die
temperature exceeds TSD. A Hysteresis prevents the part
from turning on until the die temperature cools at TRSD.
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Reverse Voltage Protection
When the output voltage exceeds the input voltage by
VREV voltage during TREV
, the reverse voltage circuitry
disconnects the output in order to protect the power supply.
The same time TREV is needed to turn on again the power
MOS plus a rearming time TRREV.
Enable Input
Enable pin must be driven by a logic signal (CMOS or
TTL compatible) or connected to the GND or VIN. A logic
low on EN or high on EN turnson the device. A logic high
on EN or low on EN turns off device and reduces the current
consumption down to IINOFF.
Blocking Control
The blocking control circuitry switches the bulk of the
power MOS. When the part is off, the body diode limits the
leakage current IREV from OUT to IN. In this mode, anode
of the body diode is connected to IN pin and cathode is
connected to OUT pin. In operating condition, anode of the
body diode is connected to OUT pin and cathode is
connected to IN pin preventing the discharge of the power
supply.
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APPLICATION INFORMATION
Power Dissipation
The junction temperature of the device depends on
different contributing factors such as board layout, ambient
temperature, device environment, etc... Yet, the main
contributor in terms of junction temperature is the power
dissipation of the power MOSFET. Assuming this, the
power dissipation and the junction temperature in normal
mode can be calculated with the following equations:
RD+RDS(on) ǒIOUTǓ2
(eq. 2)
PD = Power dissipation (W)
RDS(on) = Power MOSFET on resistance (W)
IOUT = Output current (A)
TJ+PD RqJA )TA(eq. 3)
TJ= Junction temperature (°C)
RqJA = Package thermal resistance (°C/W)
TA= Ambient temperature (°C)
Power dissipation in regulation mode can be calculated by
taking into account the drop VIN VOUT link to the load by
the following relation:
PD+ǒVIN *RLOAD IOCPǓ IOCP (eq. 4)
PD= Power dissipation (W)
VIN = Input Voltage (V)
RLOAD = Load Resistance (W)
IOCP = Output regulated current (A)
Adjustable Current-Limit Programming (for adjustable
version only)
The NCP380xMUAJAA and NCP380xSNAJAA,
respectively mDFN and TSOP6 packages, are proposed to
have current limit flexibility for end Customer. Indeed, Ilim
pin is available to connect pull down resistor to ground,
which participate to the current threshold adjustment. It’s
strongly recommended to use 0.1 or 1% resistor tolerance to
keep the over current accuracy.
For this resistance selection, Customer should define first
of all, the USB current to sustain, without the device enters
in the protection sequence. Main rule is to select this pull
down resistor in order to make sure min current limit is
above the USB current to provide continuously to the
upstream accessory.
Following, the main table selection contains the USB
current port for the accessory, the standard resistor selection
and typical /max over current threshold.
Table 1. RESISTOR SELECTION FOR ADJUSTABLE CURRENT LIMIT VERSION
Min Current
Limit Value
(A)
Theoric Resistor Value
(kW)
Selected Resistor Value
(kW)
1% or 0.1%
Typical OCP Target Value
(A)
Maximum Current
Value
(A)
0.5 44.2 44.2 0.59 0.67
0.6 37.5 37.4 0.71 0.81
0.7 32.2 31.6 0.825 0.95
0.8 27.7 27.4 0.94 1.08
0.9 24.0 23.7 1.06 1.22
1.0 21.0 21 1.18 1.35
1.1 18.5 18.2 1.3 1.49
1.2 16.6 16.5 1.41 1.62
1.3 14.6 14.3 1.53 1.76
1.4 13.0 13 1.65 1.9
1.5 11.4 11.3 1.78 2.05
1.6 10.4 10.2 1.88 2.17
1.7 9.2 9.09 2.01 2.31
1.8 8.3 8.25 2.12 2.438
1.9 7.4 7.32 2.23 2.56
2.0 6.5 6.49 2.36 2.7
2.1 5.6 5.49 2.48 2.85
The “Min current limit Value” column, represents the DC
current to provide to the accessory without over current
activation.
Second column is the theoretical resistor value obtained
with following formula to achieve typical current target:
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Rlim +5.2959 * ILIM5)45.256 * ILIM4*155.25 * ILIM3)274.39 * ILIM2*267.6 * ILIM )134.21
Figure 25. Rlim Curve versus Current Limit
When the resistor is choosing to fit with the Customer
application, the limits of the over current threshold can be
calculated with the following formula:
)0.0000009 (Rlim *22.375)4
IOCP min +1.6915129 *0.0330328 Rlim )0.0011207(Rlim *22.375)2*0.0000451 (Rlim *22.375)3
IOCP max +2.2885175 *0.0446914 Rlim )0.0015163(Rlim *22.375)2*0.000061 (Rlim *22.375)3
)0.0000012 (Rlim *22.375)4
IOCPtyp +1.9900152 *0.0388621 Rlim )0.0013185(Rlim *22.375)2*0.0000531 (Rlim *22.375)3
)0.0000011 (Rlim *22.375)4
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The minimum, typical and maximum current curves are described in the following graph:
Figure 26. Current Threshold vs Rlim Resistor
That is recommended to respect 6 kW 47 kW resistor
range for two reasons.
For the low resistor values, the current limit is pushed up
to high current level. Due to internal power dissipation
capability, a maximum of 2.4 A typical can be set for the
mDFN package if thermal consideration are respected. For
the TSOP6 version 1.2 A is the maximum recommended
value because the part could enter in thermal shutdown
mode before constant current regulation mode.
In the other side, if we want to keep 15% of accuracy, high
resistor values can be used up to 50 kW. With higher value,
the current threshold is lower than 500 mA, so in this case
degraded accuracy can be observed.
PCB Recommendations
The NCP380 integrates a PMOS FET rated up to 2 A, and
the PCB design rules must be respected to properly evacuate
the heat out of the silicon. The UDFN6 PAD1 must be
connected to ground plane to increase the heat transfer if
necessary. This pad must be connected to ground plane. By
increasing PCB area, the RqJA of the package can be
decreased, allowing higher power dissipation.
Figure 27. USB Host Typical Application
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ORDERING INFORMATION
Device Marking
Active
Enable
Level
Over
Current
Limit Evaluation Board
UL
Listed
CB
Scheme Package Shipping
NCP380LSNAJAAT1G AAC
Low
Adj. NCP380LSNAJAG
EVB
Y Y TSOP6
(PbFree)
3000
Tape / Reel
NCP380LSN05AAT1G AC5 0.5 A NCP380LSN05AG
EVB
Y Y
TSOP5
(PbFree)
NCP380LSN10AAT1G AC6 1.0 A NCP380LSN10AG
EVB
Y Y
NCP380LMUAJAATBG AAC Adj. NCP380LMUAJA
GEVB
N Y
UDFN6
(PbFree)
NCP380LMU05AATBG AE 0.5 A NCP380LMU05A
GEVB
Y Y
NCP380LMU10AATBG AF 1.0 A NCP380LMU10A
GEVB
Y Y
NCP380LMU15AATBG AG 1.5 A NCP380LMU15A
GEVB
Y Y
NCP380LMU20AATBG AL 2.0 A NCP380LMU20A
GEVB
N N
NCP380HSNAJAAT1G AAD
High
Adj. NCP380HSNAJA
GEVB
Y Y TSOP6
(PbFree)
NCP380HSN05AAT1G AC7 0.5 A NCP380HSN05A
GEVB
Y Y
TSOP5
(PbFree)
NCP380HSN10AAT1G ADA 1.0 A NCP380HSN10A
GEVB
Y Y
NCP380HMUAJAATBG AC Adj. NCP380HMUAJA
GEVB
N Y
UDFN6
(PbFree)
NCP380HMU05AATBG AH 0.5 A NCP380HMU05A
GEVB
Y Y
NCP380HMU10AATBG AJ 1.0 A NCP380HMU10A
GEVB
Y Y
NCP380HMU15AATBG AK 1.5 A NCP380HMU15A
GEVB
Y Y
NCP380HMU20AATBG AM 2.0 A NCP380HMU20A
GEVB
N N
NCP380HMU21AATBG AU 2.1 A NCP380HMU21A
GEVB
N N
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements.
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PACKAGE DIMENSIONS
ÍÍÍ
ÍÍÍ
ÍÍÍ
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
C
A
SEATING
PLANE
D
B
E
0.10 C
A3
A
A1
2X
2X 0.10 C
UDFN6 2x2, 0.65P
CASE 517AB
ISSUE B
DIM
A
MIN MAX
MILLIMETERS
0.45 0.55
A1 0.00 0.05
A3 0.127 REF
b0.25 0.35
D2.00 BSC
D2 1.50 1.70
0.80 1.00
E2.00 BSC
E2
e0.65 BSC
K
0.25 0.35
L
PIN ONE
REFERENCE
0.08 C
0.10 C
6X
A0.10 C
Le
E2
b
B
3
6
6X
1
K4
6X
6X
0.05 C
4X
D2
BOTTOM VIEW
0.20 ---
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.47
0.40
0.65
1.70
2.30
1
DIMENSIONS: MILLIMETERS
6X
0.95
PITCH
6X
NCP380, NCV380
http://onsemi.com
23
PACKAGE DIMENSIONS
TSOP5
CASE 48302
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
5. OPTIONAL CONSTRUCTION: AN
ADDITIONAL TRIMMED LEAD IS ALLOWED
IN THIS LOCATION. TRIMMED LEAD NOT TO
EXTEND MORE THAN 0.2 FROM BODY.
DIM MIN MAX
MILLIMETERS
A3.00 BSC
B1.50 BSC
C0.90 1.10
D0.25 0.50
G0.95 BSC
H0.01 0.10
J0.10 0.26
K0.20 0.60
L1.25 1.55
M0 10
S2.50 3.00
123
54 S
A
G
L
B
D
H
C
J
__
0.7
0.028
1.0
0.039
ǒmm
inchesǓ
SCALE 10:1
0.95
0.037
2.4
0.094
1.9
0.074
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.20
5X
CAB
T0.10
2X
2X T0.20
NOTE 5
T
SEATING
PLANE
0.05
K
M
DETAIL Z
DETAIL Z
NCP380, NCV380
http://onsemi.com
24
PACKAGE DIMENSIONS
ÉÉÉ
TSOP6
CASE 318G02
ISSUE U
23
456
D
1
e
b
E1
A1
A
0.05
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM
LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR
GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D
AND E1 ARE DETERMINED AT DATUM H.
5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE.
c
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
DIM
A
MIN NOM MAX
MILLIMETERS
0.90 1.00 1.10
A1 0.01 0.06 0.10
b0.25 0.38 0.50
c0.10 0.18 0.26
D2.90 3.00 3.10
E2.50 2.75 3.00
e0.85 0.95 1.05
L0.20 0.40 0.60
0.25 BSC
L2
0°10°
1.30 1.50 1.70
E1
E
RECOMMENDED
NOTE 5
L
C
M
H
L2
SEATING
PLANE
GAUGE
PLANE
DETAIL Z
DETAIL Z
0.60
6X
3.20 0.95
6X
0.95
PITCH
DIMENSIONS: MILLIMETERS
M
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
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NCP380/D
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