2009 Fairchild Semiconductor Corporation
FDG6332C_F085 Rev C2 (W)
FDG6332C_F085
20V N & P-Channel PowerTrench MOSFETs
Features
• Q1 0.7 A, 20V. RDS(ON) = 300 mΩ @ VGS = 4.5 V
RDS(ON) = 400 mΩ @ VGS = 2.5 V
• Q2 –0.6 A, –20V. RDS(ON) = 420 mΩ @ VGS = –4.5 V
RDS(ON) = 630 mΩ @ VGS = –2.5 V
• Low gate charge
• High performance trench technology for extremely
low RDS(ON)
• SC70-6 package: small footprint (51% smaller than
SSOT-6); low profile (1mm thick)
SGD
DGS
Pin 1
SC70-6 Complementary
6
5
43
2
1
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Q1 Q2 Units
VDSS Drain-Source Voltage 20 –20 V
VGSS Gate-Source Voltage ±12 ±12 V
IDDrain Current – Continuous (Note 1) 0.7 –0.6 A
– Pulsed 2.1 –2
PDPower Dissipation for Single Operation (Note 1) 0.3 W
TJ, TSTG Operating and Storage Junction Temperature Range –55 to +150 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 415 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.32 FDG6332C_F085 7’’ 8mm 3000 units
FDG6332C_F085 20V N & P-Channel PowerTrench MOSFETs
March 2009
• Qualified to AEC Q101
• RoHS Compliant
General Description
The N & P-Channel MOSFETs are produced using
Fairchild Semiconductor’s advanced PowerTrench
process that has been especially tailored to minimize
on-state resistance and yet maintain superior
switching performance.
These devices have been designed to offer
exceptional power dissipation in a very small footprint
for applications where the bigger more expensive
TSSOP-8 and SSOP-6 packages are impractical.
Applications
• DC/DC converter
• Load switch
• LCD display inverter
FDG6332C_F085 Rev C2 (W)
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA
V
GS
= 0 V, I
D
= –250 µAQ1
Q2 20
–20 V
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient ID = 250 µA,Ref. to 25°C
ID = –250 µA,Ref. to 25°CQ1
Q2 14
–14 mV/°C
IDSS Zero Gate Voltage Drain Current V
DS
= 16 V, V
GS
= 0 V
V
DS
= –16 V, V
GS
= 0 V Q1
Q2 1
–1 µA
I
GSSF
/I
GSSR
Gate–Body Leakage, Forward VGS = ± 12 V, VDS = 0 V ±100 nA
I
GSSF
/I
GSSR
Gate–Body Leakage, Reverse VGS = ± 12V , VDS = 0 V ±100 nA
On Characteristics (Note 2)
VGS(th)Q1 VDS = VGS, ID = 250 µA0.6 1.1 1.5Gate Threshold Voltage
Q2 VDS = VGS, ID = –250 µA-0.6 –1.2 –1.5
V
∆VGS(th)
∆TJ
Gate Threshold Voltage
Temperature Coefficient Q1
Q2 ID = 250 µA,Ref. To 25°C
ID = –250 µA,Ref. to 25°C–2.8
3mV/°C
RDS(on) Q1 VGS = 4.5 V, ID =0.7 A
VGS = 2.5 V, ID =0.6 A
VGS = 4.5 V, ID =0.7A,TJ=125°C
180
293
247
300
400
442
Static Drain–Source
On–Resistance
Q2 VGS = –4.5 V, ID = –0.6 A
VGS = –2.5 V, ID = –0.5 A
VGS=–4.5 V, ID =–0.6 A,TJ=125°C
300
470
400
420
630
700
mΩ
gFS Q1 VDS = 5 V ID = 0.7 A 2.8
Forward Transconductance
Q2 VDS = –5 V ID = –0.6A 1.8 S
ID(on) Q1 VGS = 4.5 V, VDS = 5 V 1On–State Drain Current
Q2 VGS = –4.5 V, VDS = –5 V –2 A
Dynamic Characteristics
Ciss Q1 VDS=10 V, V GS= 0 V, f=1.0MHz 113
Input Capacitance Q2 VDS=–10 V, V GS= 0 V, f=1.0MHz 114 pF
Coss Q1 VDS=10 V, V GS= 0 V, f=1.0MHz 34Output Capacitance
Q2 VDS=–10 V, V GS= 0 V, f=1.0MHz 24 pF
Crss Q1 VDS=10 V, V GS= 0 V, f=1.0MHz 16Reverse Transfer Capacitance
Q2 VDS=–10 V, V GS= 0 V, f=1.0MHz 9pF
Switching Characteristics (Note 2)
td(on) Q1 5 10
Turn–On Delay Time Q2 5.5 11 ns
trQ1 7 15
Turn–On Rise Time Q2 14 25 ns
td(off) Q1 9 18
Turn–Off Delay Time Q2 6 12 ns
tfQ1 1.5 3
Turn–Off Fall Time Q2
For Q1:
VDS =10 V, I D= 1 A
VGS= 4.5 V, RGEN = 6 Ω
For Q2:
VDS =–10 V, I D= –1 A
VGS= –4.5 V, RGEN = 6 Ω
1.7 3.4 ns
QgQ1 1.1 1.5
Total Gate Charge Q2 1.4 2nC
Qgs Q1 0.24
Gate–Source Charge Q2 0.3 nC
Qgd Q1 0.3
Gate–Drain Charge Q2
For Q1:
VDS =10 V, I D= 0.7 A
VGS= 4.5 V, RGEN = 6 Ω
For Q2:
VDS =–10 V, I D= –0.6 A
VGS= –4.5 V, RGEN = 6 Ω0.4 nC
FDG6332C_F085 20V N & P-Channel PowerTrench MOSFETs
FDG6332C_F085 Rev C2 (W)
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Drain–Source Diode Characteristics and Maximum Ratings
ISQ1 0.25
Maximum Continuous Drain–Source Diode Forward Current Q2 –0.25 A
VSD Q1 VGS = 0 V, IS = 0.25 A (Note 2) 0.74 1.2
Drain–Source Diode Forward
Voltage Q2 VGS = 0 V, IS = –0.25 A (Note 2) –0.77 –1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design. RθJA = 415°C/W when mounted on a minimum pad of FR-4
PCB in a still air environment.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDG6332C_F085 20V N & P-Channel PowerTrench MOSFETs
FDG6332C_F085 Rev C2 (W)
Typical Characteristics: N-Channel
0
1
2
3
4
01234
VDS, DRAIN-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
2.0V
3.0V
VGS=4.5V
2.5V
3.5V
0.8
1
1.2
1.4
1.6
1.8
0 1 2 3 4
ID, DRAIN CURRENT (A)
R
DS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = 2.5V
3.0V
4.0V
3.5V
4.5V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
-50 -25 025 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
R
DS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID =0.7A
VGS = 4.5V
0
0.2
0.4
0.6
0.8
1 2 3 4 5
VGS, GATE TO SOURCE VOLTAGE (V)
RDS(ON), ON-RESISTANCE (OHM)
ID =0.4A
TA = 125oC
TA = 25oC
Figure 3. On-Resistance Variation with
Temperature. Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
0.5
1
1.5
2
2.5
0.5 11.5 22.5 3
VGS, GATE TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
TA = -55oC25oC
125oC
VDS = 5V
0.0001
0.001
0.01
0.1
1
10
00.2 0.4 0.6 0.8 11.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
TA = 125oC
25oC
-55oC
VGS = 0V
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDG6332C_F085 20V N & P-Channel PowerTrench MOSFETs
FDG6332C_F085 Rev C2 (W)
Typical Characteristics: N-Channel
0
1
2
3
4
5
00.4 0.8 1.2 1.6
Qg, GATE CHARGE (nC)
V
GS
, GATE-SOURCE VOLTAGE (V)
ID = 0.7A VDS = 5V
15V
10V
0
50
100
150
200
0 5 10 15 20
VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
CISS
CRSS
COSS
f = 1MHz
VGS = 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
0.1 110 100
VDS, DRAIN-SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
DC 1s
100ms
100µs
RDS(ON) LIMIT
VGS = 4.5V
SINGLE PULSE
RθJA = 415oC/W
TA = 25oC
10ms
1ms
0
2
4
6
8
10
0.001 0.01 0.1 110 100
t1, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 415°C/W
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
FDG6332C_F085 20V N & P-Channel PowerTrench MOSFETs
FDG6332C_F085 Rev C2 (W)
Typical Characteristics: P-Channel
0
0.4
0.8
1.2
1.6
2
01234
-VDS, DRAIN-SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
-3.5V -2.5V
-2.0V
VGS = -4.5V -3.0V
0.8
1
1.2
1.4
1.6
1.8
00.5 11.5 2
-ID, DRAIN CURRENT (A)
R
DS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = -2.5V
-3.0V
-3.5V
-4.5V
-4.0V
Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
-50 -25 025 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
R
DS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID = -0.6A
VGS = -4.5V
0.2
0.4
0.6
0.8
1
1.2
12345
-VGS, GATE TO SOURCE VOLTAGE (V)
RDS(ON), ON-RESISTANCE (OHM)
ID = -0.3 A
TA = 125oC
TA = 25oC
Figure 13. On-Resistance Variation with
Temperature. Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
0
0.5
1
1.5
2
0.5 11.5 22.5 3
-VGS, GATE TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
TA = -55oC25oC
125oC
VDS = -5V
0.0001
0.001
0.01
0.1
1
10
00.2 0.4 0.6 0.8 11.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-I
S
, REVERSE DRAIN CURRENT (A)
TA = 125oC
25oC
-55oC
VGS = 0V
Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDG6332C_F085 20V N & P-Channel PowerTrench MOSFETs
FDG6332C_F085 Rev C2 (W)
Typical Characteristics: P-Channel
0
1
2
3
4
5
00.3 0.6 0.9 1.2 1.5 1.8
Qg, GATE CHARGE (nC)
-V
GS
, GATE-SOURCE VOLTAGE (V)
ID = -0.6A VDS = -5V
-15V
-10V
0
40
80
120
160
0 5 10 15 20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
CISS
CRSS
COSS
f = 1MHz
VGS = 0 V
Figure 17. Gate Charge Characteristics. Figure 18. Capacitance Characteristics.
0.01
0.1
1
10
0.1 1 10 100
-VDS, DRAIN-SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
DC1s
100ms
10ms
1ms100µs
RDS(ON) LIMIT
VGS = -4.5V
SINGLE PULSE
RθJA = 415oC/W
TA = 25oC
0
2
4
6
8
10
0.001 0.01 0.1 1 10 100
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
RθJA = 415oC/W
TA = 25oC
Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 110 100
t
1
, TIME (sec)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
RθJA(t) = r(t) * RθJA
RθJA = 415 °C/W
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
P(pk)
t1t2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1.
Transient thermal response will change depending on the circuit board design.
FDG6332C_F085 20V N & P-Channel PowerTrench MOSFETs
© 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com
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