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FEATURES
DESCRIPTION
CrossSectionViewShowing ThermalPad
NC – Nointernalconnection
VCC–
1OUT
VCC+
1IN+
1IN–
NC
NC
VCC–
2OUT
VCC+
2IN+
2IN–
NC
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
(SideView)
(SideView)
MicroStar™ Junior(GQE)Package
(TopView)
P0067-01
ThermallyEnchancedTSSOP (PWP)
PowerPAD™ Package
(TopView)
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
250-mA DUAL DIFFERENTIAL LINE DRIVER
•ADSL, HDSL and VDSL Differential Line Driver•200-mA Output Current Minimum Into 50- ΩLoad
•High Speed
– 210-MHz Bandwidth (–3-dB) at 50- ΩLoad– 300-MHz Bandwidth (–3-dB) at 100- ΩLoad– 1900-V/ μs Slew Rate, G = 5•Low Distortion
– –69-dB Third-Order Harmonic Distortion atf = 1 MHz, 50- ΩLoad, and V
O(PP)
= 20 V•Independent Power Supplies for LowCrosstalk
•Wide Supply Range ±5 V to ±15 V•Thermal-Shutdown and Short-CircuitProtection
•Evaluation Module Available
The THS6022 contains two high-speed driverscapable of providing 200-mA output current(minimum) into a 50- Ωload. These drivers can beconfigured differentially to drive a 50-V p-p outputsignal over low-impedance lines. The drivers arecurrent feedback amplifiers, designed for the highslew rates necessary to support low total harmonicdistortion (THD) in xDSL applications. The THS6022is ideally suited for asymmetrical digital subscriberline (ADSL) at the remote terminal, high-data-ratedigital subscriber line (HDSL), and veryhigh-data-rate digital subscribe line (VDSL), where itsupports the high-peak voltage and currentrequirements of these applications. Separate powersupply connections for each driver are provided tominimize crosstalk.
HIGH-SPEED xDSL LINE DRIVER/RECEIVER FAMILY
DEVICE DRIVER RECEIVER DESCRIPTION
THS6002 √ √ Dual differential line drivers and receiversTHS6012 √500-mA dual differential line driverTHS6022 √250-mA dual differential line driverTHS6032 √Low-power ADSL central office line driverTHS6062 √Low-noise ADSL receiver
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PowerPAD, MicroStar Junior are trademarks of Texas Instruments.All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2007, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
HIGH-SPEED xDSL LINE DRIVER/RECEIVER FAMILY (continued)
DEVICE DRIVER RECEIVER DESCRIPTION
THS7002 √Low-noise programmable gain ADSL receiver
2
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DESCRIPTION (CONTINUED)
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
The THS6022 is packaged in the patented PowerPAD™ package. This package provides outstanding thermalcharacteristics in a small-footprint package that is fully compatible with automated surface-mount assemblyprocedures. The exposed thermal pad on the underside of the package is in direct contact with the die. Bysimply soldering the pad to the PWB copper and using other thermal outlets, the heat is conducted away fromthe junction.
AVAILABLE OPTIONS
PACKAGED DEVICET
A
PowerPAD™ PLASTIC MicroStar Junior™
EVALUATION MODULESMALL OUTLINE
(1)
(PWP) (GQE)
0°C to 70 °C THS6022CPWP THS6022CGQE THS6022EVM–40 °C to 85 °C THS6022IPWP THS6022IGQE –
(1) The PWP packages are available taped and reeled. Add an R suffix to the device type (e.g.,THS6022CPWPR)
TERMINAL FUNCTIONS
TERMINAL
PWP PACKAGE GQE PACKAGENAME
TERMINAL NO. TERMINAL NO.
1OUT 2 A31IN– 5 F11IN+ 4 D12OUT 13 A72IN– 10 F92IN+ 11 D9V
CC+
3, 12 B1, B9V
CC–
1, 14 A4, A6NC 6, 7, 8, 9 NA
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98
7
6
5
A
B
C
D
E
F
3
21
G
H
J
4
2IN+
1N+
1IN–
NC
NC
NC
NC
NC
NCNC NC NC NC
NC NC NC
NC NC NC
NC NC NC
NC NC
NC NC NC
VCC+
NCNC
NCNC
NC
NC
NCNC NC
NCNC NC
NC NC
NC NC
NC
NC
NC
NC
NC NC
NC
NC
NC
NC NCNC NC
NC
NC NC NC
NC
NC
1OUT
NC NC
2IN–
NC
NCNC
NC
VCC+
MicroStar™Junior(GQE)Package
(TopView)
NC
NCNCNC
NC
P0068-01
VCC–
VCC–
2OUT
_
+
Driver1
Driver2
_
+
3
4
5
11
10
2
1
12
13
14
VCC+
VCC+
VCC–
VCC–
1OUT
2OUT
1IN+
1IN–
2IN+
2IN–
B0247-01
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
NOTE: Shaded terminals are used for thermal connection to the ground plane.
Functional Block Diagram
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ABSOLUTE MAXIMUM RATINGS
(1)
RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
over operating free-air temperature range (unless otherwise noted)
VALUE UNIT
V
CC+
to V
CC–
Supply voltage 33 VV
I
Input voltage ±V
CC
VI
O
Output current 400 mAV
ID
Differential input voltage 6 VContinuous total power dissipation at (or below) T
A
= 25 °C 3.3 WT
A
Operating free air temperature –40 to 85 °CT
stg
Storage temperature –65 to 125 °CLead temperature, 1,6 mm (1/16 inch) from case for 10 seconds 300 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Split supply ±4.5 ±16V
CC+
and V
CC–
Supply voltage VSingle supply 9 32C suffix 0 70T
A
Operating free-air temperature °CI suffix –40 85
V
CC
=±15 V, R
L
= 50 Ω, R
F
= 1 k Ω, T
A
= 25 °C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Dynamic Performance
V
CC
=±15 V R
F
= 787 Ω210V
O
= 200 mV, G = 1
V
CC
=±5 V R
F
= 910 Ω150
V
CC
=±15 V R
F
= 787 Ω590VO = 200 mV, G = 2
V
CC
=±5 V R
F
= 910 Ω715Small-signal bandwidth (–3dB)
V
CC
=±15 V R
F
= 750 Ω300V
O
= 100 mV, G = 1
V
CC
=±5 V R
F
= 910 Ω210BW MHzV
CC
=±15 V R
F
= 620 Ω260V
O
= 100 mV, G = 2
V
CC
=±5 V R
F
= 680 Ω180
V
CC
=±15 V R
F
= 590 Ω115R
L
= 50 Ω, G = 2
V
CC
=±5 V R
F
= 715 Ω70Bandwidth for 0.1-dBflatness
V
CC
=±15 V R
F
= 620 Ω140R
L
= 100 Ω, G = 2
V
CC
=±5 V R
F
= 680 Ω80
V
CC
=±15 V, V
O(PP)
= 20 V, G = 5 1900SR Slew rate
(1)
V/ μsV
CC
=±5 V, V
O(PP)
= 5 V, G = 2 950
t
S
Settling time to 0.1% 0-V to 10-V step, G = 2, R
L
= 1 k Ω70 ns
V
CC
=±15 V, V
O
= 20 V
(PP)
30Full-power bandwidth
(2)
MHzV
CC
=±5 V, V
O
= 4 V
(PP)
75
(1) Slew rate is measured from an output level range of 25% to 75%.(2) Full power bandwidth = slew rate/2 πV
peak
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THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
ELECTRICAL CHARACTERISTICS (continued)V
CC
=±15 V, R
L
= 50 Ω, R
F
= 1 k Ω, T
A
= 25 °C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Noise/Distortion Performance
V
O(PP)
= 20 V –69f = 500 kHz
V
O(PP)
= 2 V –80V
CC
=±5 V, G = 2
V
O(PP)
= 20 V –66f = 1 MHz
V
O(PP)
= 2 V –75THD Total harmonic distortion dBcf = 500 kHz –71R
L
= 25 Ω
f = 1 MHz –65V
CC
=±5 V, V
O(PP)
= 2V, G = 2
f = 500 kHz –78R
L
= 50 Ω
f = 1 MHz –72
Input noise current,
11.5positive (IN+)I
n
V
CC
=±5 V or ±15 V G = 2 f = 10 kHz pA/ √HzInput noise current,
16negative (IN–)
V
CC
=±5 V 0.03%A
D
Differential gain error R
L
= 150 Ω, G = 2, NTSC, 40 IRE Mod.
V
CC
=±15 V 0.04%
V
CC
=±5 V 0.08 °φ
D
Differential phase error R
L
= 150 Ω, G = 2, NTSC, 40 IRE Mod.
V
CC
=±15 V 0.06 °
Crosstalk V
I
= 200 mV, f = 1 MHz –64 dB
V
n
Input voltage noise V
CC
=±5 V or ±15 V, f = 10 kHz, G = 2, single-ended 1.7 nV/ √Hz
DC Performance
(3)
T
A
= 25 °C 1 5V
IO
Input offset voltage V
CC
=±5 V or ±15 V mVT
A
= full range 7
Input offset voltage drift V
CC
=±5 V or ±15 V, T
A
= full range 20 μV/ °C
T
A
= 25 °C 0.5 4Differential input offset
V
CC
=±5 V or ±15 V mVvoltage
T
A
= full range 5
Differential input offset
V
CC
=±5 V or ±15 V, T
A
= full range 10 μV/ °Cvoltage drift
T
A
= 25 °C 1 9Input bias current, negative
T
A
= full range 12
T
A
= 25 °C 5 10I
IB
Input bias current, positive V
CC
=±5 V or ±15 V μAT
A
= full range 12
T
A
= 25 °C 1.5 8Input bias current,differential
T
A
= full range 11
V
CC
=±5 1Open-loop transresistance M ΩV
CC
=±15 V 4
Input Characteristics
(3)
V
CC
=±5±3.5 ±3.6Common-mode input voltageV
ICR
Vrange
V
CC
=±15 ±13.3 ±13.4
Common-mode rejection
62 73ratioCMRR V
CC
=±5 V or ±15 V, T
A
= full range dBDifferential common-mode
100rejection ratio
Input resistance, + input 1.5 M Ωr
i
Input resistance, – input 15 Ω
C
i
Input capacitance 1.4 pF
(3) Full range is 0 °C to 70 °C for the THS6022C, and –40 °C to 85 °C for the THS6022I.
6
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PARAMETER MEASUREMENT INFORMATION
+
–
1kW
VI
VO
50 W
50 W
1kW
Driver1
+
–
1kW
VI
VO
50 W
50 W
1kW
Driver2
S0284-01
VI
VO
+
–
RGRF
RL
50 W
50 W
VCC–
VCC+
S0285-01
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
ELECTRICAL CHARACTERISTICS (continued)V
CC
=±15 V, R
L
= 50 Ω, R
F
= 1 k Ω, T
A
= 25 °C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output Characteristics
(4)
V
CC
=±5±3±3.2single-ended R
L
= 50 Ω
V
CC
=±15 ±12 ±12.6V
O
Output voltage swing VV
CC
=±5±6±6.6differential R
L
= 100 Ω
V
CC
=±15 ±24.6 ±25.2
V
CC
=±5 V, R
L
= 5 Ω250I
O
Output current
(5)
mAV
CC
=±15, R
L
= 50 Ω200 250
I
OS
Short-circuit output current
(6)
400 mA
R
O
Output resistance Open-loop 13 Ω
Power Supply
(4)
Split supply ±4.5 ±16.5Power supply operatingV
CC
Vrange
Single supply 9 33
T
A
= 25 °C 6 8V
CC
=±5
T
A
= full range 10I
CC
Quiescent current (each driver) mAT
A
= 25 °C 7.2 9V
CC
=±15
T
A
= full range 11
T
A
= 25 °C –68 –76V
CC
=±5 dBT
A
= full range –65PSRR Power-supply rejection ratio
T
A
= 25 °C –64 –75V
CC
=±15 dBT
A
= full range –62
(4) Full range is 0 °C to 70 °C for the THS6022C, and –40 °C to 85 °C for the THS6022I.(5) Slew rate is measured from an output level range of 25% to 75%.(6) A heat sink is required to keep the junction temperature below absolute maximum when an output is heavily loaded or shorted. See theabsolute maximum ratings and Thermal Information section.
Figure 1. Input-to-Output Crosstalk Test Circuit
Figure 2. Test Circuit, Gain = 1 + (RF/RG)
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TYPICAL CHARACTERISTICS
TA − Free-Air Temperature − °C
−40 −20 0 20 40 60 80 100
|Maximum Peak-to-Peak Output Voltage Swing| − V
G002
4.0
3.0
2.0
3.5
2.5
14.0
13.5
12.5
13.0
12.0
VCC = ±15 V
50 Ω Load
VCC = ±5 V
No Load
VCC = ±5 V
50 Ω Load
VCC = ±15 V
No Load
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
Table of Graphs
FIGURE
V
O(PP)
Peak-to-peak output voltage vs Load resistance 3Maximum peak-to-peak output voltage swing vs Free-air temperature 4V
IO
Input offset voltage vs Free-air temperature 5I
IB
Input bias current vs Free-air temperature 6Positive input bias current vs Common-mode input voltage 7CMRR Common-mode rejection ratio vs Free-air temperature 8Input-to-output crosstalk vs Frequency 9PSRR Power supply rejection ratio vs Free-air temperature 10Closed-loop output impedance vs Frequency 11I
CC
Supply current vs Free-air temperature 12SF Slew rate vs Output step 13, 14V
n
Input voltage noise vs Frequency 15I
n
Input current noise vs Frequency 15Output amplitude vs Frequency 16, 17, 19–32Closed-loop output phase vs Frequency 18Small and large frequency response 33–36Single-ended output distortion vs Peak-to-peak output voltage 37, 38Harmonic distortion vs Frequency 39, 40Differential gain Number of 150- Ωloads 41, 42Differential phase Number of 150- Ωloads 43, 44400-mV output step response 45, 4720-V step response 464-V step response 48
MAXIMUM PEAK-TO-PEAKPEAK-TO-PEAK OUTPUT VOLTAGE OUTPUT VOLTAGE SWINGvs vsLOAD RESISTANCE FREE-AIR TEMPERATURE
Figure 3. Figure 4.
8
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TA − Free-Air Temperature − °C
0
1
2
3
4
5
6
7
−40 −20 0 20 40 60 80 100
IIB − Input Bias Current − µA
G004
Gain = 1
RF = 1 kΩ
  VCC = ±15 V
IIB+
VCC = ±5 V
IIB+
VCC = ±15 V
IIB−
VCC = ±5 V
IIB−
TA − Free-Air Temperature − °C
0.0
0.2
0.4
0.6
0.8
1.0
−40 −20 0 20 40 60 80 100
VIO − Input Offset Voltage − mV
G003
VCC = ±5 V
VCC = ±15 V
Gain = 1
RF = 1 kΩ
VIC − Common-Mode Input Voltage − V
−20
−15
−10
−5
0
5
10
15
20
−15 −10 −5 0 5 10 15
IIB+ − Input Bias Current − µA
G005
±15 V
TA − Free-Air Temperature − °C
60
65
70
75
80
85
90
−40 −20 0 20 40 60 80 100
CMRR − Common-Mode Rejection Ratio − dB
G006
VCC = ±5 V
1 kΩ
1 kΩ
VI+
−VO
1 kΩ
1 kΩ
VCC = ±15 V
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
INPUT OFFSET VOLTAGE INPUT BIAS CURRENTvs vsFREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 5. Figure 6.
POSITIVE INPUT BIAS CURRENT COMMON-MODE REJECTION RATIOvs vsCOMMON-MODE INPUT VOLTAGE FREE-AIR TEMPERATURE
Figure 7. Figure 8.
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TA − Free-Air Temperature − °C
72
74
76
78
80
82
84
−40 −20 0 20 40 60 80 100
PSRR − Power Supply Rejection Ratio − dB
G008
VCC+
VCC−
VCC = ±15 V or ±5 V
Gain = 1
RF = 1 kΩ
TA − Free-Air Temperature − °C
3
4
5
6
7
8
9
−40 −20 0 20 40 60 80 100
ICC − Supply Current − mA
G010
VCC = ±15 V
VCC = ±5 V
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
INPUT-TO-OUTPUT CROSSTALK POWER SUPPLY REJECTION RATIOvs vsFREQUENCY FREE-AIR TEMPERATURE
Figure 9. Figure 10.
CLOSED-LOOP OUTPUT IMPEDANCE SUPPLY CURRENTvs vsFREQUENCY FREE-AIR TEMPERATURE
Figure 11. Figure 12.
10
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100
200
300
400
500
600
700
800
900
1000
012345
Output Step − VPP
Slew Rate − V/µs
G012
+SR
RL = 25 Ω
VCC = ±5 V
Gain = 2
RF = 1 kΩ
+SR
RL = 50 Ω
−SR
RL = 25 Ω
−SR
RL = 50 Ω
f − Frequency − Hz
10 100 1k 100k
Vn − Voltage Noise − nV/√Hz
1
10
100
10k
G013
In − Current Noise − pA/√Hz
VCC = ±15 V
TA = 25°C
In+ Noise
In− Noise
Vn Noise
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
SLEW RATE SLEW RATEvs vsOUTPUT STEP OUTPUT STEP
Figure 13. Figure 14.
INPUT VOLTAGE AND CURRENT NOISEvsFREQUENCY
Figure 15.
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−7
−6
−5
−4
−3
−2
−1
0
1
2
f − Frequency − Hz
Output Amplitude − dB
100k 1M 100M 500M
G017
10M
VCC = ±15 V
Gain = 1
RL = 50 Ω
VO = 0.2 V
RF = 1 kΩ
RF = 787 Ω
RF = 560 Ω
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 16. Figure 17.
CLOSED-LOOP OUTPUT PHASE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 18. Figure 19.
12
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−7
−6
−5
−4
−3
−2
−1
0
1
2
f − Frequency − Hz
Output Amplitude − dB
100k 1M 100M 500M
G021
10M
VCC = ±15 V
Gain = −1
RL = 50 Ω
VO = 0.2 V
RF = 470 Ω
RF = 560 Ω
RF = 1 kΩ
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 20. Figure 21.
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 22. Figure 23.
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THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 24. Figure 25.
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 26. Figure 27.
14
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−7
−6
−5
−4
−3
−2
−1
0
1
2
f − Frequency − Hz
Output Amplitude − dB
100k 1M 100M 500M
G027
10M
VCC = ±15 V
Gain = 1
RL = 100 Ω
VO = 0.2 V
RF = 620 Ω
RF = 1.3 kΩ
RF = 750 Ω
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 28. Figure 29.
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 30. Figure 31.
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−30
−27
−24
−21
−18
−15
−12
−9
−6
−3
f − Frequency − Hz
Output Level − dBV
100k 1M 100M 500M
G031
10M
VI = 500 mV
VI = 250 mV
VI = 125 mV
VI = 62.5 mV
VCC = ±15 V
Gain = 1
RL = 50 Ω
RF = 787 Ω
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
OUTPUT AMPLITUDE
vsFREQUENCY
Figure 32.
SMALL AND LARGE SIGNAL FREQUENCY RESPONSE SMALL AND LARGE SIGNAL FREQUENCY RESPONSE
Figure 33. Figure 34.
16
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THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
SMALL AND LARGE SIGNAL FREQUENCY RESPONSE SMALL AND LARGE SIGNAL FREQUENCY RESPONSE
Figure 35. Figure 36.
SINGLE-ENDED OUTPUT DISTORTION SINGLE-ENDED OUTPUT DISTORTIONvs vsPEAK-TO-PEAK OUTPUT VOLTAGE PEAK-TO-PEAK OUTPUT VOLTAGE
Figure 37. Figure 38.
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−100
−90
−80
−70
−60
−50
−40
f − Frequency − Hz
Harmonic Distortion − dBc
100k 1M 10M
G037
VCC = ±15 V
RF = 1 kΩ
RL = 50 Ω
VO = 2 VPP
Gain = 2
3rd Harmonic
2nd Harmonic
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
HARMONIC DISTORTION HARMONIC DISTORTIONvs vsFREQUENCY FREQUENCY
Figure 39. Figure 40.
DIFFERENTIAL GAIN DIFFERENTIAL GAINvs vsLOADING LOADING
Figure 41. Figure 42.
18
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0.00
0.05
0.10
0.15
0.20
0.25
0.30
1 2 3 4 5 6
Number of 150−Ω Loads
Differential Phase − °
G041
VCC = ±15 V
Gain = 2
RF = 680 Ω
40 IRE − NTSC Modulation
Worst Case ±100 IRE Ramp
VCC = ±5 V
t − Time − ns
100
−100
0
−200
300
200
0 302010 40 50 7060 80 90 100
400
−300
−400
VCC = ±15 V
Gain = 5
RF = 1 kΩ
RL = 50 Ω
tr/tf = 900 ns
G043
VO − Output Voltage − mV
t − Time − ns
4
−4
0
−8
12
8
0 302010 40 50 7060 80 90 100
16
−12
−16
G044
VO − Output Voltage − V
Minimal Saturation
VCC = ±15 V
Gain = 5
RF = 1 kΩ
RL = 50 Ω
tr/tf = 7 ns
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
DIFFERENTIAL PHASE DIFFERENTIAL PHASEvs vsLOADING LOADING
Figure 43. Figure 44.
400-mV STEP RESPONSE 20-V STEP RESPONSE
Figure 45. Figure 46.
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t − Time − ns
0 302010 40 50 7060 80 90 100
G045
100 mV Per Division
VCC = ±5 V
Gain = 2
RF = 1 kΩ
tr/tf = 900 ns
See Figure 2
RL = 50 Ω
RL = 25 Ω
t − Time − ns
0 302010 40 50 7060 80 90 100
G046
100 mV Per Division
VCC = ±5 V
Gain = 2
RF = 1 kΩ
tr/tf = 900 ns
See Figure 2
RL = 25 Ω
RL = 50 Ω
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
400-mV STEP RESPONSE 4-V STEP RESPONSE
Figure 47. Figure 48.
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APPLICATION INFORMATION
Simplified Schematic
IN+ IN–
VCC+
VCC–
OUT
Ibias
S0286-01
Ibias
Independent Power Supplies
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
The THS6022 contains two independent operational amplifiers. These amplifiers are current feedback topologyamplifiers made for high-speed operation. They have been specifically designed to deliver the full powerrequirements of ADSL and therefore can deliver output currents of at least 200 mA at full output voltage.
The THS6022 is fabricated using Texas Instruments 30-V complementary bipolar process, HVBiCOM. Thisprocess provides excellent isolation and high slew rates that result in excellent crosstalk and extremely lowdistortion.
Each amplifier of the THS6022 has its own power supply pins. This was specifically done to solve a problem thatoften occurs when multiple devices in the same package share common power pins. This problem is crosstalkbetween the individual devices caused by currents flowing in common connections. Whenever the currentrequired by one device flows through a common connection shared with another device, this current, inconjunction with the impedance in the shared line, produces an unwanted voltage on the power supply. Properpower-supply decoupling and good device power-supply rejection helps to reduce this unwanted signal. What isleft is crosstalk.
However, with independent power-supply pins for each device, the effects of crosstalk through commonimpedance in the power supplies are more easily managed. This is because it is much easier to achieve lowcommon impedance on the PCB with copper etch than it is to achieve low impedance within the package witheither bond wires or metal traces on silicon.
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Power Supply Restrictions
PD≅ǒ2 VCC ICCǓ)ǒVCC _ VOǓ ǒVO
RLǓ
Device Protection Features
Thermal Information
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
APPLICATION INFORMATION (continued)
Although the THS6022 is specified for operation from power supplies of ±5 V to ±15 V (or singled-ended powersupply operation from 10 V to 30 V), and each amplifier has its own power supply pins, several precautions mustbe taken to assure proper operation.•The power supplies for each amplifier must be the same value. For example, if the driver 1 uses ±15 volts,then the driver 2 must also use ±15 volts. Using ±15 volts for one amplifier and ±5 volts for another amplifieris not allowed.•To save power by powering down one of the amplifiers in the package, the following rules must be followed.– The amplifier designated driver 1 must always receive power. This is because the internal startup circuitryuses the power from the driver 1 device.– The –V
CC
pins from both drivers must always be at the same potential.– Individual amplifiers are powered down by simply opening the V
CC+
connection.
The THS6022 incorporates a standard class A-B output stage. This means that some of the quiescent current isdirected to the load as the load current increases. So under heavy load conditions, accurate power dissipationcalculations are best achieved through actual measurements. For small loads, however, internal powerdissipation for each amplifier in the THS6022 can be approximated by the following formula:
where:
P
D
= Power dissipation for one amplifierV
CC
= Split supply voltageI
CC
= Supply current for that particular amplifierV
O
= RMS output voltage of amplifierR
L
= Load resistance
To find the total THS6022 power dissipation, we simply sum up both amplifier power dissipation results.Generally, the worst-case power dissipation occurs when the output voltage is one-half the V
CC
voltage. One lastnote, which is often overlooked: the feedback resistor (R
F
) is also a load to the output of the amplifier and shouldbe taken into account for low value feedback resistors.
The THS6022 has two built-in features that protect the device against improper operation. The first protectionmechanism is output current limiting. Should the output become shorted to ground, the output current isautomatically limited to the value given in the data sheet. While this protects the output against excessivecurrent, the device internal power dissipation increases due to the high current and large voltage drop across theoutput transistors. Continuous output shorts are not recommended and could damage the device. Additionally,connection of the amplifier output to one of the supply rails ( ±V
CC
) can cause failure of the device and is notrecommended.
The second built-in protection feature is thermal shutdown. Should the internal junction temperature rise aboveapproximately 180 °C, the device automatically shuts down. Such a condition could exist with improper heatsinking or if the output is shorted to ground. When the abnormal condition is fixed, the internal thermal shutdowncircuit automatically turns the device back on.
The THS6022 is packaged in a thermally-enhanced PWP package, which is a member of the PowerPAD familyof packages. This package is constructed using a downset leadframe upon which the die is mounted [seeFigure 49 (a) and Figure Figure 49 (b)]. This arrangement results in the lead frame being exposed as a thermalpad on the underside of the package [see Figure 49 (c)]. Because this thermal pad has direct thermal contactwith the die, excellent thermal performance can be achieved by providing a good thermal path away from thethermal pad.
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DIE
SideView(a)
EndView(b) BottomView(c)
DIE
Thermal
Pad
M0088-01
Recommended Feedback and Gain Resistor Values
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
APPLICATION INFORMATION (continued)The PowerPAD package allows for both assembly and thermal management in one manufacturing operation.During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also besoldered to a copper area underneath the package. Through the use of thermal paths within this copper area,heat can be conducted away from the package into either a ground plane or other heat dissipating device. Thisis discussed in more detail in the PCB Design Considerations section of this document.
The PowerPAD package represents a design breakthrough, combining the small area and ease of the surfacemount assembly method to eliminate the previously difficult mechanical methods of heatsinking.
The thermal pad is electrically isolated from all terminals in the package.
Figure 49. Views of Thermally Enhanced PWP Package
As with all current feedback amplifiers, the bandwidth of the THS6022 is an inversely proportional function of thevalue of the feedback resistor. This can be seen from Figure 19 through Figure 32 . The recommended resistorsfor the optimum frequency response are shown in Table 1 . These should be used as a starting point and onceoptimum values are found, 1% tolerance resistors should be used to maintain frequency responsecharacteristics. Because there is a finite amount of output resistance of the operational amplifier, load resistancecan play a major part in frequency response. This is especially true with these drivers, which tend to drivelow-impedance loads. This can be seen in Figure 10 and Figure 25 through Figure 28 . As the load resistanceincreases, the output resistance of the amplifier becomes less dominant at high frequencies. To compensate forthis, the feedback resistor should change. For most applications, a feedback resistor value of 1 k Ωisrecommended, which is a good compromise between bandwidth and phase margin that yields a very stableamplifier.
Table 1. Recommended Feedback (R
F
) Values for Optimum Frequency Response
V
CC
=±15 V V
CC
=±15 VGAIN
R
L
= 50 ΩR
L
= 100 ΩR
L
= 25 ΩR
L
= 50 ΩR
L
= 100 Ω1 787 Ω750 Ω1 k Ω910 Ω820 Ω2 590 Ω590 Ω820 Ω715 Ω680 Ω–1 560 Ω– – 680 Ω–
Consistent with current-feedback amplifiers, increasing the gain is best accomplished by changing the gainresistor, not the feedback resistor. This is because the bandwidth of the amplifier is dominated by the feedbackresistor value and internal dominant-pole capacitor. The ability to control the amplifier gain independently of thebandwidth constitutes a major advantage of current-feedback amplifiers over conventional voltage feedbackamplifiers. Therefore, once a frequency response is found suitable to a particular application, adjust the value ofthe gain resistor to increase or decrease the overall amplifier gain.
Finally, it is important to realize the effects of the feedback resistance on distortion. Increasing the resistancedecreases the loop gain and increases the distortion. It is also important to know that decreasing loadimpedance increases total harmonic distortion (THD). Typically, the third-order harmonic distortion increasesmore than the second-order harmonic distortion. This is illustrated in Figure 40 .
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Offset Voltage
Noise Calculations and Noise Figure
_
+
RF
RS
RG
eRg
eRf
eRs en
IN+
Noiseless
IN–
eni eno
S0277-01
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
The output offset voltage, (V
OO
) is the sum of the input offset voltage (V
IO
) and both input bias currents (I
IB
)times the corresponding gains. The following schematic and formula can be used to calculate the output offsetvoltage:
Figure 50. Output Offset Voltage Model
Noise can cause errors on very small signals. This is especially true for amplifying small signals. The noisemodel for current-feedback amplifiers (CFB) is the same as for voltage-feedback amplifiers (VFB). The onlydifference between the two is that the CFB amplifiers generally specify different current noise parameters foreach input, whereas VFB amplifiers usually only specify one noise-current parameter. The noise model is shownin Figure 51 . This model includes all of the noise sources as follows:
•e
n
= Amplifier internal voltage noise (nV/ √Hz)•IN+ = Noninverting current noise (pA/ √Hz)•IN– = Inverting current noise (pA/ √Hz)•e
Rx
= Thermal voltage noise associated with each resistor (e
Rx
= 4 kTR
x
)
Figure 51. Noise Model
24
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eni +ǒenǓ2)ǒIN ) RSǓ2)ǒIN– ǒRFøRGǓǓ2)4 kTRs)4 kTǒRFøRGǓ
Ǹ
eno +eni AV+eniǒ1)RF
RGǓ(Noninverting Case)
NF +10logȧ
ȧ
ȱ
Ȳ
e2
ni
ǒeRsǓ2ȧ
ȧ
ȳ
ȴ
NF +10logȧ
ȧ
ȧ
ȧ
ȧ
ȱ
Ȳ
1)
ȧ
ȡ
ȢǒenǓ2
)ǒIN ) RSǓ2ȧ
ȣ
Ȥ
4 kTRS
ȧ
ȧ
ȧ
ȧ
ȧ
ȳ
ȴ
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
The total equivalent input noise density (e
ni
) is calculated by using the following equation:
where:
k = Boltzmann’s constant = 1.380658 ×10
–23
T = Temperature in degrees Kelvin (273 + °C)R
F
|| R
G
= Parallel resistance of R
F
and R
G
To get the equivalent output noise of the amplifier, just multiply the equivalent input noise density (e
ni
) by theoverall amplifier gain (A
V
).
As the previous equations show, to keep noise at a minimum, small-value resistors should be used. As theclosed-loop gain is increased (by reducing R
G
), the input noise is reduced considerably because of the parallelresistance term. This leads to the general conclusion that the most dominant noise sources are the sourceresistor (R
S
) and the internal amplifier noise voltage (e
n
). Because noise is summed in a root-mean-squaresmethod, noise sources smaller than 25% of the largest noise source can be effectively ignored. This can greatlysimplify the formula and make noise calculations much easier to calculate.
This brings up another noise measurement usually preferred in RF applications, the noise figure (NF). Noisefigure is a measure of noise degradation caused by the amplifier. The value of the source resistance must bedefined and is typically 50 Ωin RF applications.
Because the dominant noise components are generally the source resistance and the internal amplifier noisevoltage, we can approximate noise figure as:
Figure 52 shows the noise figure graph for the THS6022.
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Slew Rate
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
NOISE FIGURE
vsSOURCE RESISTANCE
Figure 52. Noise Figure vs Source Resistance
The slew rate performance of a current-feedback amplifier like the THS6022 is affected by many differentfactors. Some of these factors are external to the device, such as amplifier configuration and PCB parasitics,and others are internal to the device, such as available currents and node capacitance. Understanding some ofthese factors should help the PCB designer arrive at a more optimum circuit with fewer problems.
Whether the THS6022 is used in an inverting amplifier configuration or a noninverting configuration can impactthe output slew rate. Slew rate performance in the inverting configuration is generally faster than thenoninverting configuration. This is because in the inverting configuration, the input terminals of the amplifier areat a virtual ground and do not significantly change voltage as the input changes. Consequently, the time tocharge any capacitance on these input nodes is less than for the noninverting configuration, where the inputnodes actually do change in voltage an amount equal to the size of the input step. In addition, any PCB parasiticcapacitance on the input nodes degrades the slew rate further simply because there is more capacitance tocharge. If the supply voltage (V
CC
) to the amplifier is reduced, slew rate decreases because there is less currentavailable within the amplifier to charge the capacitance on the input nodes as well as other internal nodes. Also,as the load resistance decreases, the slew rate typically decreases due to the increasing internal currents, whichslow down the transitions (see Figure 13 and Figure 14 ).
Internally, the THS6022 has other factors that impact the slew rate. The amplifier’s behavior during the slew ratetransition varies slightly depending upon the rise time of the input. This is because of the way the input stagehandles faster and faster input edges. Slew rates (as measured at the amplifier output) of less than about 1300V/ μs are processed by the input stage in a very linear fashion. Consequently, the output waveform smoothlytransitions between initial and final voltage levels. This is shown in Figure 53. For slew rates greater than 1300V/ μs, additional slew-enhancing transistors present in the input stage begin to turn on to support these fastersignals. The result is an amplifier with extremely fast slew rate capabilities. Figure 54 shows waveforms forthese faster slew rates. The additional aberrations present in the output waveform with these faster slewing inputsignals are due to the brief saturation of the internal current mirrors. This phenomenon, which typically lasts lessthan 20 ns, is considered normal operation and is not detrimental to the device in any way. If for any reason thistype of response is not desired, then increasing the feedback resistor or slowing down the input signal slew ratereduces the effect.
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t − Time − ns
4
−4
0
−8
12
8
0 302010 40 50 7060 80 90 100
16
−12
−16
G048
VO − Output Voltage − V
SR ≅ 1300 V/µs
VCC = ±15 V
Gain = 5
RF = 1 kΩ
RL = 50 Ω
tr/tf = 10 ns
t − Time − ns
4
−4
0
−8
12
8
0 302010 40 50 7060 80 90 100
16
−12
−16
G049
VO − Output Voltage − V
SR = 3500 V/µs
VCC = ±15 V
Gain = 5
RL = 1 kΩ
RF = 50 Ω
tr/tf = 900 ns
Driving a Capacitive Load
+
_
THS6022
CLOAD
1kW
Input
Output
1kW
15 W
S0278-02
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
SLEW RATE—SATURATION SLEW RATE—LINEAR
Figure 53. Figure 54.
Driving capacitive loads with high-performance amplifiers is not a problem as long as certain precautions aretaken. The first is to realize that the THS6022 has been internally compensated to maximize its bandwidth andslew-rate performance. When the amplifier is compensated in this manner, capacitive loading directly on theoutput decreases the device phase margin, leading to high-frequency ringing or oscillations. Therefore, forcapacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output ofthe amplifier, as shown in Figure 55. A minimum value of 15 Ωshould work well for most applications. Forexample, in 75- Ωtransmission systems, setting the series resistor value to 75 Ωboth isolates any capacitanceloading and provides the proper line impedance matching at the source end.
Figure 55. Driving a Capacitive Load
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PCB Design Considerations
−7
−6
−5
−4
−3
−2
−1
0
1
2
f − Frequency − Hz
Output Amplitude − dB
100k 1M 100M 500M
G051
10M
VCC = ±15 V
Gain = −1
RL = 50 Ω
VO = 0.2 V
Ci = 27 pF
Ci = 0 pF
(Stray C Only)
1 kΩ
C in
VI+
−VO
RL = 50 Ω
50 Ω
1 kΩ
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
Proper PCB design techniques in two areas are important to assure proper operation of the THS6022. Theseareas are high-speed layout techniques and thermal-management techniques. Because the THS6022 is ahigh-speed part, the following guidelines are recommended.•Ground plane—It is essential that a ground plane be used on the board to provide all components with alow-inductance ground connection. Although a ground connection directly to a terminal of the THS6022 is notnecessarily required, it is recommended that the thermal pad of the package be tied to ground. This servestwo functions. It provides a low-inductance ground to the device substrate to minimize internal crosstalk, andit provides the path for heat removal.•Input stray capacitance—To minimize potential problems with amplifier oscillation, the capacitance at theinverting input of the amplifiers must be kept to a minimum. To do this, PCB trace runs to the inverting inputmust be as short as possible, the ground plane must be removed under any etch runs connected to theinverting input, and external components should be placed as close as possible to the inverting input. This isespecially true in the noninverting configuration. An example of this can be seen in Figure 56 , which showswhat happens when a 1-pF capacitor is added to the inverting input terminal in the noninvertingconfiguration. The bandwidth increases dramatically at the expense of peaking. This is because some of theerror current is flowing through the stray capacitor instead of the inverting node of the amplifier. While thedevice is in the inverting mode, stray capacitance at the inverting input has a minimal effect. This is becausethe inverting node is at a virtual ground and the voltage does not fluctuate nearly as much as in thenoninverting configuration. This can be seen in Figure 57 , where a 27-pF capacitor adds only 0.5 dB ofpeaking. In general, as the gain of the system increases, the output peaking due to this capacitor decreases.While this can initially appear to be a faster and better system, overshoot and ringing are more likely to occurunder fast transient conditions. So, proper analysis of adding a capacitor to the inverting input node shouldalways be performed for stable operation.
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 56. Figure 57.
•Proper power supply decoupling—Use a minimum of a 6.8- μF tantalum capacitor in parallel with a 0.1- μFceramic capacitor on each supply terminal. It may be possible to share the tantalum among severalamplifiers depending on the application, but a 0.1- μF ceramic capacitor should always be used on the supplyterminal of every amplifier. In addition, the 0.1- μF capacitor should be placed as close as possible to thesupply terminal. As this distance increases, the inductance in the connecting etch makes the capacitor lesseffective. The designer should strive for distances of less than 0.1 inch (2.55 mm) between the device powerterminal and the ceramic capacitors.
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Thermalpadarea=150milsx170mils(3.81mmx4.32mm)with6vias.
Viadiameter=13mils(0.33mm).
M0089-01
PD+ǒTMAX–TA
qJA Ǔ
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
Because of its power dissipation, proper thermal management of the THS6022 is required. Although there aremany ways to properly heatsink this device, the following steps illustrate one recommended approach for amultilayer PCB with an internal ground plane. See Figure 58 for the following steps.
Figure 58. PowerPAD PCB Etch and Via Pattern Minimum Requirements
1. Place six holes in the area of the thermal pad. These holes should be 13 mils (0.33 mm) in diameter.They are kept small so that solder wicking through the holes is not a problem during reflow.2. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. Thiswill help dissipate the heat generated from the THS6022. These additional vias may be larger than the13-mil (0.33-mm) diameter vias directly under the thermal pad. They can be larger because they are notin the thermal-pad area to be soldered; therefore, wicking is generally not a problem.3. Connect all holes to the internal ground plane.4. When connecting these holes to the ground plane, do not use the typical web or spoke via connectionmethodology. Web connections have a high thermal resistance connection that is useful for slowing theheat transfer during soldering operations. This makes the soldering of vias that have plane connectionseasier. However, in this application, low thermal resistance is desired for the most efficient heat transfer.Therefore, the holes under the THS6022 package should make their connection to the internal groundplane with a complete connection around the entire circumference of the plated-through hole.5. The top-side solder mask should leave exposed the terminals of the package and the thermal pad areawith its six holes. The bottom-side solder mask should cover the six holes of the thermal pad area. Thisprevents solder from being pulled away from the thermal pad area during the reflow process.6. Apply solder paste to the exposed thermal pad area and all of the operational amplifier terminals.7. With these preparatory steps in place, the THS6022 is simply placed in position and run through thesolder reflow operation as any standard surface-mount component. This results in a part that is properlyinstalled.
The actual thermal performance achieved with the THS6022 in its PowerPAD package depends on theapplication. In the example above, if the size of the internal ground plane is approximately 3 inches ×3 inches(7.62 mm ×7.62 mm), then the expected thermal coefficient, θ
JA
, is about 37.5 °C/W. For a given θ
JA
, themaximum power dissipation is shown in Figure 60 and is calculated by the following formula:
where:
P
D
= Maximum power dissipation of THS6022 (watts)T
MAX
= Absolute maximum junction temperature (150 °C)T
A
= Ambient free-air temperature ( °C)θ
JA
=θ
JC
+θ
CA
θ
JC
= Thermal coefficient from junction to case (2.07 °C/W)θ
CA
= Thermal coefficient from case to ambient air
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TA − Free-Air Temperature − °C
0
1
2
3
4
5
6
−40 −20 0 20 40 60 80 100
Maximum Power Dissipation − W
G052
TJ = 150°C
PCB Size = 3” x 3”
No Air Flow
θJA = 37.5°C/W
2 oz Trace and
Copper Pad
with Solder
θJA = 97.7°C/W
2 oz Trace and Copper Pad
without Solder
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
More-complete details of the thermal pad installation process and thermal management techniques can be foundin the PowerPAD Thermally Enhanced Package application report (SLMA002 ).
MAXIMUM POWER DISSIPATION
vsFREE-AIR TEMPERATURE
Figure 59.
30
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ADSL
_
+
-15V
15V
1kW
1kW
VI+
_
+
6.8 Fm0.1 Fm
–15V
15V
1kW
1kW
+
+
VI-
+
–
1kW
0.1 Fm
1kW
2kW
50 W
+
–
1kW
1kW
2kW
1:1
TelephoneLine
50 W
–15V
15V
15V
–15V
THS6062
Receiver1
THS6062
Receiver2
VO+
VO–
THS6022
Driver1
THS6022
Driver2
100 W
S0287-01
0.1 Fm6.8 Fm
6.8 Fm0.1 Fm
+
+
0.1 Fm6.8 Fm
0.1 Fm
0.01 Fm
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
The THS6022 was primarily designed as a line driver and line receiver for ADSL (asymmetrical digital subscriberline). The driver output stage has been sized to provide full ADSL power levels of 13 dBm onto the telephonelines. Although actual driver output peak voltages and currents vary with each particular ADSL application, theTHS6022 is specified for a minimum full output current of 200 mA at its full output voltage of approximately 12 V.This performance meets the demanding needs of ADSL at the client side end of the telephone line. A typicalADSL schematic is shown in Figure 60
Figure 60. THS6022 ADSL Application
The ADSL transmit band consists of 255 separate carrier frequencies each with its own modulation andamplitude level. With such an implementation, it is imperative that signals put onto the telephone line have aslow a distortion as possible. This is because any distortion either interferes directly with other ADSL carrierfrequencies or it creates intermodulation products that interfere with ADSL carrier frequencies.
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General Configurations
VI
VO
C1
+
–
RGRF
R1
S0281-01
3dB
1
f
2 R1C1
-=p
OF
I G
VR1
1
V R 1 sR1C1
æ öæ ö
= +
ç ÷ç ÷
ç ÷ +
è ø
è ø
THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
The THS6022 has been specifically designed for ultralow distortion by careful circuit implementation and bytaking advantage of the superb characteristics of the complementary bipolar process. Driver single-endeddistortion measurements are shown in Figure 37 through Figure 40 . It is commonly known that in the differentialdriver configuration, the second-order harmonics tend to cancel out. Thus, the dominant total harmonic distortion(THD) is primarily due to the third-order harmonics. Additionally, distortion should be reduced as the feedbackresistance drops. This is because the bandwidth of the amplifier increases, which allows the amplifier to reactfaster to any nonlinearities in the closed-loop system.
Another significant point is the fact that distortion decreases as the impedance load increases. This is becausethe output resistance of the amplifier becomes less significant as compared to the output load resistance. This isillustrated in Figure 40 .
One problem that has been receiving a lot of attention in the ADSL area is power dissipation. One way tosubstantially reduce power dissipation is to lower the power supply voltages. This is because the RMS voltage ofan ADSL remote terminal signal is 1.35-V RMS. But to meet ADSL requirements, the drivers must have avoltage RMS-to-peak crest factor of 5.6 in order to keep the bit-error probability rate below 10
–7
. Hence, thepower supply voltages must be high enough to accomplish the peak output voltage of 1.35 V ×5.6 = 7.6V(PEAK). If ±15-V power supplies are used for the THS6022 drivers in the circuit shown in Figure 61, the powerdissipation of the THS6022 is approximately 600 mW. This is assuming that part of the quiescent current isdiverted back to the load, which typically happens in a class-AB amplifier. But if the power supplies are droppeddown to ±12 V, then the power dissipation drops to approximately 460 mW. This is a 23% reduction of power,which ultimately lowers the temperature of the drivers and increases efficiency.
Another way to reduce power dissipation in the drivers is to increase the transformer ratio. The drawback indoing this is that it increases the loading on the drivers and reduces the signals being received from the centraloffice. If this can be overcome, then a power reduction in the drivers results. By going to a 1:2 transformer ratio,the power supply voltages can drop to ±6 V. The driver output voltage has now been reduced to 675 mV RMS.But the loading on the output of the drivers drops to 25 Ω. The power dissipated is now approximately 360 mW,a reduction of 22% over the previous example. But, the received signal is now 1/2 of the previous example. Thismust be dealt with by requiring low-noise receivers. There are always trade offs when it comes to dealing withpower, so proper analysis of the system should always be considered.
A common error for the first-time CFB user is to create a unity-gain buffer amplifier by shorting the outputdirectly to the inverting input. A CFB amplifier in this configuration oscillates and is not recommended. TheTHS6022, like all CFB amplifiers, must have a feedback resistor for stable operation. Additionally, placingcapacitors directly from the output to the inverting input is not recommended. This is because, at highfrequencies, a capacitor has a very low impedance. This results in an unstable amplifier and should not beconsidered when using a current-feedback amplifier. Because of this, integrators and simple low-pass filters,which are easily implemented on a VFB amplifier, must be designed slightly differently. If filtering is required,simply place an RC-filter at the noninverting terminal of the operational-amplifier (see Figure 62).
Figure 61. Single-Pole Low-Pass Filter
32
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VI
C2
R2R1
C1
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SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
If a multiple-pole filter is required, the use of a Sallen-Key filter can work very well with CFB amplifiers. This isbecause the filtering elements are not in the negative feedback loop and stability is not compromised. Becauseof their high slew-rates and high bandwidths, CFB amplifiers can create very accurate signals and help minimizedistortion. An example is shown in Figure 63
Figure 62. Two-Pole Low-Pass Sallen-Key Filter
There are two simple ways to create an integrator with a CFB amplifier. The first one, shown in Figure 64 , addsa resistor in series with the capacitor. This is acceptable because at high frequencies, the resistor is dominantand the feedback impedance never drops below the resistor value. The second one, shown in Figure 65, usespositive feedback to create the integration. Caution is advised because oscillations can occur because of thepositive feedback.
Figure 63. Inverting CFB Integrator
Figure 64. Noninverting CFB Integrator
33Submit Documentation Feedback
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+
–
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75 W
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THS6022
SLOS225D – SEPTEMBER 1998 – REVISED JULY 2007
Another good use for the THS6022 amplifiers is as very good video distribution amplifiers. One characteristic ofdistribution amplifiers is the fact that the differential phase (DP) and the differential gain (DG) are compromisedas the number of lines increases and the closed-loop gain increases. Be sure to use termination resistorsthroughout the distribution system to minimize reflections and capacitive loading.
Figure 65. Video Distribution Amplifier Application
An evaluation board is available for the THS6022 (literature number SLOP133 ). This board has been configuredfor proper thermal management of the THS6022. The circuitry has been designed for a typical ADSL applicationas shown previously in this document. For more detailed information, see the THS6022 250-mA Dual DifferentialDrivers Evaluation Module user's guide (SLOV035 ). To order the evaluation board, contact your local TI salesoffice or distributor.
34
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PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
THS6022CPWP ACTIVE HTSSOP PWP 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS6022CPWPG4 ACTIVE HTSSOP PWP 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS6022CPWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS6022CPWPRG4 ACTIVE HTSSOP PWP 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS6022IPWP ACTIVE HTSSOP PWP 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS6022IPWPG4 ACTIVE HTSSOP PWP 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS6022IPWPR ACTIVE HTSSOP PWP 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
THS6022IPWPRG4 ACTIVE HTSSOP PWP 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 6-Jun-2007
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
THS6022CPWPR HTSSOP PWP 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
THS6022IPWPR HTSSOP PWP 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
THS6022CPWPR HTSSOP PWP 14 2000 367.0 367.0 35.0
THS6022IPWPR HTSSOP PWP 14 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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