November 2016
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STEVAL-ISB040V1
2.5 W wireless power receiver evaluation board based on
STWLC03
Data brief
Features
• Based on STWLC03 for wireless power
receiver
• 2.5 W output power
• Integrated high efficiency synchronous
rectifier
• 800 kHz programmable step-down converter
with input current and input voltage
regulation loops
• Qi 1.1.2 based communication protocol
• I²C interface
• Thermal protection
• Low power dissipative rectifier overvoltage
clamp
• Suitable for wearable applications
• RoHS compliant
Description
The STEVAL-ISB040V1 is a wireless receiver
evaluation board based on the STWLC03
integrated wireless power receiver.
STWLC03 is focused on the 2.5 W protocol
based on Qi; with digital control and precise
analog control loops ensuring stable operation.
The STWLC03 wireless receiver allows tuning for
a wide range of receiving coils, from small form
factors to standard sizes.
The I²C interface allows customizing device
parameters, which can be saved in embedded
non-volatile memory.
Schematic diagram
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DocID029973 Rev 1
1 Schematic diagram
Figure 1: STEVAL-ISB040V1 circuit schematic
1 2
1.5uH/2.9A
L2
68nF
C1
3.3nF
C2
AC1
AC2
68nF
C20
100nF
CBO OT 2
100nF
CBO OT 1
39nF
CM2
39nF
CM1
MOD2
CL MP2
BOO T 2
MOD1
CLMP1
BOOT1
AC1
AC2
MOD2
CL M P2
BOOT2
BOOT1
CL M P1
M OD1
RE SET/ EN
GPIO3
VCO RE
TDO
51k
R2
VI O
GND
RESET/EN
USBOK
INT
SCL
SDA
51k
R4
51k
R6
4k7
R7
4k7
R8
USBOK
INT
SCL
SDA
R1 1
.Designator
12
D0
GPIO0
VO UT
100nF
CBO OT
10uFC3
10uFC4
PIN
VRE CT
470nF
C10
100nF
C11
10uF
C5
160k
RF B1
33.2k
RF B2
VF B
FBGND
Rx
NT C
GPIO0
GPIO1
GPIO2
VA
VS UP
LX
V5 V
BO OT
CO MP
VRE CT
PGND 12
P6
AGND
PGND 12
P5
GND
GND
PGND AGND
AGND
AGND
56nF
C23
TMS
TDI
TCK
GND
TDI
TMS
TCK
PGND
PGND
PGND
PGND
Star routing option
56nF
C21
TMS
A1
ONP AD_ H
A2
NT CRX
A3
VA
A4
A GN D
B4
VF B A5
VO UT D5
FBGND B6
RE SL A6
VS UPS A7
VS UP B8
CO MP C7
V5 V
A9
VE XT A1 0
SWD RV D7
LX A1 1
LX B1 1
BPGND
C9
BPGND
C11
RPGND
D8
A C2 E11
BOOT2 E8
M OD 2 F11
CL M P2 F9
RMO D1 G11
VRE CT G10
CL AMP F8
BO OT G9
RM OD E7
BOOT1 G8
A C1 F6
TR_ EXT F5
M OD 1 G6
CL M P1 G5
TDI
G4
TDO
G3
GND
G2
VCO RE
F2
TCK
F4
VI O
G1
GPIO0
D6
GPIO1
E5
GPIO2
E4
GPIO3
E1
SDA
D4
SCL
D1
RE SET
D2
INT
C3
CO MM
C1
USBOK
C2
V5 V
B9
AGND
B5
A GN D
C4
A GN D
C5
VS UP B7
VS UP A8
BPGND
C8
BPGND
C10
LX B1 0
RPGND
D9
RPGND
D10
RPGND
D11
VS UPS C6
AC2 E10
A C2 E9
A C1 F7
A C1 G7
VRE CT F10
GND
F3
SIO0
F1
SIO1
E2
SIO2
E3
SIO3
D3
BOO T SEL
E6
2xSCK
B1
SCK
B2
CSN
B3
U1
VA
15pF
CFB
GND
VI O
R1 7
.Designator
GND
RCL 1
RCL 2
VRE CT
10uFC13
10uFC12
10uF
C14
10uF
C15
Rs
1uF
C7
1uF
C6
56nF
C22
EN
USBOK
GND
INT
SCL
SDA
GND
COI L+
COI L-
10uFC9
VO UT
PGND
VI O
VI O
VI OVCO RE1 2
P21
D+ D-
RD
.Designator
T1
R3
.Designator
R1
GND
VRE CT
VRE CT
GSPG2909161540SG
STEVAL-ISB040V1
DocID029973 Rev 1
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2 Revision history
Table 1: Document revision history
Date Version Changes
09-Nov-2016 1 Initial release.
STEVAL-ISB040V1
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DocID029973 Rev 1
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