1
2
3
4
8
7
6
5
BYPASS
GND
SHUTDOWN
IN2–
IN1–
VO1
VDD
VO2
DGN PACKAGE
(TOP VIEW)
Audio
Input
Bias
Control
6
7
5
2
VO1
VO2
VDD
3
8
1
4
IN1−
BYPASS
SHUTDOWN
VDD/2
Ci
Ri
Rf
325 kΩ325 kΩ
C(B)
C(S)
Audio
Input
Ci
RiIN2−
Rf
VDD
From Shutdown
Control Circuit
−
+
−
+
C(C)
C(C)
TPA6110A2
www.ti.com
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
150-mW STEREO AUDIO POWER AMPLIFIER
Check for Samples: TPA6110A2
1FEATURES •Surface-Mount Packaging
–PowerPAD™MSOP
2•150 mW Stereo Output
•Pin Compatible With LM4881
•PC Power Supply Compatible
–Fully Specified for 3.3 V and 5 V
Operation
–Operation to 2.5 V
•Pop Reduction Circuitry
•Internal Mid-Rail Generation
•Thermal and Short-Circuit Protection
DESCRIPTION
The TPA6110A2 is a stereo audio power amplifier packaged in an 8-pin PowerPAD™MSOP package capable of
delivering 150 mW of continuous RMS power per channel into 16-Ωloads. Amplifier gain is externally configured
by means of two resistors per input channel and does not require external compensation for settings of 1 to 10.
THD+N when driving a 16-Ωload from 5 V is 0.03% at 1 kHz, and less than 1% across the audio band of 20 Hz
to 20 kHz. For 32-Ωloads, the THD+N is reduced to less than 0.02% at 1 kHz, and is less than 1% across the
audio band of 20 Hz to 20 kHz. For 10-kΩloads, the THD+N performance is 0.005% at 1 kHz, and less than
0.5% across the audio band of 20 Hz to 20 kHz.
TYPICAL APPLICATION CIRCUIT
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Copyright ©2000–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPA6110A2
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICE
TAMSOP SYMBOLIZATION
MSOP(1)
-40°C to 85°C TPA6110A2DGN TI AIZ
(1) The DGN package is available in left-ended tape and reel only (e.g., TPA6110A2DGNR).
PinFunctions
PIN I/O DESCRIPTION
NAME NO.
Tap to voltage divider for internal mid-supply bias supply. Connect to a 0.1 µF to 1 µF low ESR capacitor
BYPASS 1 I for best performance.
GND 2 I GND is the ground connection.
IN1–8 I IN1–is the inverting input for channel 1.
IN2–4 I IN2–is the inverting input for channel 2.
SHUTDOWN 3 I Puts the device in a low quiescent current mode when held high.
VDD 6 I VDD is the supply voltage terminal.
VO1 7 O VO1 is the audio output for channel 1.
VO2 5 O VO2 is the audio output for channel 2.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted) UNIT
VDD Supply voltage 6 V
VIInput voltage –0.3 V to VDD + 0.3 V
Continuous total power dissipation Internally limited
TJOperating junction temperature range -40°C to 150°C
Tstg Storage temperature range -65°C to 150°C
(1) Stresses beyond those listed under "absolute maximum ratings”may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions”is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
TA≤25°C DERATING FACTOR TA= 70°C TA= 85°C
PACKAGE POWER RATING ABOVE TA= 25°C POWER RATING POWER RATING
DGN 2.14 W(1) 17.1 mW/°C 1.37 W 1.11 W
(1) See the Texas Instruments document, PowerPAD Thermally Enhanced Package Application Report (SLMA002), for more information on
the PowerPAD™package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas
Instruments Recommended Board for PowerPAD on page 33 of the before mentioned document.
RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT
VDD Supply voltage 2.5 5.5 V
TAOperating free-air temperature -40 85 °C
VIH High-level input voltage (SHUTDOWN) 60% x VDD V
VIL Low-level input voltage (SHUTDOWN) 25% x VDD V
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SLOS314B –DECEMBER 2000–REVISED MARCH 2011
DC ELECTRICAL CHARACTERISTICS
at TA= 25°C, VDD = 2.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOO Output offset voltage Av= 2 V/V 15 mV
PSRR Power supply rejection ratio VDD = 3.2 V to 3.4 V 83 dB
IDD Supply current SHUTDOWN = 0 V 1.5 3 mA
IDD(SD) Supply current in shutdown mode SHUTDOWN = VDD 1 10 µA
AC OPERATING CHARACTERISTICS
VDD = 3.3 V, TA= 25°C, RL= 16 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POOutput power (each channel) THD≤0.1%, f = 1 kHz 60 mW
THD+N Total harmonic distortion + noise PO= 40 mW, 20 - 20 kHz 0.4%
BOM Maximum output power BW G = 10, THD <5% >20 kHz
Phase margin Open loop 96°
Supply ripple rejection ratio f = 1 kHz 71 dB
Channel/channel output separation f = 1 kHz, PO= 40 mW 89 dB
SNR Signal-to-noise ratio PO= 50 mW, AV= 1 100 dB
VnNoise output voltage AV= 1 11 µV(rms)
DC ELECTRICAL CHARACTERISTICS
at TA= 25°C, VDD = 5.5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOO Output offset voltage AV= 2 V/V 15 mV
PSRR Power supply rejection ratio VDD = 4.9 V to 5.1 V 76 dB
IDD Supply current SHUTDOWN = 0 V 1.5 3 mA
IDD(SD) Supply current in shutdown mode SHUTDOWN = VDD 1 10 µA
| IIH | High-level input current (SHUTDOWN) VDD = 5.5 V, VI= VDD 1µA
| IIL | Low-level input current (SHUTDOWN) VDD = 5.5 V, VI= 0 V 1 µA
ZiInput impedance >1 MΩ
AC OPERATING CHARACTERISTICS
VDD = 5 V, TA= 25°C, RL= 16 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POOutput power (each channel) THD≤0.1%, f = 1 kHz 150 mW
THD+N Total harmonic distortion + noise PO= 100 mW, 20 - 20 kHz 0.6%
BOM Maximum output power BW G = 10, THD <5% >20 kHz
Phase margin Open loop 96°
Supply ripple rejection ratio f = 1 kHz 61 dB
Channel/Channel output separation f = 1 kHz, PO= 100 mW 90 dB
SNR Signal-to-noise ratio PO= 100 mW, AV= 1 100 dB
VnNoise output voltage AV= 1 11.7 µV(rms)
AC OPERATING CHARACTERISTICS
VDD = 3.3 V, TA= 25°C, RL= 32 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POOutput power (each channel) THD≤0.1%, f = 1 kHz 40 mW
THD+N Total harmonic distortion + noise PO= 30 mW, 20 - 20 kHz 0.4%
BOM Maximum output power BW AV= 10, THD <2% >20 kHz
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TPA6110A2
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
www.ti.com
AC OPERATING CHARACTERISTICS (continued)
VDD = 3.3 V, TA= 25°C, RL= 32 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Phase margin Open loop 96°
Supply ripple rejection ratio f = 1 kHz 71 dB
Channel/channel output separation f = 1 kHz 95 dB
SNR Signal-to-noise ratio PO= 40 mW, AV= 1 100 dB
VnNoise output voltage AV= 1 11 µV(rms)
AC OPERATING CHARACTERISTICS
VDD = 5 V, TA= 25°C, RL= 32 Ω
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POOutput power (each channel) THD≤0.1%, f = 1 kHz 90 mW
THD+N Total harmonic distortion + noise PO= 60 mW, 20 - 20 kHz 0.4%
BOM Maximum output power BW AV= 10, THD <2% >20 kHz
Phase margin Open loop 97°
Supply ripple rejection ratio f = 1 kHz 61 dB
Channel/channel output separation f = 1 kHz 98 dB
SNR Signal-to-noise ratio PO= 90 mW, AV= 1 100 dB
VnNoise output voltage AV= 1 11.7 µV(rms)
Spacer TYPICAL CHARACTERISTICS
Table of Graphs FIGURE
vs Frequency 1, 3, 5, 6, 7, 9, 11, 13
THD+N Total harmonic distortion plus noise vs Output power 2, 4, 8, 10, 12, 14
Supply ripple rejection ratio vs Frequency 15, 16
VnOutput noise voltage vs Frequency 17, 18
Crosstalk vs Frequency 19–24
Shutdown attenuation vs Frequency 25, 26
Open-loop gain and phase margin vs Frequency 27, 28
Output power vs Load resistance 29, 30
IDD Supply current vs Supply voltage 31
SNR Signal-to-noise ratio vs Voltage gain 32
Power dissipation/amplifier vs Load power 33, 34
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10 100
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.3 V,
RL = 32 Ω,
AV = −1 V/V,
CB = 1 µF
50
PO − Output Power − mW
20 Hz
1 kHz
20 kHz
0.001
10
0.01
0.1
1
20 20k100 1k 10k
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V,
PO = 25 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V
20 20k100 1k 10k
0.001
10
0.01
0.05
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V,
PO = 60 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V AV = −5 V/V
AV = −10 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V,
RL = 32 Ω,
AV = −1 V/V,
CB = 1 µF
100
PO − Output Power − mW
1 kHz
20 Hz
20 kHz
TPA6110A2
www.ti.com
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 1. Figure 2.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 3. Figure 4.
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20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V,
PO = 100 mW,
CB = 1 µF,
RL = 10 kΩ,
AV = −1 V/V
AV = −10 V/V
AV = −1 V/V
AV = −5 V/V
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V,
PO = 100 mW,
CB = 1 µF,
RL = 10 kΩ
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V,
PO = 60 mW,
CB = 1 µF,
RL = 8 Ω,
AV = −1 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.3 V,
RL = 8 Ω,
AV = −1 V/V,
CB = 1 µF
100
PO − Output Power − mW
1 kHz
20 Hz
20 kHz
TPA6110A2
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
www.ti.com
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY FREQUENCY
Figure 5. Figure 6.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 7. Figure 8.
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20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V,
PO = 150 mW,
CB = 1 µF,
RL = 8 Ω
AV = −10 V/V
AV = −1 V/V AV = −5 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V,
RL = 8 Ω,
AV = −1 V/V,
CB = 1 µF
PO − Output Power − mW
1 kHz
20 kHz
100
20 Hz
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 3.3 V,
PO = 40 mW,
CB = 1 µF,
RL = 16 Ω,
AV = −1 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 3.3 V,
RL =16 Ω,
AV = −1 V/V,
CB = 1 µF
PO − Output Power − mW
1 kHz
20 kHz
100
20 Hz
TPA6110A2
www.ti.com
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 9. Figure 10.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 11. Figure 12.
Copyright ©2000–2011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TPA6110A2
20 20k100 1k 10k
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
f − Frequency − Hz
VDD = 5 V,
PO = 100 mW,
CB = 1 µF,
RL = 16 Ω
AV = −10 V/V
AV = −1 V/V AV = −5 V/V
10 500
0.001
10
0.01
0.1
1
THD+N − Total Harmonic Distortion + Noise − %
VDD = 5 V,
RL = 16 Ω,
AV = −1 V/V,
CB = 1 µF
PO − Output Power − mW
1 kHz
20 Hz
20 kHz
100
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
VDD = 3.3 V,
RL = 16 Ω,
AV = −1 V/V
0.1 µF
− Supply Ripple Rejection Ratio − dB
0.47 µF
1 µF
KSVR
Bypass = 1.65 V
TPA6110A2
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
www.ti.com
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE
vs vs
FREQUENCY OUTPUT POWER
Figure 13. Figure 14.
SUPPLY RIPPLE REJECTION RATIO SUPPLY RIPPLE REJECTION RATIO
vs vs
FREQUENCY FREQUENCY
Figure 15. Figure 16.
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100
10
120 20k100 1k 10k
f − Frequency − Hz
VDD = 3.3 V,
BW = 10 Hz to 22 kHz
RL = 16 Ω
− Output Noise Voltage −
VnVµ
AV = −1 V/V
AV = −10 V/V
(RMS)
100
10
120 20k100 1k 10k
f − Frequency − Hz
VDD = 5 V,
BW = 10 Hz to 22 kHz
RL = 16 Ω
AV = −1 V/V
AV = −10 V/V
− Output Noise Voltage −
VnVµ(RMS)
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
IN1− to VO2
IN2− to VO1
VDD = 3.3 V,
PO = 25 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
IN1− to VO2
IN2− to VO1
VDD = 3.3 V,
PO = 40 mW,
CB = 1 µF,
RL = 16 Ω,
AV = −1 V/V
TPA6110A2
www.ti.com
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
OUTPUT NOISE VOLTAGE OUTPUT NOISE VOLTAGE
vs vs
FREQUENCY FREQUENCY
Figure 17. Figure 18.
CROSSTALK CROSSTALK
vs vs
FREQUENCY FREQUENCY
Figure 19. Figure 20.
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−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
IN1− to VO2
IN2− to VO1
VDD = 3.3 V,
PO = 60 mW,
CB = 1 µF,
RL = 8 Ω,
AV = −1 V/V
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
VDD = 5 V,
PO = 60 mW,
CB = 1 µF,
RL = 32 Ω,
AV = −1 V/V
IN1− to VO2
IN2− to VO1
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
VDD = 5 V,
PO = 100 mW,
CB = 1 µF,
RL = 16 Ω,
AV = −1 V/V
IN1− to VO2
IN2− to VO1
−120
0
−110
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k100 1k 10k
f − Frequency − Hz
Crosstalk − dB
VDD = 5 V,
PO = 150 mW,
CB = 1 µF,
RL = 8 Ω,
AV = −1 V/V
IN1− to VO2
IN2− to VO1
TPA6110A2
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
www.ti.com
CROSSTALK CROSSTALK
vs vs
FREQUENCY FREQUENCY
Figure 21. Figure 22.
CROSSTALK CROSSTALK
vs vs
FREQUENCY FREQUENCY
Figure 23. Figure 24.
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Product Folder Link(s): TPA6110A2
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10 100 1 k 10 k
Shutdown Attenuation − dB
f − Frequency − Hz
VDD = 5 V,
RL = 16 Ω,
CB = 1 µF
20 k
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
0
10 100 1 k 10 k
Shutdown Attenuation − dB
f − Frequency − Hz
VDD = 3.3 V,
RL = 16 Ω,
CB = 1 µF
20 k
−40
−20
0
20
40
60
80
100
120
Open-Loop Gain − dB
− Phase Margin − Deg
1 k 10 k 100 k 1 M 10 M
−180
−150
−120
−90
−60
−30
0
30
60
90
120
150
180
f − Frequency − Hz
Phase
Gain
VDD = 3.3 V
RL = 10 kΩ
Φm
−40
−20
0
20
40
60
80
100
120
1 k 10 k 100 k 1 M 10 M
−180
−150
−120
−90
−60
−30
0
30
60
90
120
150
180
Open-Loop Gain − dB
f − Frequency − Hz
Phase
Gain
VDD = 5 V
RL = 10 kΩ
− Phase Margin − DegΦm
TPA6110A2
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SLOS314B –DECEMBER 2000–REVISED MARCH 2011
SHUTDOWN ATTENUATION SHUTDOWN ATTENUATION
vs vs
FREQUENCY FREQUENCY
Figure 25. Figure 26.
OPEN-LOOP GAIN AND PHASE MARGIN OPEN-LOOP GAIN AND PHASE MARGIN
vs vs
FREQUENCY FREQUENCY
Figure 27. Figure 28.
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50
25
08 12 16 20 32 36 40
75
100
45 52 56 64
− Output Power − mW
RL − Load Resistance − Ω
VDD = 3.3 V,
THD+N = 1%,
AV = −1 V/V
24 28 44 60
PO
0
50
100
150
200
250
8 12 16 20 24 28 32 36 40 44 48 52 56 60 64
RL − Load Resistance − Ω
VDD = 5 V,
THD+N = 1%,
AV = −1 V/V
− Output Power − mWPO
0
0.5
1
1.5
2
2.5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
− Supply Current − mAIDD
VDD − Supply V oltage − V
0
20
40
60
80
100
120
12345678910
SNR − Signal-to-Noise Ratio − dB
AV − Voltage Gain − V/V
VDD = 5 V
TPA6110A2
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
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OUTPUT POWER OUTPUT POWER
vs vs
LOAD RESISTANCE LOAD RESISTANCE
Figure 29. Figure 30.
SUPPLY CURRENT SIGNAL-TO-NOISE RATIO
vs vs
SUPPLY VOLTAGE VOLTAGE GAIN
Figure 31. Figure 32.
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0
Power Dissipation/Amplifier − mW
Load Power − mW
80
40
20
080 120 180 200
10
30
50
14010020 6040 160
60
70
VDD = 3.3 V 8 Ω
16 Ω
64 Ω
32 Ω
TPA6110A2
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POWER DISSIPATION/AMPLIFIER POWER DISSIPATION/AMPLIFIER
vs vs
LOAD POWER LOAD POWER
Figure 33. Figure 34.
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Gain + * ǒRf
RiǓ
fc(highpass) +1
2pRiCi
Ci+1
2pRifc(highpass)
Effective Impedance +RfRi
Rf)Ri
fc(lowpass) +1
2pRfCF
TPA6110A2
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
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APPLICATION INFORMATION
GAIN SETTING RESISTORS, Rfand RiINPUT CAPACITOR, Ci
The gain for the TPA6110A2 is set by resistors RfIn the typical application, an input capacitor, Ci, is
and Riaccording to Equation 1. required to allow the amplifier to bias the input signal
to the proper dc level for optimum operation. In this
case, Ciand Riform a high-pass filter with the corner
frequency determined in Equation 4.
(1)
Given that the TPA6110A2 is a MOS amplifier, the (4)
input impedance is very high. Consequently input
leakage currents are not generally a concern. The value of Cidirectly affects the bass (low
However, noise in the circuit increases as the value frequency) performance of the circuit. Consider the
of Rfincreases. In addition, a certain range of Rfexample where Riis 20 kΩand the specification calls
values is required for proper start-up operation of the for a flat bass response down to 20 Hz. Equation 4 is
amplifier. Considering these factors, it is reconfigured as Equation 5.
recommended that the effective impedance seen by
the inverting node of the amplifier be set between 5
kΩand 20 kΩ. The effective impedance is calculated
using Equation 2.(5)
In this example, Ciis 0.40 µF, so one would likely
choose a value in the range of 0.47 µF to 1 µF. A
further consideration for this capacitor is the leakage
(2) path from the input source through the input network
For example, if the input resistance is 20 kΩand the formed by Ri, Ci, and the feedback resistor (Rf) to the
feedback resistor is 20 kΩ, the gain of the amplifier is load. This leakage current creates a dc offset voltage
-1, and the effective impedance at the inverting at the input to the amplifier that reduces useful
terminal is 10 kΩ, a value within the recommended headroom, especially in high-gain applications (gain
range. >10). For this reason a low-leakage tantalum or
ceramic capacitor is the best choice. When polarized
For high performance applications, metal-film capacitors are used, connect the positive side of the
resistors are recommended because they tend to capacitor to the amplifier input in most applications.
have lower noise levels than carbon resistors. For The dc level there is held at VDD/2—likely higher than
values of Rfabove 50 kΩ, the amplifier tends to the source dc level. It is important to confirm the
become unstable due to a pole formed from Rfand capacitor polarity in the application.
the inherent input capacitance of the MOS input
structure. For this reason, a small compensation POWER SUPPLY DECOUPLING, C(S)
capacitor of approximately 5 pF should be placed in
parallel with Rf. This, in effect, creates a low-pass The TPA6110A2 is a high-performance CMOS audio
filter network with the cutoff frequency defined by amplifier that requires adequate power-supply
Equation 3.decoupling to minimize the output total harmonic
distortion (THD). Power-supply decoupling also
prevents oscillations when long lead lengths are used
between the amplifier and the speaker. The optimum
(3) decoupling is achieved by using two capacitors of
different types that target different types of noise on
For example, if Rfis 100 kΩand CFis 5 pF then the power supply leads. For higher frequency
fc(lowpass) is 318 kHz, which is well outside the audio transients, spikes, or digital hash on the line, a good
range. low equivalent-series-resistance (ESR) ceramic
capacitor, typically 0.1 µF, placed as close as
possible to the device VDD lead, works best. For
filtering lower-frequency noise signals, a larger
aluminum electrolytic capacitor of 10 µF or greater
placed near the power amplifier is recommended.
14 Submit Documentation Feedback Copyright ©2000–2011, Texas Instruments Incorporated
Product Folder Link(s): TPA6110A2
1
ǒC(B) 230 kΩǓv1
ǒCiRiǓ
1
ǒC(B) 230 kΩǓv1
ǒCiRiǓƠ1
RLC(C)
fc+1
2pRLC(C)
TPA6110A2
www.ti.com
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
Table 1. Common Load Impedances vs Low-
MIDRAIL BYPASS CAPACITOR, C(B) Frequency Output Characteristics in SE Mode
The midrail bypass capacitor, C(B), serves several RLC(C) LOWEST FREQUENCY
important functions. During start up, C(B) determines 32 Ω68 µF 73 Hz
the rate at which the amplifier starts up. This helps to
push the start-up pop noise into the subaudible range 10,000 Ω68 µF 0.23 Hz
(so low it can not be heard). The second function is to 47,000 Ω68 µF 0.05 Hz
reduce noise produced by the power supply caused
by coupling into the output drive signal. This noise is As Table 1 indicates, headphone response is
from the midrail generation circuit internal to the adequate, and drive into line level inputs (a home
amplifier. The capacitor is fed from a 230-kΩsource stereo for example) is very good.
inside the amplifier. To keep the start-up pop as low The output coupling capacitor required in
as possible, maintain the relationship shown in single-supply SE mode also places additional
Equation 6.constraints on the selection of other components in
the amplifier circuit. With the rules described earlier
still valid, add the following relationship:
(6)
Consider an example circuit where C(B) is 1 µF, Ciis
1µF, and Riis 20 kΩ. Subsitituting these values into (8)
the equation 9 results in: 6.25 ≤50 which satisfies the
rule. Bypass capacitor, C(B), values of 0.1 µF to 1 µFUSING LOW-ESR CAPACITORS
ceramic or tantalum low-ESR capacitors are Low-ESR capacitors are recommended throughout
recommended for the best THD and noise this application. A real capacitor can be modeled
performance. simply as a resistor in series with an ideal capacitor.
The voltage drop across this resistor minimizes the
OUTPUT COUPLING CAPACITOR, C(C) beneficial effects of the capacitor in the circuit. The
In a typical single-supply, single-ended (SE) lower the equivalent value of this resistance, the
configuration, an output coupling capacitor (C(C)) is more the real capacitor behaves like an ideal
required to block the dc bias at the output of the capacitor.
amplifier, thus preventing dc currents in the load. As
with the input coupling capacitor, the output coupling 5-V VERSUS 3.3-V OPERATION
capacitor and impedance of the load form a The TPA6110A2 was designed for operation over a
high-pass filter governed by Equation 7.supply range of 2.5 V to 5.5 V. This data sheet
provides full specifications for 5-V and 3.3-V
operation, since these are considered to be the two
most common supply voltages. There are no special
(7) considerations for 3.3-V versus 5-V operation as far
as supply bypassing, gain setting, or stability. The
The main disadvantage, from a performance most important consideration is that of output power.
standpoint, is that the typically-small load impedance Each amplifier in theTPA6110A2 can produce a
drives the low-frequency corner higher. Large values maximum voltage swing of VDD –1 V. This means,
of C(C) are required to pass low frequencies into the for 3.3-V operation, clipping starts to occur when
load. Consider the example where a C(C) of 68 µF is VO(PP) = 2.3 V as opposed when VO(PP) = 4 V while
chosen and loads vary from 32 Ωto 47 kΩ.Table 1 operating at 5 V. The reduced voltage swing
summarizes the frequency response characteristics subsequently reduces maximum output power into
of each configuration. the load before distortion becomes significant.
Copyright ©2000–2011, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): TPA6110A2
TPA6110A2
SLOS314B –DECEMBER 2000–REVISED MARCH 2011
www.ti.com
REVISION HISTORY
Changes from Original (December 2000) to Revision A Page
•Change the DC ELECTRICAL CHARACTERISTICS table From TA= 25°C, VDD = 3.3 V To: TA= 25°C, VDD = 2.5 V,
updated values ...................................................................................................................................................................... 3
•Change the DC ELECTRICAL CHARACTERISTICS table From TA= 25°C, VDD = 5 V To: TA= 25°C, VDD = 5.5 V,
updated values ...................................................................................................................................................................... 3
•Changed Figure 8, From: RL= 8kΩTo: RL= 8Ω.................................................................................................................. 6
•Changed Figure 24, From: frequency limit at 1M To: frequency limit at 20K ..................................................................... 10
•Changed Figure 25, From: frequency limit at 1M To: frequency limit at 20K ..................................................................... 11
Changes from Revision A (September 2004) to Revision B Page
•Changed the DC Electrical Characteristice (VDD = 2.5V) for IDD(SD) From: Typ = 10 Max = 50 To: Typ = 1 Max = 10 ........ 3
•Changed the DC Electrical Characteristice (VDD = 5.5V) for IDD(SD) From: Typ = 60 Max = 100 To: Typ = 1 Max = 10 ...... 3
16 Submit Documentation Feedback Copyright ©2000–2011, Texas Instruments Incorporated
Product Folder Link(s): TPA6110A2
PACKAGE OPTION ADDENDUM
www.ti.com 28-Apr-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPA6110A2DGN ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6110A2DGNG4 ACTIVE MSOP-
PowerPAD DGN 8 80 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6110A2DGNR ACTIVE MSOP-
PowerPAD DGN 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPA6110A2DGNRG4 ACTIVE MSOP-
PowerPAD DGN 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPA6110A2DGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TPA6110A2DGNR MSOP-
Power
PAD
DGN 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 4-May-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPA6110A2DGNR MSOP-PowerPAD DGN 8 2500 358.0 335.0 35.0
TPA6110A2DGNR MSOP-PowerPAD DGN 8 2500 364.0 364.0 27.0
PACKAGE MATERIALS INFORMATION
www.ti.com 4-May-2012
Pack Materials-Page 2
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