Ultralow Noise XFET Voltage References
with Current Sink and Source Capability
Data Sheet
ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M Document Feedback
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FEATURES
Low noise (0.1 Hz to 10.0 Hz): 3.5 µV p-p @ 2.5 V output
No external capacitor required
Low temperature coefficient
A Grade: 10 ppm/°C maximum
B Grade: 3 ppm/°C maximum
Load regulation: 15 ppm/mA
Line regulation: 20 ppm/V
Wide operating range
ADR430: 4.1 V to 18 V
ADR431: 4.5 V to 18 V
ADR433: 5.0 V to 18 V
ADR434: 6.1 V to 18 V
ADR435: 7.0 V to 18 V
High output source and sink current: +30 mA and −20 mA
Wide temperature range: −40°C to +125°C
APPLICATIONS
Precision data acquisition systems
High resolution data converters
Medical instruments
Industrial process control systems
Optical control circuits
Precision instruments
PIN CONFIGURATIONS
NOTES
1. NI C = NO I NTERNAL CONNECTI ON
2. TP = TEST PIN (DO NOT CONNECT)
ADR43x
TOP VIEW
(No t t o Scal e)
TP 1
VIN 2
NIC 3
GND 4
TP
COMP
VOUT
TRIM
8
7
6
5
04500-001
Figure 1. 8-Lead MSOP (RM-8)
NOTES
1. NI C = NO I NTERNAL CONNECTI ON
2. TP = TEST PIN (DO NOT CONNECT)
ADR43x
TOP VIEW
(No t t o Scal e)
TP
1
V
IN 2
NIC
3
GND
4
TP
COMP
V
OUT
TRIM
8
7
6
5
04500-041
Figure 2. 8-Lead SOIC_N (R-8)
GENERAL DESCRIPTION
The ADR43x series is a family of XFET® voltage references
featuring low noise, high accuracy, and low temperature drift
performance. Using Analog Devices, Inc., patented temperature
drift curvature correction and XFET (eXtra implanted junction
FET) technology, voltage change vs. temperature nonlinearity in
the ADR43x is minimized.
The XFET references operate at lower current (800 µA) and
lower supply voltage headroom (2 V) than buried Zener
references. Buried Zener references require more than 5 V
headroom for operation. The ADR43x XFET references are
the only low noise solutions for 5 V systems.
The ADR43x family has the capability to source up to 30 mA of
output current and sink up to 20 mA. It also comes with a trim
terminal to adjust the output voltage over a 0.5% range without
compromising performance.
The ADR43x is available in 8-lead MSOP and 8-lead narrow
SOIC packages. All versions are specified over the extended
industrial temperature range of −40°C to +125°C.
Table 1. Selection Guide
Model
Output
Voltage (V) Accuracy (mV)
Temperature
Coefficient
(ppm/°C)
ADR430A 2.048 ±3 10
ADR430B 2.048 ±1 3
ADR431A 2.500 ±3 10
ADR431B 2.500 ±1 3
ADR433A 3.000 ±4 10
ADR433B 3.000 ±1.5 3
ADR434A 4.096 ±5 10
ADR434B 4.096 ±1.5 3
ADR435A
5.000
±6
ADR435B 5.000 ±2 3
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 2 of 22
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Pin Configurations ........................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 3
Specifications ..................................................................................... 4
ADR430 Electrical Characteristics ............................................. 4
ADR431 Electrical Characteristics ............................................. 5
ADR433 Electrical Characteristics ............................................. 6
ADR434 Electrical Characteristics ............................................. 7
ADR435 Electrical Characteristics ............................................. 8
Absolute Maximum Ratings ............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution .................................................................................. 9
Typical Performance Characteristics ........................................... 10
Theory of Operation ...................................................................... 15
Basic Voltage Reference Connections ...................................... 15
Noise Performance ..................................................................... 15
High Frequency Noise ............................................................... 15
Turn-On Time ............................................................................ 16
Applications Information .............................................................. 17
Output Adjustment .................................................................... 17
Reference for Converters in Optical Network Control
Circuits......................................................................................... 17
High Voltage Floating Current Source .................................... 17
Kelvin Connection ..................................................................... 17
Dual Polarity References ........................................................... 18
Programmable Current Source ................................................ 18
Programmable DAC Reference Voltage .................................. 19
Precision Voltage Reference for Data Converters .................. 19
Precision Boosted Output Regulator ....................................... 20
Outline Dimensions ....................................................................... 21
Ordering Guide .......................................................................... 22
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 3 of 22
REVISION HISTORY
6/15—Rev. L to Rev. M
Changes to Ordering Guide ........................................................... 22
7/14—Rev. K to Rev. L
Changes to Default Conditions, Typical Performance
Characteristics Section ................................................................... 10
Changes to Ordering Guide ........................................................... 22
5/14—Rev. J to Rev. K
Deleted ADR439 (Throughout) ...................................................... 1
Changes to Features Section and Table 1 ....................................... 1
Deleted Table 7; Renumbered Sequentially ................................... 9
Changes to Ordering Guide ........................................................... 22
7/11—Rev. I to Rev. J
Changes to Figure 1 and Figure 2 .................................................... 1
Changes to Ordering Guide ........................................................... 23
5/11—Rev. H to Rev. I
Added Endnote 1 in Table 2 ............................................................. 4
Added Endnote 1 in Table 3 ............................................................. 5
Added Endnote 1 in Table 4 ............................................................. 6
Added Endnote 1 in Table 5 ............................................................. 7
Added Endnote 1 in Table 6 ............................................................. 8
Added Endnote 1 in Table 7 ............................................................. 9
Deleted Negative Precision Reference Without Precision
Resistors Section .............................................................................. 17
Deleted Figure 36; Renumbered Sequentially ............................. 18
2/11—Rev. G to Rev. H
Updated Outline Dimensions ........................................................ 21
Changes to Ordering Guide ........................................................... 22
7/10—Rev. F to Rev. G
Changes to Storage Temperature Range in Table 9....................... 9
6/10—Rev. E to Rev. F
Updated Pin Name NC to COMP Throughout ............................ 1
Changes to Figure 1 and Figure 2 .................................................... 1
Changes to Figure 30 and High Frequency Noise Section ........ 15
Updated Outline Dimensions ........................................................ 21
Changes to Ordering Guide ........................................................... 22
1/09—Rev. D to Rev. E
Added High Frequency Noise Section and Equation 3;
Renumbered Sequentially .............................................................. 15
Inserted Figure 31, Figure 32, and Figure 33; Renumbered
Sequentially ...................................................................................... 16
Changes to the Ordering Guide .................................................... 22
12/07—Rev. C to Rev. D
Changes to Initial Accuracy and Ripple Rejection Ratio
Parameters in Table 2 through Table 7 ........................................... 3
Changes to Table 9 ............................................................................ 9
Changes to Theory of Operation Section .................................... 15
Updated Outline Dimensions........................................................ 20
8/06—Rev. B to Rev. C
Updated Format ................................................................. Universal
Changes to Table 1 ............................................................................ 1
Changes to Table 3 ............................................................................ 4
Changes to Table 4 ............................................................................ 5
Changes to Table 7 ............................................................................ 8
Changes to Figure 26 ...................................................................... 14
Changes to Figure 31 ...................................................................... 16
Updated Outline Dimensions........................................................ 20
Changes to Ordering Guide ........................................................... 21
9/04—Rev. A to Rev. B
Added New Grade .............................................................. Universal
Changes to Specifications................................................................. 3
Replaced Figure 3, Figure 4, Figure 5 ........................................... 10
Updated Ordering Guide ............................................................... 21
6/04—Rev. 0 to Rev. A
Changes to Format ............................................................. Universal
Changes to the Ordering Guide .................................................... 20
12/03—Revision 0: Initial Version
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 4 of 22
SPECIFICATIONS
ADR430 ELECTRICAL CHARACTERISTICS
VIN = 4.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 2.045 2.048 2.051 V
B Grade 2.047 2.048 2.049 V
INITIAL ACCURACY1 VOERR
A Grade ±3 mV
±0.15 %
B Grade ±1 mV
±0.05 %
TEMPERATURE COEFFICIENT
TCV
O
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 4.1 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 560 800 µA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 3.5 µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 60 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VO 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS VO_HYS 20 ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz –70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE VIN 4.1 18 V
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 5 of 22
ADR431 ELECTRICAL CHARACTERISTICS
VIN = 4.5 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 2.497 2.500 2.503 V
B Grade 2.499 2.500 2.501 V
INITIAL ACCURACY1 VOERR
A Grade ±3 mV
±0.12 %
B Grade ±1 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade
−40°C < T
A
< +125°C
1
3
ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 4.5 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 5.0 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 580 800 µA
VOLTAGE NOISE
e
N
p-p
0.1 Hz to 10.0 Hz
3.5
µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 80 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VO 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS VO_HYS 20 ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE VIN 4.5 18 V
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 6 of 22
ADR433 ELECTRICAL CHARACTERISTICS
VIN = 5.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 4.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 2.996 3.000 3.004 V
B Grade 2.9985 3.000 3.0015 V
INITIAL ACCURACY1 VOERR
A Grade ±4 mV
±0.13 %
B Grade ±1.5 mV
±0.05 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 5 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 6 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 6 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 590 800 µA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 3.75 µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 90 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VO 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS VO_HYS 20 ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE VIN 5.0 18 V
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 7 of 22
ADR434 ELECTRICAL CHARACTERISTICS
VIN = 6.1 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 5.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 4.091 4.096 4.101 V
B Grade 4.0945 4.096 4.0975 V
INITIAL ACCURACY1 VOERR
A Grade ±5 mV
±0.12 %
B Grade ±1.5 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 6.1 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 7 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 7 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 595 800 µA
VOLTAGE NOISE eN p-p 0.1 Hz to 10.0 Hz 6.25 µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 100 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VO 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS VO_HYS 20 ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE
OPERATING RANGE VIN 6.1 18 V
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 8 of 22
ADR435 ELECTRICAL CHARACTERISTICS
VIN = 7.0 V to 18 V, IL = 0 mA, TA = 25°C, unless otherwise noted.
Table 6.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT VOLTAGE VO
A Grade 4.994 5.000 5.006 V
B Grade 4.998 5.000 5.002 V
INITIAL ACCURACY1 VOERR
A Grade ±6 mV
±0.12 %
B Grade ±2 mV
±0.04 %
TEMPERATURE COEFFICIENT TCVO
A Grade −40°C < TA < +125°C 2 10 ppm/°C
B Grade −40°C < TA < +125°C 1 3 ppm/°C
LINE REGULATION ∆VO/∆VIN VIN = 7 V to 18 V, −40°C < TA < +125°C 5 20 ppm/V
LOAD REGULATION ∆VO/∆IL IL = 0 mA to 10 mA, VIN = 8 V, −40°C < TA < +125°C 15 ppm/mA
∆VO/∆IL IL = −10 mA to 0 mA, VIN = 8 V, −40°C < TA < +125°C 15 ppm/mA
QUIESCENT CURRENT IIN No load, −40°C < TA < +125°C 620 800 µA
VOLTAGE NOISE eN p-p 0.1 Hz to 10 Hz 8 µV p-p
VOLTAGE NOISE DENSITY eN 1 kHz 115 nV/√Hz
TURN-ON SETTLING TIME tR CL = 0 µF 10 µs
LONG-TERM STABILITY2 ∆VO 1000 hours 40 ppm
OUTPUT VOLTAGE HYSTERESIS VO_HYS 20 ppm
RIPPLE REJECTION RATIO RRR fIN = 1 kHz −70 dB
SHORT CIRCUIT TO GND ISC 40 mA
SUPPLY VOLTAGE OPERATING RANGE VIN 7.0 18 V
SUPPLY VOLTAGE HEADROOM VIN − VO 2 V
1 Initial accuracy does not include shift due to solder heat effect.
2 The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 9 of 22
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 7.
Parameter Rating
Supply Voltage 20 V
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature, Soldering (60 sec) 300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 8. Thermal Resistance
Package Type θJA θ
JC Unit
8-Lead SOIC_N (R) 130 43 °C/W
8-Lead MSOP (RM) 142 44 °C/W
ESD CAUTION
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 10 of 22
TYPICAL PERFORMANCE CHARACTERISTICS
Default conditions: VIN = 7 V, TA = 25°C, CIN = COUT = 0.1 μF, unless otherwise noted.
2.4995
OUTPUT VOLTAGE (V)
2.5009
2.5007
2.5005
2.5003
2.5001
2.4999
2.4997
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-015
Figure 3. ADR431 Output Voltage vs. Temperature
OUTPUT VOLTAGE (V)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
4.0950
4.0980
4.0975
4.0970
4.0965
4.0960
4.0955
04500-016
Figure 4. ADR434 Output Voltage vs. Temperature
OUTPUT VOLTAGE (V)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
4.9990
5.0025
5.0020
5.0015
5.0010
5.0005
5.0000
4.9995
04500-017
Figure 5. ADR435 Output Voltage vs. Temperature
0.3
0.4
0.5
0.6
0.7
0.8
SUPPLY CURRENT (mA)
810
4 6 12 14 16
INP UT VOLTAGE (V)
+125°C
+25°C
–40°C
04500-018
Figure 6. ADR435 Supply Current vs. Input Voltage
400
450
500
550
600
650
700
SUPPLY CURRENT (µ A)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-019
Figure 7. ADR435 Supply Current vs. Temperature
0.40
0.42
0.44
0.46
0.48
0.50
0.52
0.54
0.56
0.58
0.60
SUPPLY CURRENT (mA)
10 126 8 14 16 18
INP UT VOLTAGE (V)
+125°C
+25°C
–40°C
04500-020
Figure 8. ADR431 Supply Current vs. Input Voltage
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 11 of 22
400
430
460
490
520
550
580
610
SUPPLY CURRENT (µ A)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-021
Figure 9. ADR431 Supply Current vs. Temperature
0
3
6
9
12
15
LO AD RE GULATION (ppm/mA)
I
L
=0mA to 10mA
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-022
Figure 10. ADR431 Load Regulation vs. Temperature
0
3
6
9
12
15
LO AD RE GULATION (ppm/mA)
I
L
=0mA to 10mA
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-023
Figure 11. ADR435 Load Regulation vs. Temperature
0
0.5
1.0
1.5
2.0
2.5
DIFFERENTIAL VOLTAGE (V)
LOAD CURRENT ( mA)
–5–10 0510
–40°C
+25°C
+125°C
04500-024
Figure 12. ADR431 Minimum Input/Output
Differential Voltage vs. Load Current
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
MINIMUM HEADRO O M (V)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
NO LOAD
04500-025
Figure 13. ADR431 Minimum Headroom vs. Temperature
0
0.5
1.0
1.5
2.0
2.5
DIFFERENTIAL VOLTAGE (V)
LOAD CURRENT ( mA)
–5–10 0 5 10
–40°C
+25°C
+125°C
04500-026
Figure 14. ADR435 Minimum Input/Output
Differential Voltage vs. Load Current
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 12 of 22
0.9
1.1
1.3
1.5
1.7
1.9
MINIMUM HEADRO O M (V)
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
NO LOAD
04500-027
Figure 15. ADR435 Minimum Headroom vs. Temperature
–4
0
4
8
12
16
20
LI NE RE GULATION (ppm/V)
V
IN
=7V TO 18V
TEMPERATURE ( °C)
–40 –25 –10 520 35 50 65 80 95 110 125
04500-028
Figure 16. ADR435 Line Regulation vs. Temperature
C
IN
= 0.01µF
NO LOAD V
O
= 1V/ DIV
V
IN
= 2V/ DIV
TIME = 4µs/DIV
04500-030
Figure 17. ADR431 Turn-On Response
C
L
= 0.01µF
NO INPUT CAPACIT OR
V
O
= 1V/ DIV
V
IN
= 2V/ DIV
TIME = 4µs/DIV
04500-031
Figure 18. ADR431 Turn-On Response, 0.01 µF Load Capacitor
C
IN
= 0.01µF
NO LOAD
V
O
= 1V/ DIV
V
IN
= 2V/ DIV TIME = 4µs/DIV
04500-032
Figure 19. ADR431 Turn-Off Response
BYPASS CAP ACIT OR = 0µ F
V
O
= 50mV/ DIV
TIME = 100µ s/DI V
LINE
INTERRUPTION
V
IN
= 500mV/ DIV
04500-033
Figure 20. ADR431 Line Transient Response
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 13 of 22
BYPASS CAPACITOR = 0.1µF
V
O
= 50mV/DIV
TIME = 100µs/DIV
LINE
INTERRUPTION
V
IN
= 500mV/DIV
04500-034
Figure 21. ADR431 Line Transient Response, 0.1 μF Bypass Capacitor
1µV/DIV
TIME = 1s/DIV
04500-035
Figure 22. ADR431 0.1 Hz to 10.0 Hz Voltage Noise
TIME = 1s/DIV
50µV/DIV
04500-036
Figure 23. ADR431 10 Hz to 10 kHz Voltage Noise
TIME = 1s/DIV
2µV/DIV
04500-037
Figure 24. ADR435 0.1 Hz to 10.0 Hz Voltage Noise
TIME = 1s/DIV
50µV/DIV
04500-038
Figure 25. ADR435 10 Hz to 10 kHz Voltage Noise
0
2
4
6
8
10
12
14
NUMBER OF PARTS
DEVIATION (PPM)
–110 –90 –70 –50 –30 –10 10 30 50 70 90 110
04500-029
Figure 26. ADR431 Typical Hysteresis
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 14 of 22
0
5
10
15
20
25
30
35
40
45
50
OUTPUT IMP EDANCE (Ω)
FREQUENCY (Hz)
100 10k1k 100k
ADR435
ADR433
ADR430
04500-039
Figure 27. Output Impedance vs. Frequency
–150
–130
–110
–90
–70
–50
RIPP LE RE JE CTION (dB)
–30
–10
10
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
04500-040
Figure 28. Ripple Rejection
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 15 of 22
THEORY OF OPERATION
The ADR43x series of references uses a reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFETs), one of which has an extra channel implant to raise its
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified and
used to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about −120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be compensated closely by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate band gap references. The primary
advantage of an XFET reference is its correction term, which is
~30 times lower and requires less correction than that of a band
gap reference. Because most of the noise of a band gap reference
comes from the temperature compensation circuitry, the XFET
results in much lower noise.
Figure 29 shows the basic topology of the ADR43x series. The
temperature correction term is provided by a current source
with a value designed to be proportional to absolute temperature.
The general equation is
VOUT = G (ΔVP – R1 × IPTAT) (1)
where:
G is the gain of the reciprocal of the divider ratio.
∆VP is the difference in pinch-off voltage between the two JFETs.
IPTAT is the positive temperature coefficient correction current.
ADR43x devices are created by on-chip adjustment of R2 and R3 to
achieve 2.048 V or 2.500 V, respectively, at the reference output.
**
I
PTAT
I
1
I
1
*EXTRA CHANNEL IMPLANT
V
OUT
= G(ΔV
P
– R1 × I
PTAT
)
R2
V
IN
V
OUT
GND
R3
R1
ΔV
P
ADR43x
04500-002
Figure 29. Simplified Schematic Device
Power Dissipation Considerations
The ADR43x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.1 V
to 18 V. When these devices are used in applications at higher
currents, use the following equation to account for the
temperature effects due to the power dissipation increases:
TJ = PD × θJA + TA (2)
where:
TJ and TA are the junction and ambient temperatures, respectively.
PD is the device power dissipation.
θJA is the device package thermal resistance.
BASIC VOLTAGE REFERENCE CONNECTIONS
Voltage references, in general, require a bypass capacitor
connected from VOUT to GND. The circuit in Figure 30
illustrates the basic configuration for the ADR43x family
of references. Other than a 0.1 µF capacitor at the output to
help improve noise suppression, a large output capacitor at
the output is not required for circuit stability.
+
NOTES:
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT)
1
2
3
4 5
8
6
7
ADR43x
TOP VI EW
(No t t o Scal e)
TP
COMP
V
OUT
TRIM
TP
NC
GND
V
IN
10µF0.1µF
0.1µF
04500-044
Figure 30. Basic Voltage Reference Configuration
NOISE PERFORMANCE
The noise generated by the ADR43x family of references is
typically less than 3.75 µV p-p over the 0.1 Hz to 10.0 Hz band
for ADR430, ADR431, and ADR433. Figure 22 shows the 0.1 Hz
to 10.0 Hz noise of the ADR431, which is only 3.5 µV p-p. The
noise measurement is made with a band-pass filter made of a
2-pole high-pass filter with a corner frequency at 0.1 Hz and a
2-pole low-pass filter with a corner frequency at 10.0 Hz.
HIGH FREQUENCY NOISE
The total noise generated by the ADR43x family of references is
composed of the reference noise and the op amp noise. Figure 31
shows the wideband noise from 10 Hz to 25 kHz. An internal node
of the op amp is brought out on Pin 7, and by overcompensating
the op amp, the overall noise can be reduced.
This is understood by considering that in a closed-loop
configuration, the effective output impedance of an op amp is
β+
=
VO
O
O
A
r
R1
(3)
where:
RO is the apparent output impedance.
rO is the output resistance of the op amp.
AVO is the open-loop gain at the frequency of interest.
β is the feedback factor.
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 16 of 22
Equation 3 shows that the apparent output impedance is reduced
by approximately the excess loop gain; therefore, as the frequency
increases, the excess loop gain decreases, and the apparent output
impedance increases. A passive element whose impedance
increases as its frequency increases is an inductor. When a
capacitor is added to the output of an op amp or a reference, it
forms a tuned circuit that resonates at a certain frequency and
results in gain peaking. This can be observed by using a model
of a semiperfect op amp with a single-pole response and some
pure resistance in series with the output. Changing capacitive
loads results in peaking at different frequencies. For most normal
op amp applications with low capacitive loading (<100 pF), this
effect is usually not observed.
However, references are used increasingly to drive the reference
input of an ADC that may present a dynamic, switching capacitive
load. Large capacitors, in the microfarad range, are used to reduce
the change in reference voltage to less than one-half LSB. Figure 31
shows the ADR431 noise spectrum with various capacitive values
to 50 µF. With no capacitive load, the noise spectrum is relatively
flat at approximately 60 nV/√Hz to 70 nV/√Hz. With various
values of capacitive loading, the predicted noise peaking
becomes evident.
10
100
1000
10 100 1k 10k 100k
ADR431
NO COMPENSATION
C
L
= 0µF
C
L
= 1µF
C
L
= 50µF
C
L
= 10µF
04500-042
FREQUENCY ( Hz )
NOISE DENSITY (nV/√Hz)
Figure 31. Noise vs. Capacitive Loading
The op amp within the ADR43x family uses the classic RC
compensation technique. Monolithic capacitors in an IC are
limited to tens of picofarads. With very large external capacitive
loads, such as 50 µF, it is necessary to overcompensate the op amp.
The internal compensation node is brought out on Pin 7, and
an external series RC network can be added between Pin 7 and
the output, Pin 6, as shown in Figure 32.
+
NOTES
1. NC = NO CO NNE CT
2. TP = TEST PIN (DO NOT CONNECT)
1
2
3
45
8
6
7
ADR43x
TOP VIEW
(Not t o Scale)
TP
COMP
V
OUT
TRIM
TP
NC
GND
V
IN
10µF 0.1µF
0.1µF
04500-003
82kΩ
10nF
Figure 32. Compensated Reference
The 82 kΩ resistor and 10 nF capacitor can eliminate the noise
peaking (see Figure 33). The COMP pin should be left
unconnected if unused.
10
100
10 100 1k 10k
04500-043
FREQUENCY ( Hz )
NOISE DENSITY (nV/√Hz)
CL = 1µF
RC 82kΩ AND 10nF
CL = 10µF
RC 82kΩ AND 10nF
CL = 50µF
RC 82kΩ AND 10nF
Figure 33. Noise with Compensation Network
TURN-ON TIME
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error band
is defined as the turn-on settling time. Two components normally
associated with this are the time for the active circuits to settle
and the time for the thermal gradients on the chip to stabilize.
Figure 17 and Figure 18 show the turn-on settling time for the
ADR431.
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 17 of 22
APPLICATIONS INFORMATION
OUTPUT ADJUSTMENT
The ADR43x trim terminal can be used to adjust the output
voltage over a ±0.5% range. This feature allows the system designer
to trim system errors out by setting the reference to a voltage
other than the nominal. This is also helpful if the part is used in
a system at temperature to trim out any error. Adjustment of the
output has negligible effect on the temperature performance of the
device. To avoid degrading temperature coefficients, both the
trimming potentiometer and the two resistors need to be low
temperature coefficient types, preferably <100 ppm/°C.
INPUT
OUTPUT
TRIM
V
IN
V
O
= ±0. 5%
GND
R1
470kΩ
R2 10kΩ (ADR430)
15kΩ (ADR431)
R
P
10kΩ
ADR43x
V
OUT
04500-004
Figure 34. Output Trim Adjustment
REFERENCE FOR CONVERTERS IN OPTICAL
NETWORK CONTROL CIRCUITS
In Figure 35, the high capacity, all optical router network
employs arrays of micromirrors to direct and route optical
signals from fiber to fiber without first converting them to
electrical form, which reduces the communication speed. The
tiny micromechanical mirrors are positioned so that each is
illuminated by a single wavelength that carries unique information
and can be passed to any desired input and output fiber. The
mirrors are tilted by the dual-axis actuators, which are controlled
by precision ADCs and DACs within the system. Due to the
microscopic movement of the mirrors, not only is the precision
of the converters important but the noise associated with these
controlling converters is also extremely critical. Total noise
within the system can be multiplied by the number of converters
employed. Therefore, to maintain the stability of the control
loop for this application, the ADR43x, with its exceptionally low
noise, is necessary.
GND
SOURCE FI BE R
GIMBAL + SENSOR DESTINATION
FIBER
ACTIVATOR
RIGHT
MEMS MIRROR
LAS ER BE AM
ACTIVATOR
LEFT
AMPLPREAMPAMPL
CONTROL
ELECTRONICS DAC
ADC
DAC
DSP
ADR431
ADR431
ADR431
04500-005
Figure 35. All Optical Router Network
HIGH VOLTAGE FLOATING CURRENT SOURCE
The circuit in Figure 36 can be used to generate a floating
current source with minimal self heating. This particular
configuration can operate on high supply voltages determined
by the breakdown voltage of the N-channel JFET.
V
IN
V
OUT
GND
OP90
+V
S
SST111
VISHAY
2N3904
R
L
2.1kΩ
–V
S
ADR43x
2
6
4
04500-007
Figure 36. High Voltage Floating Current Source
KELVIN CONNECTION
In many portable instrumentation applications, where printed
circuit board (PCB) cost and area go hand in hand, circuit
interconnects are very often of dimensionally minimum width.
These narrow lines can cause large voltage drops if the voltage
reference is required to provide load currents to various functions.
In fact, circuit interconnects can exhibit a typical line resistance
of 0.45 mΩ/square (for example, 1 oz. Cu). Force and sense
connections, also referred to as Kelvin connections, offer a
convenient method of eliminating the effects of voltage drops
in circuit wires. Load currents flowing through wiring resistance
produce an error (VERROR = R × IL) at the load. However, the
Kelvin connection of Figure 37 overcomes the problem by
including the wiring resistance within the forcing loop of the
operational amplifier.
Because the amplifier senses the load voltage, the operational
amplifier loop control forces the output to compensate for the
wiring error and to produce the correct voltage at the load.
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 18 of 22
V
IN
V
OUT
GND
R
LW
R
L
V
OUT
SENSE
V
OUT
FORCE
R
LW
V
IN
2
6
4
ADR43x
A1
OP191
+
04500-008
Figure 37. Advantage of Kelvin Connection
DUAL POLARITY REFERENCES
Dual polarity references can easily be made with an operational
amplifier and a pair of resistors. To avoid defeating the accuracy
obtained by the ADR43x, it is imperative to match the resistance
tolerance as well as the temperature coefficient of all the components.
6
2
4
5
–
10V
V
IN
V
IN
V
OUT
GND TRIM
R1 R2
U2
R3
V+
V–
+10V
–5V
+5V
10kΩ
1µF 0.1µF
U1
ADR435
OP1177
5kΩ
10kΩ
04500-009
Figure 38. +5 V and −5 V References Using ADR435
6
2
4
5
V
IN
V
OUT
GND TRIM
R1
5.6kΩ
U2
V+
V–
+10V
U1
ADR435
OP1177
+2.5V
–2.5V
R2
5.6kΩ
–10V
04500-010
Figure 39. +2.5 V and −2.5 V References Using ADR435
PROGRAMMABLE CURRENT SOURCE
Together with a digital potentiometer and a Howland current
pump, the ADR435 forms the reference source for a programmable
current as
W
B
B
A
LV
R
R1
R
R2
I×
+
=2
2
(4)
and
REF
N
W
V
D
V×= 2
(5)
where:
D is the decimal equivalent of the input code.
N is the number of bits.
In addition, R1' and R2' must be equal to R1 and (R2A + R2B),
respectively. In theory, R2B can be made as small as needed to
achieve the necessary current within the A2 output current
driving capability. In this example, the OP2177 can deliver a
maximum output current of 10 mA. Because the current pump
employs both positive and negative feedback, C1 and C2
capacitors are needed to ensure that the negative feedback
prevails and, therefore, avoids oscillation. This circuit also
allows bidirectional current flow if the VA and VB inputs of
the digital potentiometer are supplied with the dual polarity
references, as shown in Figure 40.
6
2
4
5
V
IN
V
DD
V
OUT
GND
TRIM
C2
10pF
U1 V+
V–
I
L
ADR435
OP2177
R1
50kΩ
OP2177
V–
V+
A2
A1
I
L
V
DD
U2
AD5232
W
A
B
V
SS
R1'
50kΩ R2'
1kΩ
R2
A
1kΩ
R2
B
10Ω
V
DD
V
SS
C1
10pF
+
VL
–
04500-011
Figure 40. Programmable Current Source
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 19 of 22
PROGRAMMABLE DAC REFERENCE VOLTAGE
By employing a multichannel DAC, such as the AD7398,
quad, 12-bit voltage output DAC, one of its internal DACs
and an ADR43x voltage reference can be used as a common
programmable VREFX for the rest of the DACs. The circuit
configuration is shown in Figure 41.
V
REFA
DAC A
V
REFB
DAC B
V
REFC
DAC C
V
REFD
DAC D
V
OUTA
V
OUTB
V
OUTC
V
OUTD
V
OB
= V
REFX
(D
B
)
V
OC
= V
REFX
(D
C
)
V
OD
= V
REFX
(D
D
)
ADR43x
AD7398
V
IN
V
REF
R1 ± 0.1%
R2
± 0.1%
04500-012
Figure 41. Programmable DAC Reference
The relationship of VREFX to VREF depends on the digital code
and the ratio of R1 and R2, given by
×+
+×
=
R1
R2D
R1
R2
V
V
N
REF
REFX
2
1
1
(6)
where:
D is the decimal equivalent of the input code.
N is the number of bits.
VREF is the applied external reference.
VREFX is the reference voltage for DAC A to DAC D.
Table 9. VREFX vs. R1 and R2
R1, R2
Digital Code
V
REF
R1 = R2 0000 0000 0000 2 VREF
R1 = R2
1000 0000 0000
1.3 V
REF
R1 = R2 1111 1111 1111 VREF
R1 = 3R2 0000 0000 0000 4 VREF
R1 = 3R2 1000 0000 0000 1.6 VREF
R1 = 3R2 1111 1111 1111 VREF
PRECISION VOLTAGE REFERENCE FOR DATA
CONVERTERS
The ADR43x family has a number of features that make it ideal
for use with ADCs and DACs. The exceptional low noise, tight
temperature coefficient, and high accuracy characteristics make
the ADR43x ideal for low noise applications, such as cellular
base station applications.
Another example of an ADC for which the ADR431 is well
suited is the AD7701. Figure 42 shows the ADR431 used as
the precision reference for this converter. The AD7701 is a 16-bit
ADC with on-chip digital filtering intended for the measurement
of wide dynamic range and low frequency signals, such as those
representing chemical, physical, or biological processes. It contains
a charge-balancing Σ-Δ ADC, a calibration microcontroller
with on-chip static RAM, a clock oscillator, and a serial
communications port.
SERI AL CL OCK
READ (T RANS M IT )
DATA READY
+5V
ANALOG
SUPPLY
SERI AL CL OCK
RANGES
SELECT
CALIBRATE
ANALOG
INPUT
ANALOG
GROUND
–5V
ANALOG
SUPPLY
DVDD
SLEEP
MODE
DRDY
CS
SCLK
SDATA
CLKIN
CLKOUT
SC1
SC2
DGND
DVSS
AVSS
AGND
AIN
CAL
BP/UP
VREF
AVDD
VIN
VOUT
GND
ADR431
AD7701
0.1µF
0.1µF
0.1µF
0.1µF
10µF
0.1µF
10µF
0.1µF
2
6
4
04500-013
Figure 42. Voltage Reference for the AD7701 16-Bit ADC
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 20 of 22
PRECISION BOOSTED OUTPUT REGULATOR
A precision voltage output with boosted current capability can
be realized with the circuit shown in Figure 43. In this circuit,
U2 forces VO to be equal to VREF by regulating the turn-on of
N1. Therefore, the load current is furnished by VIN. In this
configuration, a 50 mA load is achievable at a VIN of 5 V. Moderate
heat is generated on the MOSFET, and higher current can be
achieved with a replacement of the larger device. In addition,
for a heavy capacitive load with step input, a buffer can be
added at the output to enhance the transient response.
V–
V+
+
–
V
IN
N1
V
IN
V
OUT
TRIM
GND
5V
U2
2N7002
AD8601
U1
ADR431
V
O
R
L
25Ω
2
6
5
4
04500-014
Figure 43. Precision Boosted Output Regulator
Data Sheet ADR430/ADR431/ADR433/ADR434/ADR435
Rev. M | Page 21 of 22
OUTLINE DIMENSIONS
COM P LIANT T O JEDEC S TANDARDS M O-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BS C
0.40
0.25
1.10 M AX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PI N 1
IDENTIFIER
15° M AX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 44. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 45. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ADR430/ADR431/ADR433/ADR434/ADR435 Data Sheet
Rev. M | Page 22 of 22
ORDERING GUIDE
Model1
Output
Voltage (V)
Initial
Accuracy, ± Temperature
Coefficient
Package (ppm/°C)
Temperature
Range
Package
Description
Package
Option
Ordering
Quantity Branding
(mV) (%)
ADR430ARZ 2.048 3 0.15 10 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR430ARZ-REEL7 2.048 3 0.15 10 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR430ARMZ 2.048 3 0.15 10 −40°C to +125°C 8-Lead MSOP RM-8 50 R10
ADR430ARMZ-REEL7 2.048 3 0.15 10 −40°C to +125°C 8-Lead MSOP RM-8 1,000 R10
ADR430BRZ 2.048 1 0.05 3 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR430BRZ-REEL7 2.048 1 0.05 3 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR431ARZ 2.500 3 0.12 10 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR431ARZ-REEL7 2.500 3 0.12 10 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR431ARMZ 2.500 3 0.12 10 −40°C to +125°C 8-Lead MSOP RM-8 50 R12
ADR431ARMZ-REEL7 2.500 3 0.12 10 −40°C to +125°C 8-Lead MSOP RM-8 1,000 R12
ADR431BRMZ 2.500 1 0.04 3 −40°C to +125°C 8-Lead MSOP RM-8 50 R13
ADR431BRMZ-R7 2.500 1 0.04 3 −40°C to +125°C 8-Lead MSOP RM-8 1000 R13
ADR431BRZ 2.500 1 0.04 3 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR431BRZ-REEL7 2.500 1 0.04 3 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR433ARZ 3.000 4 0.13 10 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR433ARZ-REEL7 3.000 4 0.13 10 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR433ARMZ 3.000 4 0.13 10 −40°C to +125°C 8-Lead MSOP RM-8 50 R14
ADR433ARMZ-REEL7 3.000 4 0.13 10 −40°C to +125°C 8-Lead MSOP RM-8 1,000 R14
ADR433BRZ 3.000 1.5 0.05 3 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR433BRZ-REEL7 3.000 1.5 0.05 3 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR434ARZ
4.096
5
0.12
10
−40°C to +125°C
8-Lead SOIC_N
R-8
98
ADR434ARZ-REEL7 4.096 5 0.12 10 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR434ARMZ 4.096 5 0.12 10 −40°C to +125°C 8-Lead MSOP RM-8 50 R16
ADR434ARMZ-REEL7 4.096 5 0.12 10 −40°C to +125°C 8-Lead MSOP RM-8 1,000 R16
ADR434BRZ 4.096 1.5 0.04 3 −40°C to +125°C 8-Lead SOIC_N R-8 98
ADR434BRZ-REEL7 4.096 1.5 0.04 3 −40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR435ARZ 5.000 6 0.12 10 –40°C to +125°C 8-Lead SOIC_N R-8 98
ADR435ARZ-REEL7 5.000 6 0.12 10 –40°C to +125°C 8-Lead SOIC_N R-8 1,000
ADR435ARMZ 5.000 6 0.12 10 –40°C to +125°C 8-Lead MSOP RM-8 50 R18
ADR435ARMZ-REEL7
5.000
6
0.12
10
–40°C to +125°C
8-Lead MSOP
RM-8
1,000
R18
ADR435BRMZ
5.000
2
0.04
3
–40°C to +125°C
8-Lead MSOP
RM-8
50
R19
ADR435BRMZ-R7 5.000 2 0.04 3 –40°C to +125°C 8-Lead MSOP RM-8 1,000 R19
ADR435BRZ 5.000 2 0.04 3 –40°C to +125°C 8-Lead SOIC_N R-8 98
ADR435BRZ-REEL7 5.000 2 0.04 3 –40°C to +125°C 8-Lead SOIC_N R-8 1,000
1 Z = RoHS Compliant Part.
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ADR433BRZ ADR430ARMZ ADR431BRMZ ADR435ARMZ ADR434BRZ ADR433ARMZ ADR435BRMZ
ADR434ARMZ-REEL7 ADR430ARMZ-REEL7 ADR434ARZ ADR433ARMZ-REEL7 ADR430BRZ-REEL7
ADR434TRZ-EP ADR433ARZ ADR430ARZ-REEL7 ADR434ARZ-REEL7 ADR431ARZ ADR434TRZ-EP-R7
ADR435TRZ-EP-R7 ADR431ARZ-REEL7 ADR435BRZ ADR431BRZ-REEL7 ADR431ARMZ ADR431TRZ-EP
ADR435ARZ-REEL7 ADR431TRZ-EP-R7 ADR433BRZ-REEL7 ADR435ARZ ADR430BRZ ADR434BRZ-REEL7
ADR435BRZ-REEL7 ADR431ARMZ-REEL7 ADR435TRZ-EP ADR433ARZ-REEL7 ADR435BRMZ-R7
ADR431BRMZ-R7 ADR435ARMZ-REEL7 ADR431BRZ ADR434ARMZ ADR430ARZ