1
Military Program
Overview
MIL-STD-883 Compliance
MIL-STD-883 defines a uniform and precise method for
environmental, mechanical and electrical testing which
ensures the suitability of microelectronic devices for use
in military and aerospace systems. Table I summarizes
the MIL-STD-883, Method 5004 Class B flow. Table II
summarizes the conformance testing required by MIL-
STD-883, Method 5005, for quality conformance testing
of LSC military microcircuits.
MIL-I-38535
MIL-I-38535 Appendix A and C, when used in conjunction
with MIL-STD-883, define design, packaging, material,
marking, sampling, qualification and quality system
requirements for LSC military devices.
Group Data
Group A and B data is taken on every inspection lot per
MIL-STD-883, Class B requirements. This data, along
with Generic Group C and D data can be supplied, upon
written request, with your device shipment. Your LSC
sales representative can advise you of charges and
leadtime necessary for providing this data.
Standard Military Drawings
LSC actively supports the DESC Standard Military Drawing
(SMD) Program. The SMD Program offers a cost effective
alternative to source control drawings and provides
standardized MIL-STD-883 product specifications to
simplify military procurement.
A list of currently available SMD qualified devices is
provided (see Military Ordering Information).
Corporate Philosophy
Lattice Semiconductor Corporation (LSC) is committed to
leadership in device performance and quality. Our family
of military ispLSI® and GAL® devices is a reflection of this
philosophy. LSC manufactures all devices under strict
Quality Assurance guidelines. All grades, Commercial
through Military 883, are monitored under a quality program
conformant to MIL-I-38535 Appendix C with inspections
conformant to MIL-I-45208.
Quality and Testability
Lattice Semiconductor processes its devices to strict
conformance with MIL-STD-883 Class B. In conjunction
with the military flow, the inherent testability of E2CMOS®
technology allows LSC to achieve a quality level superior
to other PLD technologies.
All devices are patterned and tested dozens of times
throughout the manufacturing flow. Every device is tested
under worst case configurations to assure customers
achieve 100% yields. Tests are performed using the
same E2 cell array that will be used for the final patterning
of the devices. This 100% "actual test" philosophy does
away with the correlated and simulated testing that is
necessary with bipolar and UV (EPROM) based PLD
devices.
Reliability
Lattice Semiconductor performs extensive reliability testing
prior to product release. This testing continues in the form
of Reliability Monitors that are run on an ongoing basis to
assure continued process integrity.
The reliability testing performed includes extensive
analysis of fundamental design and process integrity.
The reprogrammable nature of LSC devices allows an
inherently more thorough reliability evaluation than with
other programmable alternatives.
miloview_02 September 1998
2
Military Program Overview
Screen Method Requirement
Internal Visual 2010 Cond. B 100%
Temp. Cycling 1010 Cond. C 100%
Constant Acceleration 2001 Cond. E 100%
Hermeticity 1014 100%
Fine Cond. A or B
Gross Cond. C
Endurance Test 1033 100%
Retention Test Unbiased Bake 100%
24 HRS.
TA = 180°C
Pre Burn-In Electrical Applicable Device 100%
Specification
Tc = 25°C
Dynamic Burn-In 1015 Cond. D 100%
Post Burn-In Electrical Applicable Device 100%
Specification
Tc = 25°C
PDA = 5%
Final Electrical Test Applicable Device 100%
Specification
Tc = 125°C
Final Electrical Test Applicable Device 100%
Specification
Tc = - 55°C
Final Electrical Test Applicable Device 100%
Specification
Tc = 25°C
External Visual 2009 100%
QCI Sample Selection MIL-M-38535, Sample
Appendix A
Sec. 4.5 and
MIL-STD-883
Sec. 1.2
Subgroup Method Sample
GROUP A: Electrical Tests
Subgroups 1, 7, 9
Applicable Device Spec. LTPD = 2
Electrical Test 25°C
Subgroups 2, 8A, 10
Applicable Device Spec. LTPD = 2
Electrical Test Max. Operating Temp.
Subgroups 3, 8B, 11
Applicable Device Spec. LTPD = 2
Electrical Test Min. Operating Temp.
GROUP B: Mechanical Tests
Subgroup 2
4(0)
Solvent Resistance 2015
Subgroup 3
LTPD = 10
Solderability 2003
Subgroup 5
LTPD = 15
Bond Strength 2011
GROUP C: Chip Integrity Tests
Subgroup 1
LTPD = 5
Dynamic Life Test 1005, 1,000 HRS. 125°C
End Point Electrical Applicable Device Spec.
Subgroup 2
LTPD = 5
Unbiased Retention Applicable Device Spec.
End Point Electrical Applicable Device Spec.
GROUP D: Environmental Integrity
Subgroup 1
LTPD = 15
Physical Dimensions 2016
Subgroup
2
LTPD = 5
Lead Integrity 2004, Cond. B
Hermeticity 1014
Subgroup 3
LTPD = 15
Thermal Shock 1011, Cond. B, 15 Cycles
Temp. Cycle 1010, Cond. C, 100 Cycles
Moisture Resistance 1004
Endpoint Electrical Applicable Device Spec.
Hermeticity 1014
Visual Examination 1004, 1010
Subgroup 4
LTPD = 15
Mechanical Shock 2002, Cond. B
Vibration 2007, Cond. A
Constant Acceleration 2001, Cond. E
Hermeticity 1014
Visual Examination 1010, 1011
Endpoint Electrical Applicable Device Spec.
Subgroup 5
LTPD = 15
Salt Atmosphere 1009, Cond. A
Hermeticity 1014
Visual Examination 1009
Subgroup 6
3(0)
Internal Water Vapor 1018 < 5,000 PPM, 100°C
Subgroup 7
LTPD = 15
Lead Finish Adhesion 2025
Subgroup 8
5(0)
Lid Torque 2024
Military Quality Conformance
Inspections (Table II)
Military Screening Flow (Table I)
