1
01/06/03
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Low Threshold
TN0106
TN0110
N-Channel Enhancement-Mode
Vertical DMOS FETs
BVDSS /R
DS(ON) ID(ON) VGS(th)
BVDGS (max) (min) (max) TO-92
60V 3.0Ω2A 2.0V TN0106N3
100V 3.0Ω2A 2.0V TN0110N3
Order Number / Package
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex’s well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Package Option
Features
❏Low threshold — 2.0V max.
❏High input impedance
❏Low input capacitance — 50pF typical
❏Fast switching speeds
❏Low on resistance
❏Free from secondary breakdown
❏Low input and output leakage
❏Complementary N- and P-channel devices
Applications
❏Logic level interfaces – ideal for TTL and CMOS
❏Solid state relays
❏Battery operated systems
❏Photo voltaic drives
❏Analog switches
❏General purpose line drivers
❏Telecom switches
Note: See Package Outline section for dimensions.
Ordering Information
Absolute Maximum Ratings
Drain-to-Source Voltage BVDSS
Drain-to-Gate Voltage BVDGS
Gate-to-Source Voltage ± 20V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
* Distance of 1.6 mm from case for 10 seconds.
TO-92
S G D
2
Package ID (continuous)* ID (pulsed) Power Dissipation
θ
jc
θ
ja IDR*I
DRM
@ TC = 25°C°C/W °C/W
TO-92 350mA 2.0A 1.0W 125 170 350mA 2.0A
* ID (continuous) is limited by max rated Tj.
TN0106/TN0110
Thermal Characteristics
Switching Waveforms and Test Circuit
90%
10%
90% 90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
10V
V
DD
R
gen
0V
0V
Symbol Parameter Min Typ Max Unit Conditions
BVDSS TN0110 100
TN0106 60
VGS(th) Gate Threshold Voltage 0.6 2.0 V VGS = VDS, ID = 0.5mA
∆VGS(th) Change in VGS(th) with Temperature -3.2 -5.0 mV/°CV
GS = VDS, ID = 1.0mA
IGSS Gate Body Leakage 100 nA VGS = ±20V, VDS = 0V
IDSS Zero Gate Voltage Drain Current 10 VGS = 0V, VDS = Max Rating
500 µAV
GS = 0V, VDS = 0.8 Max Rating
TA = 125°C
ID(ON) ON-State Drain Current 0.75 1.4 VGS = 5V, VDS = 25V
2.0 3.4 VGS = 10V, VDS = 25V
RDS(ON) 2.0 4.5 VGS = 4.5V, ID = 250mA
1.6 3.0 VGS = 10V, ID = 500mA
∆RDS(ON) Change in RDS(ON) with Temperature 0.6 1.1 %/°CI
D = 0.5A, VGS = 10V
GFS Forward Transconductance 225 400 m VDS = 25V, ID = 500mA
CISS Input Capacitance 50 60
COSS Common Source Output Capacitance 25 35 pF
CRSS Reverse Transfer Capacitance 4.0 8.0
td(ON) Turn-ON Delay Time 2.0 5.0
trRise Time 3.0 5.0
td(OFF) Turn-OFF Delay Time 6.0 7.0
tfFall Time 3.0 6.0
VSD Diode Forward Voltage Drop 1.0 1.5 V ISD = 0.5A, VGS = 0V
trr Reverse Recovery Time 400 ns ISD = 0.5A, VGS = 0V
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
A
VI
D = 1mA, VGS = 0V
Drain-to-Source
Breakdown Voltage
VGS = 0V, VDS = 25V
f = 1 MHz
Static Drain-to-Source
ON-State Resistance
VDD = 25V
ns ID = 1.0A
RGEN = 25Ω
Electrical Characteristics (@ 25°C unless otherwise specified)
Ω
Ω
3
Typical Performance Curves
TN0106/TN0110
Output Characteristics
5
4
3
2
1
0102030 5040
VDS (volts)
I(amperes)
D
Saturation Characteristics
5
4
3
2
1
0246 108
VDS (volts)
I(amperes)
D
Maximum Rated Safe Operating Area
1 100010010
0.1
1.0
10
0.01
VDS (volts)
I(amperes)
D
Thermal Response Characteristics
Thermal Resistance (normalized)
1.0
0.8
0.6
0.4
0.2
0.001 100.01 0.1 1
tp(seconds)
Transconductance vs. Drain Current
0.5
0.4
0.3
0.2
0.1
003.0
.6 1.2 1.8
GFS (siemens)
ID(amperes)
Power Dissipation vs. Case Temperature
0 15010050
2.0
1.0
1257525 TCC)°(
D
P (watts)
V
DS
= 25V
8V
6V
4V
2V
TO-92
TO-92
T
C
= 25°C
PD = 1W
TO-92 (DC)
TO-92 (pulsed)
8V
6V
4V
2V
2.4
0
0
00
T
A
= -55°C
V
GS
= 10V
V
GS
= 10V
T
A
= 25°C
T
A
= 150°C
T
C
= 25°C
4
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
01/06/03
©2003 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
TN0106/TN0110
Typical Performance Curves
Gate Drive Dynamic Characteristics
Q (nanocoulombs)
G
V
GS
(volts)
T
j
GS(th)
V(normalized)
DS(ON)
R(normalized)
V
DS(th)
and R Variation with Temperature
C)°$(
On-Resistance vs. Drain Current
(amperes)
D
(ohms)
DS(ON)
R
Variation with Temperature
DSS
DSS
BV (normalized)
C)°$(T
j
Transfer Characteristics
V
GS
(volts)
I(amperes)
D
Capacitance vs. Drain-to-Source Voltage
100
C (picofarads)
V
DS
(volts)
I
BV
010203040
75
50
25
0246810
3.0
2.4
1.8
1.2
0.6
-50 0 50 100 150
1.3
1.2
0.8
5.0
2.0
05.0
3.0
1.4
1.2
1.0
0.8
0.6
0.4
1.4
1.2
1.0
0.8
0.6
0.4
10
8
6
4
2
0 1.0 2.0 3.0 4.0 5.0
-50 0 50 100 150
f = 1MHz
4.0
3.0
1.0
01.0 2.0 4.0
40V
0
0.9
1.0
1.1
50pF
00
V
GS
= 5V V
GS
= 10V
V
DS
= 25V T
A
= -55°C
25°C
150°C
V
(th)
@ 0.5mA
R
DS(ON)
@ 10V, 0.5A
C
ISS
C
OSS
C
RSS
V
DS
= 10V
55pF
