General Description
The MAX8594/MAX8594A complete power-manage-
ment chips for low-cost personal digital assistants
(PDAs) operates from a 1-cell lithium-ion (Li+) or 3-cell
NiMH battery. They include all regulators, outputs, and
voltage monitors necessary for small portable devices
while requiring a bare minimum of external compo-
nents. Featured are three linear regulators, a boost DC-
DC converter for LCD bias, an efficient 4MHz buck
DC-DC converter for core power, a microprocessor
(µP) reset output, and low-battery shutdown in a 0.8mm
high thin QFN package.
The COR1 buck DC-DC converter supplies a pin-selec-
table output at 400mA. All linear regulators feature
PMOS pass elements for efficient low-dropout opera-
tion. A MAIN LDO supplies 3.3V at 500mA. A secure-
digital (SD) card slot output supplies 3.3V at 500mA,
and a COR2 LDO supplies 1.8V at 50mA. Each output
has its own logic-controlled enable. For other output
voltage combinations, contact Maxim.
An LCD bias boost DC-DC converter features an on-
board MOSFET and True Shutdown™ when off. This
means that during shutdown, input power is disconnect-
ed from the inductor so the boost output falls to 0V rather
than remaining one diode drop below the input voltage.
A µP reset output clears 20ms (typ) after the COR1 out-
put achieves regulation to ensure an orderly start. In
addition, the COR1 regulator is not started until the 3.3V
main output is in regulation. Also included are a 1%
accurate reference and low-battery monitor. Thermal
shutdown protects the die from overheating.
The MAX8594/MAX8594A operate from a 3.1V to a 5.5V
supply voltage and consume 46µA no-load supply cur-
rent. They are packaged in a tiny, 4mm x 4mm, 24-pin
thin QFN capable of dissipating 1.67W. The devices
are specified for operation from -40°C to +85°C.
Applications
PDAs
Organizers
Cellular and Cordless Phones
MP3 Players
Handheld Devices
Features
♦Minimum External Components
♦Efficient Step-Down DC-DC Powers CPU Core
♦1V/1.3V Selectable Core Voltage, 400mA
(MAX8594)
♦1.3V/1.8V Selectable Core Voltage, 400mA
(MAX8594A)
♦Main LDO 3.3V, 500mA
♦SD Card Output 3.3V, 500mA
♦Second Core LDO 1.8V, 50mA
♦High-Efficiency LCD Boost
♦LCD 0V True Shutdown when Off
♦46µA Quiescent Current
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
________________________________________________________________ Maxim Integrated Products 1
Ordering Information
MAIN
IN
GND
SDIG
RS
ENC2
LXL
LFB
3.3V, 500mA
SD CARD SLOT
TO IN
ENL
LCD
15V
LCD
TO MAIN
SW
ENSD
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
3.3V, 500mA
MAIN
VIN
REF
COR1
1.3V OR 1.8V (MAX8594A)
1V OR 1.3V (MAX8594)
400mA
COR1
LXC
PGND
CV
1.8V/1.3V
1.3V/1V
ENC1
1.8V, 50mA
COR2
COR2
TO MAIN
LBO
LBI
DBO
TO MAIN
DBI
PV
ENM
SDIG
COR2
COR1
MAIN
MAX8594
MAX8594A
Typical Operating Circuit
19-3349; Rev 2; 4/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
True Shutdown is a trademark of Maxim Integrated Products, Inc.
PART
TEMP RANGE
PIN-PACKAGE
MAX8594ETG
-40°C to +85°C
24 Thi n QFN - E P * 4m m x 4m m
( T2444- 4)
MAX8594AETG
-40°C to +85°C
24 Thi n QFN - E P * 4m m x 4m m
( T2444- 4)
Pin Configuration appears at end of the data sheet.
*EP = Exposed pad.
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN, PV, ENSD, ENC1, ENC2, ENL, RS, SDIG,
LBI, DBI to GND ...................................................-0.3V to +6V
LXL to GND ............................................................-0.3V to +30V
MAIN, COR1, COR2, REF, LFB, CV, ENM, LBO, DBO,
LXC, SW to GND......................................-0.3V to (VIN + 0.3V)
PV to IN..................................................................-0.3V to +0.3V
PGND to GND .......................................................-0.3V to +0.3V
Current into LXL..........................................................300mARMS
Current out of SW .......................................................300mARMS
Current into LXC .........................................................400mARMS
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TA= +70°C)
24-Pin Thin QFN Package
(derate 20.8mW/°C above +70°C).................................1.67W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = VCV = 4.0V, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA= +25°C.)
PARAMETER CONDITIONS
MIN TYP MAX
UNITS
GENERAL
IN, PV Voltage Range 3.1 5.5 V
VDBI = VIN, VIN falling
2.950
3.0
3.050
VIN Complete Shutdown
Threshold VDBI = VIN, VIN rising
3.135
3.3
3.525
V
VDBI falling
1.234 1.25 1.263
VDBI Complete Shutdown
Threshold VDBI rising
1.306 1.375 1.478
V
VLBI rising
1.234 1.25 1.263
VLBI LBO Threshold VLBI falling
1.103 1.125 1.140
V
VLBI = VIN, VIN falling
3.262 3.33 3.366
VIN LBO Threshold VLBI = VIN, VIN rising
3.625
3.7
3.744
V
Preset mode, VIN = 2.9V VIN -
0.3
DBI Input Dual Mode Threshold
ADJ mode, VIN = 2.9V
VIN -
1.2
V
Preset mode, VIN = 3.2V VIN -
0.3
LBI Input Dual-Mode Threshold
with Respect to IN ADJ mode, VIN = 3.2V
VIN -
1.2
V
DBI Complete Shutdown Input
Program Range VIN falling 3.0 5.5 V
DBI Input Bias Current VDBI = 1.25V -50
+50
nA
LBI Input Bias Current VLBI = 1.25V -50
+50
nA
Shutdown (DBI remains on, REF off), VIN = VPV = VDBI =
VLBI = 2.7V 2 10
All off (REF on) 30 55
IN, PV Operating Current
All on; LXL, LXC not switching
130
180
µA
Main on, no load 46 75
Main on, no load, COR1 on, LXC not switching 80 110
IN Operating Current
Al l on excep t LC D , V
E N L
= 0V , LX L and LX C not sw i tchi ng
115
160
µA
Dual Mode is a trademark of Maxim Integrated Products, Inc.
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = VCV = 4.0V, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA= +25°C.)
PARAMETER CONDITIONS
TYP
MAX
UNITS
LDOs
MAIN, SDIG Soft-Start Time
300 600 1200
µs
MAIN Output Voltage ILOAD = 100µA to 300mA, VIN = 3.6V to 5.5V
3.218
3.3
3.383
V
MAIN Current Limit
550 800 1200
mA
ILOAD = 1mA 1
ILOAD = 300mA
210
330
MAIN Dropout Voltage
ILOAD = 500mA
350
595
mV
SDIG Output Voltage ILOAD = 100µA to 200mA, VIN = 3.6V to 5.5V
3.218
3.3
3.383
V
SDIG Current Limit
525 718
900 mA
ILOAD = 1mA
0.75
ILOAD = 200mA
170
300 SDIG Dropout Voltage
ILOAD = 500mA
525 1010
mV
SDIG Reverse Leakage Current VSDIG = 5.5V, VENSD = VIN = 0V 7 15 µA
COR2 Output Voltage ILOAD = 100µA to 50mA, VIN = 3.6V to 5.5V
1.755
1.8
1.845
V
COR2 Current Limit 65 98 150 mA
COR1 PWM BUCK
CV = high (MAX8594A)
1.743
1.8
1.855
CV = high (MAX8594) or CV = low (MAX8594A)
1.259
1.3
1.340
COR1 Output Voltage Accuracy
CV = low (MAX8594)
0.972
1
1.023
V
ILXC = -180mA
0.70 1.34
p-Channel On-Resistance ILXC = -180mA, VPV = 3.1V 0.8
1.58
Ω
ILXC = 180mA
0.25 0.46
n-Channel On-Resistance ILXC = 180mA, VPV = 3.1V
0.30 0.53
Ω
p-Channel Current-Limit
Threshold
-0.500 -0.75 -0.925
A
n-Channel Current-Limit
Threshold
-0.50 -0.72 -0.92
A
tON(MIN) 0.1
Minimum On- and Off-Times tOFF(MIN) 0.1 µs
LXC Leakage Current VLXC = 0V, VENC1 = 0V
-10 +0.1 +10
µA
REF AND RESET OUTPUT
REF Voltage Accuracy IREF = 0.1µA
1.236 1.25 1.264
V
REF Line Regulation 3.1V < VIN < 5.5V, IREF = 0.1µA 0.1 3 mV
REF Load Regulation 0.1µA < IREF < 10µA 1 3 mV
CV = low (MAX8594A),
CV = low or CV = high (MAX8594)
88.00
90
93.25
RS Deassert Threshold for COR1
Rising (Note 1) CV = high (MAX8594A)
67.0
69
72.7
%
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
4_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = VCV = 4.0V, TA = 0°C to +85°C, unless otherwise noted.
Typical values are at TA= +25°C.)
PARAMETER CONDITIONS
TYP
MAX
UNITS
CV = low or CV = high (MAX8594),
CV = low (MAX8594A) 80
RS Assert Threshold
CV = high (MAX8594A)
62.5
%
RS Deassert Delay 10 20 30 ms
RS Assert Delay 50mV overdrive 5 µs
LCD
LXL Voltage Range 28 V
LXL Current Limit L1 = 10µH
195 235
275 mA
LXL On-Resistance 1.7 Ω
LXL Leakage Current VLXL = 28V 0.2 2 µA
Maximum LXL On-Time 2 3 4 µs
VLFB > 1.1V 0.8 1 1.2
Minimum LXL Off-Time VLFB < 0.8V (soft-start) 3.9 5 6.0
µs
LFB Feedback Threshold
1.229 1.25 1.270
V
LFB Input Bias Current VLFB = 1.3V 5 50 nA
SW Off-Leakage Current VSW = 0V, VPV = 5.5V, VENL = 0V
0.01
1 µA
SW PMOS On-Resistance 1 1.5 Ω
SW PMOS Peak Current Limit
700
mA
SW PMOS Average Current Limit
300
mA
Soft-Start Time CSW = 1µF
0.13
ms
LOGIC
EN_, CV Input Low Level VIN = 3.1V to 5.5V
0.35
V
EN_, CV Input High Level VIN = 3.1V to 5.5V 1.4 V
EN_, CV Input Leakage Current
0.01
1 µA
RS, LBO, DBO Output Low Level
Sinking 1mA, VIN = 2.5V
0.02
0.1 V
DBO Output Low Level Sinking 100µA, VIN = 1.0V
0.02
0.1 V
RS, LBO, DBO Output High
Leakage VOUT = 5.5V, VIN = 5.5V 1 µA
THERMAL PROTECTION
Thermal-Shutdown Temperature
Rising temperature
+160
°C
Thermal-Shutdown Hysteresis 15 °C
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
_______________________________________________________________________________________ 5
ELECTRICAL CHARACTERISTICS
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = 4.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2)
PARAMETER CONDITIONS
MIN TYP MAX
UNITS
GENERAL
IN, PV Voltage Range 3.1 5.5 V
VDBI = VIN, VIN falling
2.93
3.06
VIN Complete Shutdown
Threshold VDBI = VIN, VIN rising
3.135
3.525
V
VDBI falling
1.228
1.264
VDBI Complete Shutdown
Threshold VDBI rising
1.306
1.478
V
VLBI rising
1.228
1.264
VLBI LBO Threshold VLBI falling
1.103
1.140
V
VLBI = VIN, VIN falling
3.248
3.366
VIN LBO Threshold VLBI = VIN, VIN rising
3.609
3.744
V
Preset mode, VIN = 2.9V VIN -
0.3
DBI Input Dual-Mode Threshold
ADJ mode, VIN = 2.9V
VIN -
1.25
V
Preset mode, VIN = 3.2V VIN -
0.3
LBI Input Dual-Mode Threshold
with Respect to IN ADJ mode, VIN = 3.2V
VIN -
1.25
V
DBI Complete Shutdown Input
Program Range VIN falling 3.0 5.5 V
DBI Input Bias Current VDBI = 1.25V -50
+50
nA
LBI Input Bias Current VLBI = 1.25V -50
+50
nA
Shutdown (DBI remains on, REF off), VIN = VPV = VDBI =
VLBI = 2.7V 10
All off (REF on) 55
IN, PV Operating Current
All on, LXL, LXC not switching 180
µA
Main on, no load 75
Main on, no load, COR1 on, LXC not switching 110
IN Operating Current All on except LCD, VENL = 0V, LXL and LXC not
switching 160
µA
LDOs
MAIN, SDIG Soft-Start Time Ramp ILIM from 0% to 100%
300
1200
µs
MAIN Output Voltage ILOAD = 100µA to 300mA, VIN = 3.6V to 5.5V
3.209
3.383
V
MAIN Current Limit
550
1230
mA
ILOAD = 300mA 330
MAIN Dropout Voltage ILOAD = 500mA 595
mV
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
6_______________________________________________________________________________________
PARAMETER CONDITIONS
TYP
MAX
UNITS
SDIG Output Voltage ILOAD = 100µA to 200mA, VIN = 3.6V to 5.5V
3.218
3.383
V
SDIG Current Limit
485
900 mA
ILOAD = 200mA 300
SDIG Dropout Voltage ILOAD = 500mA
1250
mV
SDIG Reverse Leakage Current VSDIG = 5.5V, VENSD = VIN = 0V 15 µA
COR2 Output Voltage ILOAD = 100µA to 50mA, VIN = 3.6V to 5.5V
1.750
1.845
V
COR2 Current Limit 60 150 mA
COR1 PWM BUCK
CV = high (MAX8594A)
1.743 1.855
CV = high (MAX8594) or CV = low (MAX8594A)
1.255 1.340
COR1 Output Voltage Accuracy
CV = low (MAX8594)
0.969 1.023
V
ILXC = -180mA
1.34
p-Channel On-Resistance ILXC = -180mA, VPV = 3.1V
1.58
Ω
ILXC = 180mA
0.46
n-Channel On-Resistance ILXC = 180mA, VPV = 3.1V
0.53
Ω
p-Channel Current-Limit
Threshold
-0.460 -0.925
A
n-Channel Current-Limit
Threshold
-0.46 -0.92
A
LXC Leakage Current VPV = 5.5V, VLXC = 0V or VPV, VENC1 = 0V -10
+10
µA
REF AND RESET OUTPUT
REF Voltage Accuracy IREF = 0.1µA
1.229
1.264
V
REF Line Regulation 3.1V < V < 5.5V, IREF = 0.1µA 3 mV
REF Load Regulation 0.1µA < IREF < 10µA 3 mV
CV = low or CV = high (MAX8594),
CV = low (MAX8594A)
88.00
93.25
RS Deassert Threshold for COR1
Rising (Note 1) CV = high (MAX8594A)
67.0
72.7
%
RS Deassert Delay 10 30 ms
LCD
LXL Voltage Range 28 V
LXL Current Limit L1 = 10µH
180
280 mA
LXL Leakage Current VLXL = 28V 2 µA
Maximum LXL On-Time 2 4 µs
VLFB > 1.1V 0.8 1.2
Minimum LXL Off-Time VLFB < 0.8V (soft-start) 3.9 6.0
µs
LFB Feedback Threshold
1.223
1.270
V
LFB Input Bias Current VLFB = 1.3V 50 nA
SW Off-Leakage Current VSW = 0V, VPV = 5.5V, VENL = 0V 1 µA
SW PMOS On-Resistance 1.5 Ω
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = 4.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2)
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
_______________________________________________________________________________________ 7
PARAMETER CONDITIONS
MIN TYP MAX
UNITS
LOGIC
EN_, CV Input Low Level VIN = 3.1V to 5.5V
0.35
V
EN_, CV Input High Level VIN = 3.1V to 5.5V 1.4 V
EN_, CV Input Leakage Current 1 µA
RS, LBO, DBO Output Low Level
Sinking 1mA, VIN = 2.5V 0.1 V
DBO Output Low Level Sinking 100µA, VIN = 1.0V 0.1 V
RS, LBO, DBO Output High
Leakage VOUT = 5.5V, VIN = 5.5V 1 µA
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VPV = VENSD = VENC2 = VENL = VENM = VENC1 = VDBI = VLBI = 4.0V, TA = -40°C to +85°C, unless otherwise noted.) (Note 2)
Note 1: The reset trip point tracks the COR1 voltage. For example, a minimum reset spec does not occur with a maximum COR1
spec, and a minimum COR1 spec does not occur with a maximum reset spec.
Note 2: Specifications to -40°C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 2, VIN = 4V, TA= +25°C, unless otherwise noted.)
MAIN DROPOUT VOLTAGE
vs. LOAD CURRENT
MAX8594/MAX8594A toc01
LOAD CURRENT (mA)
DROPOUT VOLTAGE (mV)
500400300200100
50
100
150
200
250
300
350
400
450
500
0
0600
100
200
300
400
500
600
700
800
0
SDIG DROPOUT VOLTAGE
vs. LOAD CURRENT
MAX8594/MAX8594A toc02
LOAD CURRENT (mA)
DROPOUT VOLTAGE (mV)
5004003002001000600
1.50
2.00
1.75
2.75
2.50
2.25
3.25
3.00
3.50
0300400100 200 500 600 700 800 900
MAIN OUTPUT VOLTAGE
vs. LOAD CURRENT
MAX8594/MAX8594A toc03
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
8_______________________________________________________________________________________
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA= +25°C, unless otherwise noted.)
1.50
2.00
1.75
2.50
2.25
3.25
3.00
2.75
3.50
0200100 300 400 500 600 700
SDIG OUTPUT VOLTAGE
vs. LOAD CURRENT
MAX8594/MAX8594A toc04
LOAD CURRENT (mA)
OUTPUT VOTLAGE (V)
1.8
1.7
1.9
0.9
3002001000400
COR1 OUTPUT VOLTAGE
vs. LOAD CURRENT
MAX8594/MAX8594A toc05
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
1.6
1.4
1.3
1.5
1.2
1.1
1.0
COR2 OUTPUT VOLTAGE
vs. LOAD CURRENT
MAX8594/MAX8594A toc06
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
80604020
1.62
1.64
1.66
1.68
1.70
1.72
1.74
1.76
1.78
1.80
1.82
1.60
0 100
LOAD-TRANSIENT MAIN
MAX8594/MAX8594A toc07
100µs/div
VMAIN
IOUT
100mA/div
50mV/div
AC-COUPLED
0
LOAD-TRANSIENT COR1
MAX8594/MAX8594A toc08
40µs/div
VCOR1
IOUT 100mA/div
20mV/div
AC-COUPLED
0
INPUT CURRENT
vs. INPUT VOLTAGE
MAX8594/MAX8594A toc09
INPUT VOLTAGE (V)
INPUT CURRENT (µA)
54321
10
20
30
40
50
60
0
06
VIN FALLING
VIN RISING
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
_______________________________________________________________________________________ 9
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA= +25°C, unless otherwise noted.)
RS AND OUTPUT TIMING
MAX8594/MAX8594A toc10
20ms/div
VCOR1
VIN
VMAIN
VRS
5V/div
2V/div
5V/div
1V/div
0
0
0
0
40
55
50
45
60
65
70
75
80
85
90
021345
LCD EFFICIENCY vs. LOAD CURRENT
MAX8594/MAX8594A toc11
LOAD CURRENT (mA)
EFFICIENCY (%)
VLCD = 18V
VLCD = 15V
LCD OUTPUT VOLTAGE
vs. LOAD CURRENT
MAX8594/MAX8594A toc12
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
108642
17.0
17.2
17.4
17.6
17.8
18.0
18.2
16.8
012
5.04.54.0
17.97
17.98
17.99
18.00
18.01
18.02
18.03
18.04
17.96
3.5 5.5
LCD OUTPUT VOLTAGE
vs. INPUT VOLTAGE
MAX8594/MAX8594A toc13
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
LCD SWITCHING WAVEFORMS
MAX8594/MAX8594A toc14
4µs/div
ILX
VIN
VLCD
VLX
20mV/div
AC-COUPLED
50mV/div
AC-COUPLED
20V/div
200mA/div
SDIG RESPONSE TO ENSD
MAX8594/MAX8594A toc15
200µs/div
VENSD
VSDIG
1V/div
2V/div
ILOAD = 100mA
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
10 ______________________________________________________________________________________
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA= +25°C, unless otherwise noted.)
LCD RESPONSE TO ENL
MAX8594/MAX8594A toc16
400µs/div
VENL
VLCD
5V/div
2V/div
LCD BOOST
SOFT-START
SW
TURN-ON
MAIN RESPONSE TO ENM
MAX8594/MAX8594A toc17
200µs/div
VENM
VMAIN
1V/div
2V/div
ILOAD = 100mA
COR1 RESPONSE TO ENC1
MAX8594/MAX8594A toc18
40µs/div
VENC1
VCOR1
ILXC
500mV/div
0
200mA/div
2V/div
RLOAD = 10Ω
FOR RS RESPONSE, SEE RS AND
COR1 RESPONSE TO ENC1
RS AND COR1 RESPONSE TO ENC1
MAX8594/MAX8594A toc19
10ms/div
VENC1
VCOR1
VRS
ILXC
1V/div
5V/div
200mA/div
2V/div
RLOAD = 10Ω
COR2 RESPONSE TO ENC2
MAX8594/MAX8594A toc20
200µs/div
VENC2
VCOR2
1V/div
2V/div
COR1 EFFICIENCY vs. LOAD CURRENT
WITH 1V OUTPUT
MAX8594/MAX8594A toc21
LOAD CURRENT (mA)
EFFICIENCY (%)
100101
45
50
55
60
65
70
75
80
85
90
40
0.1 1000
VIN = 3.6V
VIN = 4V
VIN = 5V
MAX8594
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
______________________________________________________________________________________ 11
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VIN = 4V, TA= +25°C, unless otherwise noted.)
COR1 EFFICIENCY vs. LOAD CURRENT
WITH 1.3V OUTPUT
MAX8594/MAX8594A toc22
LOAD CURRENT (mA)
EFFICIENCY (%)
100101
45
50
55
60
65
70
75
80
85
90
40
0.1 1000
VIN = 3.6V
VIN = 4V
VIN = 5V
COR1 EFFICIENCY vs. LOAD CURRENT
WITH 1.8V OUTPUT
MAX8594/MAX8594A toc22a
LOAD CURRENT (mA)
EFFICIENCY (%)
100101
55
60
65
70
75
80
85
90
95
100
50
0.1 1000
VIN = 3.6V
VIN = 4V
VIN = 5V
LIGHT-LOAD SWITCHING COR1
MAX8594/MAX8594A toc23
1µs/div
VCOR1
VLXC
ILXC
50mV/div
AC-COUPLED
200mA/div
5V/div
0
ILOAD = 20mA
HEAVY-LOAD SWITCHING COR1
MAX8594/MAX8594A toc24
200ns/div
VCOR1
VLXC
ILXC
5V/div
0
200mA/div
50mV/div
AC-COUPLED
ILOAD = 200mA
COR1 RESPONSE TO CV
MAX8594/MAX8594A toc25
40µs/div
VCOR1
VCV
0
2V/div
500mV/div
1.3V/1.8V
1V/1.3V
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
12 ______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1 SDIG
3.3V, 500mA LDO Output for Secure-Digital Card Slot. SDIG has reverse current protection so SDIG
can be biased when no power is present at IN. SDIG output turns off when VIN is below the DBI
threshold, ENSD goes low, or MAIN is out of regulation. When SDIG turns off, the output is discharged
at a rate depending on the load and the internal feedback resistors (typically 1.3MΩ).
2 IN Input Voltage to the MAX8594/MAX8594A. Bypass IN to GND with a 1µF ceramic capacitor.
3 RS
Reset Output. RS is an active-low, open-drain output that goes high impedance 20ms (typ) after
COR1 is in regulation. COR1 does not turn on until MAIN is in regulation. If MAIN falls out of
regulation, COR1 turns off and RS goes low. If MAIN is still in regulation, then RS goes low when VIN
is below the DBI threshold. RS goes low when ENC1 is low.
4 LBO
Low-Battery Detector Open-Drain Output. LBO is an active-low, open-drain output that goes high
impedance when VIN is greater than both the DBI and LBI thresholds. LBO goes low when VIN falls
below the LBI threshold.
5 DBO
Dead-Battery Detector Open-Drain Output. When VIN is below the DBI threshold, both DBO and LBO
go low, all outputs shut down, and the MAX8594/MAX8594A enter the lowest possible quiescent-
current state. Once this occurs, MAIN does not turn back on until both VIN exceeds the DBI threshold
and ENM = high. DBO is an active-low, open-drain output that goes high impedance when VIN
exceeds the DBI threshold.
6 DBI
Dead-Battery Detector. DBI remains active at all times. If DBI = IN, the DBI threshold is 3.0V when IN
is falling and 3.3V when rising. The DBI threshold can also be adjusted to other values by connecting
DBI to a resistor voltage-divider. Also see the DBO description.
7 LBI
Low-Battery Detector. If LBI = IN, the LBI threshold is 3.33V when IN is falling and 3.7V when rising.
The LBI threshold can also be adjusted to other values by connecting LBI to a resistor voltage-
divider. Also see the LBO description.
8 CV
S el ects 1V or 1.3V C OR1 Outp ut V ol tag e for M AX 8594, and 1.3V or 1.8V C O R1 for M AX 8594A. D r i ve C V
hi g h or connect to IN for a 1.3V C OR1 outp ut ( 1.8V C OR1 for M AX 8594A) . D r i ve C V l ow or connect to GN D
for a 1V C OR1 outp ut ( 1.3V C OR1 for M AX 8594A) .
9 ENM
Enable Input for MAIN. No other outputs turn on until MAIN is in regulation. If MAIN is pulled out of
regulation, all other outputs turn off and RS goes low. MAIN cannot be activated when VIN is below
the DBI threshold.
10 GND Ground
11 REF 1.25V 1% Reference. Bypass REF with a 0.1µF capacitor to GND. REF is enabled when VIN is greater
than the DBI threshold. REF is off when VIN is below the DBI threshold.
12 LFB
LCD Feedback Input. Connect LFB to a resistor-divider network between the LCD output and GND.
The feedback threshold is 1.25V. LCD turns off when VIN is below the DBI threshold, when ENL goes
low, or when MAIN is out of regulation. When off, the LCD output is discharged at a rate depending
on the load and the external feedback resistors (typically 2.4MΩ).
13 ENL
Enable Input for LCD (Boost Regulator). Drive ENL high to activate the LCD boost. Drive ENL low to
shut down the LCD output. The LCD converter cannot be activated when VIN is below the DBI
threshold or before MAIN is in regulation.
14 LXL LCD Boost Switch. Connect LXL to a boost inductor and Schottky diode. See Figure 1.
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
______________________________________________________________________________________ 13
Pin Description (continued)
PIN NAME FUNCTION
15 SW
LCD True-Shutdown Switch Output. SW is the power source for the LCD boost inductor. SW turns on
when ENL is high. For best efficiency, bypass SW with a 4.7µF capacitor to GND. SW is disconnected
from PV when LCD is shut down.
16 PV Power Input for COR1 Buck Converter and LCD True-Shutdown Switch. Connect IN to PV.
17 PGND Power Ground
18 LXC COR1 Switching Node. Connect LXC to the COR1 inductor. See Figure 1.
19 ENC1 Enable Input for Primary Core Buck Converter (COR1). Drive ENC1 high to turn on COR1 and low to
turn off. COR1 cannot be activated if VIN is below the DBI threshold or before MAIN is in regulation.
20 ENSD Enable Input for Secure Digital Card (SDIG). Drive ENSD low to turn off SDIG and high to turn on.
SDIG cannot be activated when VIN is below the DBI threshold or before MAIN is in regulation.
21 COR1
Feedback Sense Input for COR1 Output. COR1 turns off when VIN is below the DBI threshold, when
ENC1 goes low, or when MAIN is out of regulation. When off, the output is discharged by LXC through
an internal 1MΩ (typ) resistor.
22 ENC2
Enable Input for Secondary Core LDO (COR2). Drive ENC2 high to turn on COR2 and low to turn off.
COR2 cannot be activated when VIN is below the DBI threshold or before MAIN is in regulation. COR2
can be activated when VIN is greater than the DBI threshold and MAIN is in regulation.
23 COR2
1.8V, 50mA LDO Output for Secondary Core. COR2 turns off when VIN is below the DBI threshold,
when ENC2 goes low, or when MAIN is out of regulation. The COR2 output is discharged at a rate
depending on the load and the internal feedback resistors (typically 700kΩ).
24 MAIN
3.3V, 500mA LDO Output for Main Supply. MAIN output turns off when VIN is below the DBI threshold
or when ENM goes low. When off, the output is discharged at a rate depending on the load and the
internal feedback resistors (1.3MΩ typ).
— EP Exposed Pad. Connect to ground for enhanced power dissipation.
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
14 ______________________________________________________________________________________
MAIN
IN
C1
1µF
GND
SDIG
RS
ENC2
LXL
LFB
3.3V, 500mA
SD CARD SLOT
TO IN
ENL
LCD
15V
LCD
TO MAIN
SW
ENSD
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
3.3V, 500mA
MAIN
POWER
INPUT
C7
4.7µF
C8
1µF
C9
47pF
L1 10µH
MURATA
LQH32C
C2
4.7µF
C3
4.7µF
C4
2.2µF
C6
2.2µF
R1
2.2MΩ
R2
200kΩ
REF
C10
0.1µF
COR1
1.3V OR 1.8V
(MAX8594A)
1V OR 1.3V
(MAX8594)
400mA
COR1
LXC
PGND
L2
2.2µH
CV
1.8V/1.3V
1.3V/1V
C5
0µF
ENC1
1.8V, 50mA
COR2
COR2
TO MAIN
LBO
LBI
DBO
TO MAIN
DBI
PV
ENM
R8
1MΩ
R7
1MΩ
R6
1MΩ
DC
USB
1µF
1µF
1µF
AC ADAPTER INPUT
4.15V TO 7V
USB INPUT
4.15V TO 6V
BATT
GND
SDIG
COR2
COR1
MAIN
Li-ION
BATTERY
MAX8594
MAX8594A
MAX8601
EN
USEL
ISEL
500mA
100mA
CHARGE
CONTROL
DIE
THERMAL
CONTROL
LOGIC
POK
CHG
FLT
Figure 1. Typical Application Circuit with Charger
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
______________________________________________________________________________________ 15
MAIN
IN
C1
1µF
SDIG
ENC2
3.3V, 500mA
SD CARD SLOT
TO IN
FB
MAINOK
LCD
BOOST
20ms AFTER
COR1 OK
LCD OFF
SWITCH
ENSD
ON
OFF
ON
OFF
ON
OFF
ON
OFF
3.3V, 500mA
MAIN
POWER
INPUT C2
4.7µF
C3
4.7µF
C4
2.2µF
C6
2.2µF
COR1
LXC
PGND
L2
2.2µH
CV
1.8V/1.3V
1.3V/1V
C5
0µF
ENC1
1.8V, 50mA
COR2
COR2
PV
ENM
MAX8594
MAX8594A
LDO
CONTROL
LDO
CONTROL
LDO
CONTROL
PWM
BUCK
1.3V OR 1.8V (MAX8594A)
1V OR 1.3V (MAX8594)
400mA
COR1
ENL
LCD
TO MAIN
ON
OFF
TO MAIN
TO MAIN
R8
1MΩ
R7
1MΩ
R6
1MΩ
LBO
RS
DBO
GND
LXL
LFB
LCD
15V
SW
TO PV
C7
4.7µF
C8
1µF
C9
47pF
L1 10µH
MURATA
LQH32C
R1
2.2MΩ
R2
200kΩ
REF
LBI
IN
TO IN
TO IN
DBI
C10
0.1µF
REF
Figure 2. Block Diagram
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
16 ______________________________________________________________________________________
Detailed Description
COR1 Step-Down DC-DC Converter
The COR1 regulator is a proprietary hysteretic PWM
control step-down converter that supplies up to 400mA.
The output voltage is set to either 1V or 1.3V by CV for
the MAX8594 and 1.3V or 1.8V for the MAX8594A.
Under moderate to heavy loading, COR1 operates in a
low-noise PWM mode with constant frequency and
modulated pulse width. Switching harmonics generated
by fixed-frequency operation are consistent and easily
filtered. With light loads (<30mA), COR1 operates in an
efficiency-enhanced Idle Mode™ during which the con-
verter switches only as needed to service the load.
Linear Regulators
Power for main logic, a SD card slot, and CODEC are
provided by three LDOs:
•MAIN—Provides 3.3V at a guaranteed 500mA with a
typical current limit of 800mA.
•SDIG—Provides 3.3V at a guaranteed 500mA for SD
cards with a typical current limit of 718mA.
•COR2—Provides 1.8V at a guaranteed 50mA for a
CODEC core with a typical current limit of 98mA.
Note that it may not be possible to draw the full rated
current of MAIN and SDIG at all operating input volt-
ages due to the dropout limitations of those regulators.
The typical dropout resistance of the MAIN regulator is
0.7Ω(350mV drop at 500mA), and the typical dropout
resistance of the SDIG regulator is 0.85Ω(525mV drop
at 500mA).
All voltage outputs have separate enable inputs (ENM,
ENL, ENSD, ENC1, and ENC2); however, no other out-
put turns on until MAIN is in regulation. MAIN cannot be
activated until VIN exceeds the DBI threshold. When
SDIG is turned off, reverse current is blocked so the
SDIG output can be biased with an external source
when no power is present at IN. Leakage current is typ-
ically 3µA with 3.3V at SDIG.
LCD DC-DC Boost
The MAX8594/MAX8594A include a low-current, high-
voltage boost DC-DC converter for LCD bias. This circuit
can output up to 28V and is adjustable with either an ana-
log or PWM control signal using external components.
SW provides an input-power disconnect for the LCD
when ENL is low (off). The input-power disconnect
function is ideal for applications that require the output
voltage to fall to 0V in shutdown (True Shutdown). If
True Shutdown is not required, the SW switch can be
bypassed by connecting the boost inductor directly to PV
and removing the bypass cap on SW (C7 in Figure 1).
System Sleep
All regulated outputs turn off when VDBI < 1.25V (or VIN
= 3.0V if DBI = IN, Figure 1). The MAX8594/MAX8594A
resume normal operation when VDBI >1.375V (or VIN =
3.3V if DBI = IN, Figure 1).
Reset Output (
RS
)
Reset RS asserts when COR1 falls 20% below its set
level (38% for 1.8V setting in the MAX8594A). RS is an
open-drain, active-low output. Connect a pullup resistor
from RS to the logic supply of the gate receiving the
reset signal. RS deasserts a minimum of 10ms after the
COR1 output is in regulation. Upon application of valid
input power, the MAIN output activates first (if ENM =
high) followed by other outputs (if EN_ = high). Power
and output sequencing are shown in Figure 3.
Idle Mode is a trademark of Maxim Integrated Products, Inc.
Figure 3. Power Sequence for Rising and Falling Input Voltage.
Note that VIN thresholds are for LBI and DBI connected to VIN.
Other thresholds can be set with resistors.
VIN
3.3V MAIN
RS
LBO
DBO
VIN = 3.7V VIN = 3.33V
VIN = 3.0V
VIN = 3.3V
COR1
MAIN AT 90%
20ms RS
DEASSERT
DELAY
COR1 AT 90%
MAIN AT 86%
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
______________________________________________________________________________________ 17
Power Sequencing
As VIN increases from 0V, sequencing is as follows:
1) The DBI comparator is always on. DBO, LBO, and
RS are pulled low at approximately VIN = 0.7V.
MAIN, SDIG, COR1, COR2, and LCD are off.
2) When VIN rises above the DBI threshold (3.3V if
DBI = IN), DBO goes high impedance immediately
and the part turns on. The MAIN LDO turns on if
ENM = HIGH.
3) When the MAIN output reaches 90% of its nominal
voltage, or 2.97V, all other regulators turn on if
they are enabled.
4) RS goes high impedance 20ms after COR1 reach-
es 90% of its nominal voltage (69% when 1.8V set-
ting in the MAX8594A is used).
5) When VIN rises above the LBI threshold (3.7V if
LBI = IN), LBO goes high impedance.
As IN decreases, sequencing is as follows:
1) When VIN falls to the LBO threshold (3.33V if LBI =
IN), LBO is pulled to GND.
2) If VIN falls to the DBI threshold (3.0V if LBI = IN)
before the MAIN output falls to 2.838V, DBO and
RS go low, all regulators turn off, and the part is
shut down.
3) If the MAIN output falls below 86% of its nominal
voltage (2.838V) before IN reaches the DBI thresh-
old (3.0V if DBI = IN), RS is pulled to GND and all
other outputs turn off, but MAIN remains on (in
dropout) and DBO remains high until IN falls to the
DBI threshold.
Applications Information
COR1 Buck Output
COR1 Inductor
A 2.2µH inductor with a saturation current of at least
500mA is recommended. For lower load currents, the
inductor current rating may be reduced. For maximum
efficiency, the inductor’s DC resistance should be as
low as possible. Note that core materials differ among
manufacturers and inductor types, resulting in varia-
tions in efficiency.
COR1 Capacitors
Ceramic input and output capacitors are recommend-
ed. For best stability over a wide temperature range,
use capacitors with an X5R or X7R dielectric due to
their low ESR and low temperature coefficient.
The COR1 output capacitor C6 (Figure 1) is required to
keep the output voltage ripple small; 2.2µF is recom-
mended for most applications.
Due to the pulsating nature of input current in a buck
converter, a low-ESR input capacitor is required for
input voltage filtering and to minimize interference with
other circuits. The impedance of the input capacitor,
C5 (Figure 1), should be kept very low at the switching
frequency. A minimum value of 4.7µF is recommended
at PV for most applications. The input capacitor can be
increased to further improve input filtering.
LDO Output Capacitors
(MAIN, SDIG, COR2)
Capacitors are required at each LDO output of the
MAX8594/MAX8594A for stable operation over the full
load and temperature range. See Figure 1 for recom-
mended capacitor values for each output. To reduce
noise and improve load-transient response, larger out-
put capacitors up to 10µF can be used. Surface-mount
ceramic capacitors have very low ESR and are com-
monly available in values up to 10µF. X7R and X5R
dielectrics are recommended. Note that some ceramic
dielectrics, such as Z5U and Y5V, exhibit large capaci-
tance and ESR variation with temperature and require
larger than the recommended values to maintain stabil-
ity overtemperature.
Setting LBI and DBI
The DBI and LBI inputs monitor input voltage (usually a
battery) and trigger the DBO and LBO outputs. With
LBI and DBI connected to IN, the LBI and DBI thresh-
olds are internally set. For a rising input voltage, DBO
goes high when VIN exceeds 3.3V and LBO goes high
when VIN exceeds 3.7V. For a falling input voltage, LBO
goes low when VIN falls below 3.3V and DBO goes low
when VIN falls below 3.0V (see also the Electrical
Characteristics table and Figure 3). Alternatively, the
LBI and DBI thresholds can be set with external resis-
tors as shown in Figures 4 and 5.
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
18 ______________________________________________________________________________________
In Figure 4, one three-resistor-divider can set both DBI
and LBI according to the following equations (shown for
setting falling thresholds). Choose the lower resistor of
the divider chain (R5 in Figure 4) to be between 100kΩ
and 250kΩ. The equations for the two upper resistor-
dividers as a function of each (falling) threshold are:
where VDBFALL and VLBFALL are the desired falling
thresholds to trigger the DBO and LBO outputs,
respectively. Once those thresholds are selected, the
rising DBI and LBI thresholds are:
Alternately, LBI and DBI can be set with separate resis-
tor-dividers. The resistor calculation is simpler and the
two settings do not interact, but one more resistor is
needed and battery drain is slightly higher due to the
extra resistor load. Choose the lower resistor of each
divider chain (R7 and R9 in Figure 5) to be between
100kΩand 250kΩ. The equations for upper resistor-
dividers as a function of each (falling) threshold are:
where VDBFALL and VLBFALL are the desired falling
thresholds to trigger the DBO and LBO outputs,
respectively. Once those thresholds are selected, the
rising DBI and LBI thresholds are:
Note that the low-battery threshold should not be set
below the dead-battery threshold because both DBO
Vx
RR
R
LBRISE =+
125 89
9
.
Vx
RR
R
DBRISE =+
1 375 67
7
.
RRx
VLBFALL
89 1 125 1=−
.
RRx
VDBFALL
67 125 1=−
.
Vx
RRR
R
LBRISE =++
125 345
5
.
Vx
RRR
RR
DBRISE =++
+
1 375 345
45
.
RRx xV
xV
LBFALL
DBFALL
45
125
1 125 1=−
.
.
RRx
VxV
LBFALL
DBFALL
351 125 1125
=−
.
.
Figure 4. Setting the DBI and LBI Threshold with Three External
Resistors
MAX8594
MAX8594A
IN
R3
R4
R5
DBI
(1.25V FALLING,
1.375V RISING)
LBI
(1.125V FALLING,
1.25V RISING)
Figure 5. Setting the DBI and LBI Thresholds with Four Resistors
MAX8594
MAX8594A
IN
R6 R8
R7
R9
DBI
(1.25V FALLING,
1.375V RISING)
LBI
(1.125V FALLING,
1.25V RISING)
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
______________________________________________________________________________________ 19
and LBO are automatically driven low and the part is
shut down when the DBI threshold is crossed
(going low).
LCD Boost Output
LCD Inductor
The LCD boost is designed to operate with a wide
range of inductor values (4.7µH to 150µH). Smaller
inductance values typically offer smaller size for a
given series resistance or saturation current. Smaller
values cause LX to switch more frequently for a given
load and can reduce efficiency at low load currents.
Larger values reduce switching losses due to less fre-
quent switching for a given load, but higher DC resis-
tance can reduce efficiency. Note that for inductors
larger than 43µH, the peak inductor current does not
reach 250mA before the LXL maximum on-time (3µs)
expires. This reduces output current but may be benefi-
cial for light-load efficiency. A 10µH inductor provides a
good balance and works well for most applications.
The inductor’s saturation current rating should be
greater than the peak switching current (250mA).
LCD Diode
Schottky diodes rated at 250mA or more, such as the
MBR0530 or Nihon EP05Q03L, are recommended. The
diode reverse-breakdown voltage rating must be
greater than the LCD output voltage.
LCD Capacitors
For most applications, use a ceramic 1µF output
capacitor. This typically provides a peak-to-peak output
ripple of 30mV. In addition, bypass IN with 1µF and SW
with 4.7µF ceramic capacitors. An LCD feed-forward
capacitor, connected from the output to LFB, improves
stability over a wide range of battery voltages. A 47pF
capacitor is sufficient for most applications; however,
the optimum value is affected by PC board layout.
Setting LCD Voltage
Adjust the output voltage by connecting a voltage-
divider from the LCD output to LFB (see Figure 1).
Select R2 between 10kΩand 200kΩ. Calculate R1 with
the following equation:
where VLFB = 1.25V and VOUT can range from VIN to
28V. The input bias current of LFB is typically only 5nA,
allowing large-value resistors to be used. For less than
1% error, the current through R2 should be greater than
100 times the feedback input bias current (ILFB).
LCD Adjustment
The LCD boost output can be digitally adjusted by
either a DAC or PWM signal.
DAC Adjustment
Adding a DAC and a resistor, RD, to the divider circuit
(Figure 6) provides DAC adjustment of VOUT. Ensure that
VOUT(MAX) does not exceed the LCD panel rating. The
output voltage (VOUT) as a function of the DAC voltage
(VDOUT) is calculated using the following formula:
Vx
R
R
VxR
R
OUT DOUT
D
=+
+−
()
125 1 1
2
125 1
..
RRx
V
V
OUT
LFB
12 1=−
Figure 6. Adjusting the Output Voltage with a DAC
MAX5365
MAX8594
MAX8594A
DAC
AVDD
VDOUT
R1
R2
RD
VIN
VOUT
I1
I2
ID
CONTROL
ERROR AMP
SIMPLIFIED DC-DC CONVERTER
VREF
1.25V
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
20 ______________________________________________________________________________________
Using PWM Signals
Many µPs have the ability to create PWM outputs.
These are digital outputs, based on either 16-bit or 8-bit
counters, with a programmable duty cycle. In many
applications, they are suitable for adjusting the output
of the MAX8594/MAX8594A as seen in Figure 7.
The circuit consists of the PWM source, capacitor C11,
and resistors RDand RW. To analyze the transfer func-
tion of the PWM circuit, it is easiest to first simplify it to
its Thevenin equivalent. The Thevenin voltage is calcu-
lated using the following formula:
where D is the duty cycle of the PWM signal, VOH is the
PWM output high level (often 3.3V), and VOL is the
PWM output low level (usually 0V). For CMOS logic, this
equation simplifies to:
VTHEV = D x VDD
where VDD is the logic-high output voltage of the PWM
output. The Thevenin impedance is the sum of resistors
RWand RD:
RTHEV = RD+ RW
The output voltage (VOUT) as a function of the PWM
average voltage (VTHEV) is:
When using the PWM adjustment method, RDisolates
the capacitor from the feedback loop of the
MAX8594/MAX8594A. The cutoff frequency of the low-
pass filter is defined as:
The cutoff frequency should be at least two decades
below the PWM frequency to minimize the induced AC
ripple at the output.
An important consideration is the turn-on transient cre-
ated by the initial charge on filter capacitor C11. This
capacitor forms a time constant with RTHEV, causing
the output to initialize at a higher than intended voltage.
This overshoot is minimized by scaling RDas high as
possible compared to R1 and R2. Alternatively, the µP
can briefly keep the LCD disabled until the PWM volt-
age has had time to stabilize.
PC Board Layout and Grounding
Careful PC board layout is important for minimizing
ground bounce and noise. Keep the MAX8594/
MAX8594A’s ground pin and the ground leads of the
input and output capacitors less than 0.2in (5mm)
apart. In addition, keep all connections to LFB, COR1,
LXC, and LXL as short as possible. In particular, exter-
nal feedback resistors should be as close to LFB as
possible. To minimize output voltage ripple and to max-
imize output power and efficiency, use a ground plane
and solder PGND and exposed pad directly to the
ground plane. Refer to the MAX8594 evaluation kit for a
layout example.
Thermal Considerations
In most applications, the circuit is located on a multilay-
er board and full use of the four or more layers is recom-
mended. For heat dissipation, connect the exposed
backside pad of the thin QFN package to a large
ground plane, preferably on a surface of the board that
receives good airflow. Typical applications use multiple
ground planes to minimize thermal resistance. Avoid
large AC currents through the ground plane.
fxxR xC
CTHEV
=1
211
π
Vx
R
R
VxR
R
OUT THEV
THEV
=+
+−
()
125 1 1
2
125 1
..
VDxV DxV
THEV OH OL
=
()
+−
()
1
Figure 7. PWM-Controlled LCD Bias
SW
LXL LCD
15V
C7
4.7µF
C8
1µF
C9
47pF
R1
2.2MΩ
R2
200kΩ
RD
RW
CONNECTION FOR
PWM-CONTROLLED
LCD BIAS
C11
LFB
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
______________________________________________________________________________________ 21
24
MAIN
23
COR2
22
ENC2
21
COR1
20
ENSD
19
ENC1
7LBI
8CV
9ENM
10 GND
11 REF
12 LFB
MAX8594
MAX8594A
3
RS
2
IN
1
SDIG
4
LBO
5
DBO
6
DBI
16
PV
17
PGND
18
LXC
15
SW
14
LXL
13
ENL
TOP VIEW
THIN QFN
Pin Configuration
Chip Information
TRANSISTOR COUNT: 3436
PROCESS: BiCMOS
MAX8594/MAX8594A
5-Output PMICs with DC-DC Core Supply for
Low-Cost PDAs
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
24L QFN THIN.EPS
PACKAGE OUTLINE,
21-0139 2
1
D
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
PACKAGE OUTLINE,
21-0139
2
2
D
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm