TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
1 A Low-Dropout Voltage Regulator
D
Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V,
3.0-V, 3.3-V, 5.0-V Fixed Output and
Adjustable Versions
D
Dropout Voltage Down to 230 mV at 1 A
(TPS76850)
D
Ultra Low 85 µA Typical Quiescent Current
D
Fast Transient Response
D
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
D
Open Drain Power Good (See TPS767xx for
Power-On Reset With 200-ms Delay Option)
D
8-Pin SOIC and 20-Pin TSSOP (PWP)
Package
D
Thermal Shutdown Protection
description
This device is designed to have a fast transient
response and be stable with 10-µF low ESR
capacitors. This combination provides high
performance at a reasonable cost.
t – Time – µs
LOAD TRANSIENT RESPONSE
I – Output Current – A
OVO– Change in∆
Output Voltage – mV
1
0.5
604020 80 100 140120 160 180 200
0
CL = 10 µF
TA = 25°C
0
0
50
100
–50
–100
TA – Free-Air Temperature – °C
–40 0 20 120
103
–60 40 60 80 100
– Dropout Voltage – mV
VDO
TPS76833
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
102
101
100
10–1
10–2 –20 140
IO = 1 A
IO = 10 mA
IO = 0
CO = 10 µF
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
NC – No internal connection
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
GND/HSINK
GND/HSINK
GND
NC
EN
IN
IN
NC
GND/HSINK
GND/HSINK
GND/HSINK
GND/HSINK
NC
NC
PG
FB/NC
OUT
OUT
GND/HSINK
GND/HSINK
PWP PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
GND
EN
IN
IN
PG
FB/NC
OUT
OUT
D PACKAGE
(TOP VIEW)
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV
at an output current of 1 A for the TPS76850) and is directly proportional to the output current. Additionally, since
the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output
loading (typically 85 µA over the full range of output current, 0 mA to 1 A). These two key specifications yield
a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep
mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to
less than 1 µA at TJ = 25°C.
Power good (PG) is an active high output, which can be used to implement a power-on reset or a low-battery
indicator.
The TPS768xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V and 5.0-V fixed-voltage versions and
in an adjustable version (programmable over the range of 1.2 V to 5.5 V). Output voltage tolerance is specified
as a maximum of 2% over line, load, and temperature ranges. The TPS768xx family is available in 8 pin SOIC
and 20 pin PWP packages.
AVAILABLE OPTIONS
T
J
OUTPUT
VOLTAGE
(V) PACKAGED DEVICES
J
TYP TSSSOP
(PWP) SOIC
(D)
5.0 TPS76850Q TPS76850Q
3.3 TPS76833Q TPS76833Q
3.0 TPS76830Q TPS76830Q
2.8 TPS76828Q TPS76828Q
–
40
°
Cto125
°
C
2.7 TPS76827Q TPS76827Q
–40 C
to
125 C
2.5 TPS76825Q TPS76825Q
1.8 TPS76818Q TPS76818Q
1.5 TPS76815Q TPS76815Q
Adjustable
1.2 V to 5.5 V TPS76801Q TPS76801Q
The TPS76801 is programmable using an external resistor divider (see application
information). The D and PWP packages are available taped and reeled. Add an R
suffix to the device type (e.g., TPS76801QDR).
†See application information section for capacitor selection details.
PG
OUT
OUT
7
6
5
IN
IN
EN
GND
3
16
14
13
VI
0.1 µF
PG
VO
10 µF
+
TPS768xx
CO†
Figure 1. Typical Application Configuration (For Fixed Output Options)
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram—adjustable version
_
+
Vref = 1.1834 V
OUT
FB/NC
EN
GND
PG
_
+
IN
External to the device
R1
R2
functional block diagram—fixed-voltage version
_
+
Vref = 1.1834 V
OUT
EN
GND
R1
R2
_
+
IN
PG
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions – SOIC Package
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
GND 1Regulator ground
EN 2 I Enable input
IN 3 I Input voltage
IN 4 I Input voltage
OUT 5 O Regulated output voltage
OUT 6 O Regulated output voltage
FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options)
PG 8 O PG output
Terminal Functions – PWP Package
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
GND/HSINK 1 Ground/heatsink
GND/HSINK 2 Ground/heatsink
GND 3 LDO ground
NC 4No connect
EN 5 I Enable input
IN 6 I Input
IN 7 I Input
NC 8 No connect
GND/HSINK 9 Ground/heatsink
GND/HSINK 10 Ground/heatsink
GND/HSINK 11 Ground/heatsink
GND/HSINK 12 Ground/heatsink
OUT 13 O Regulated output voltage
OUT 14 ORegulated output voltage
FB/NC 15 IFeedback input voltage for adjustable device (no connect for fixed options)
PG 16 OPG output
NC 17 No connect
NC 18 No connect
GND/HSINK 19 Ground/heatsink
GND/HSINK 20 Ground/heatsink
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Ĕ
Input voltage range‡, VI –0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at EN –0.3 V to VI + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum PG voltage 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See dissipation rating tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage, VO (OUT, FB) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, TJ –40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
‡All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES
PACKAGE AIR FLOW
(CFM) TA < 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING
D
0568.18 mW 5.6818 mW/°C312.5 mW 227.27 mW
D
250 904.15 mW 9.0415 mW/°C497.28 mW 361.66 mW
DISSIPATION RATING TABLE 2 – FREE-AIR TEMPERATURES
PACKAGE AIR FLOW
(CFM) TA < 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING
PWP#
02.9 W 23.5 mW/°C1.9 W 1.5 W
PWP#
300 4.3 W 34.6 mW/°C 2.8 W 2.2 W
PWP||
03 W 23.8 mW/°C1.9 W 1.5 W
PWP||
300 7.2 W 57.9 mW/°C4.6 W 3.8 W
#This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper ,
2-in × 2-in coverage (4 in2).
|| This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper
with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer
to TI technical brief SLMA002.
recommended operating conditions
MIN MAX UNIT
Input voltage, VI
k
2.7 10 V
Output voltage range, VO1.2 5.5 V
Output current, IO (Note 1) 0 1.0 A
Operating virtual junction temperature, TJ (Note 1) –40 125 °C
k
To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load).
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
Vi = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TPS76801
5.5 V ≥ VO ≥ 1.2 V, TJ = 25°C VO
TPS76801
5.5 V ≥ VO ≥ 1.2 V, TJ = –40°C to 125°C 0.98VO1.02VO
TPS76815
TJ = 25°C, 2.7 V < VIN < 10 V 1.5
TPS76815
TJ = –40°C to 125°C, 2.7 V < VIN < 10 V 1.470 1.530
TPS76818
TJ = 25°C, 2.8 V < VIN < 10 V 1.8
TPS76818
TJ = –40°C to 125°C, 2.8 V < VIN < 10 V 1.764 1.836
TPS76825
TJ = 25°C, 3.5 V < VIN < 10 V 2.5
TPS76825
TJ = –40°C to 125°C, 3.5 V < VIN < 10 V 2.450 2.550
Output voltage
(10 µA to 1 A load)
TPS76827
TJ = 25°C, 3.7 V < VIN < 10 V 2.7
V
(10
µ
A
t
o
1
A
l
oa
d)
(see
Not
e
2
)
TPS76827
TJ = –40°C to 125°C, 3.7 V < VIN < 10 V 2.646 2.754
V
(see
Note
2)
TPS76828
TJ = 25°C, 3.8 V < VIN < 10 V 2.8
TPS76828
TJ = –40°C to 125°C, 3.8 V < VIN < 10 V 2.744 2.856
TPS76830
TJ = 25°C, 4.0 V < VIN < 10 V 3.0
TPS76830
TJ = –40°C to 125°C, 4.0 V < VIN < 10 V 2.940 3.060
TPS76833
TJ = 25°C, 4.3 V < VIN < 10 V 3.3
TPS76833
TJ = –40°C to 125°C, 4.3 V < VIN < 10 V 3.234 3.366
TPS76850
TJ = 25°C, 6.0 V < VIN < 10 V 5.0
TPS76850
TJ = –40°C to 125°C, 6.0 V < VIN < 10 V 4.900 5.100
Quiescent current (GND current) 10 µA < IO < 1 A, TJ = 25°C 85
µA
()
EN = 0V, (see Note 2) IO = 1 A, TJ = –40°C to 125°C 125 µ
A
Output voltage line regulation (∆VO/VO)
(see Notes 2 and 3) VO + 1 V < VI ≤ 10 V, TJ = 25°C 0.01 %/V
Load regulation 3 mV
Output noise voltage BW = 300 Hz to 50 kHz,
CO = 10 µF, TJ = 25°C190 µVrms
Output current Limit VO = 0 V 1.7 2 A
Thermal shutdown junction temperature 150 °C
Standby current
EN = VI, TJ = 25°C,
2.7 V < VI < 10 V 1µA
Standb
y
c
u
rrent
EN = VI, TJ = –40°C to 125°C
2.7 V < VI < 10 V 10 µA
FB input current TPS76801 FB = 1.5 V 2 nA
High level enable input voltage 1.7 V
Low level enable input voltage 0.9 V
Power supply ripple rejection (see Note 2) f = 1 KHz, CO = 10 µF,
TJ = 25°C60 dB
Minimum input voltage for valid PG IO(PG) = 300µA 1.1 V
T rip threshold voltage VO decreasing 92 98 %VO
PG Hysteresis voltage Measured at VO0.5 %VO
Output low voltage VI = 2.7 V, IO(PG) = 1mA 0.15 0.4 V
Leakage current V(PG) = 5 V 1µA
In
p
ut current (EN)
EN = 0 V –1 0 1
µA
Inp
u
t
c
u
rrent
(EN)
EN = VI–1 1 µ
A
NOTE: 2. Minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Maximum IN voltage 10 V.
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
Vi = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted) (continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TPS76828
IO = 1 A, TJ = 25°C 500
TPS76828
IO = 1 A, TJ = –40°C to 125°C 825
TPS76830
IO = 1 A, TJ = 25°C 450
Dropout voltage
TPS76830
IO = 1 A, TJ = –40°C to 125°C 675
mV
g
(See Note 4)
TPS76833
IO = 1 A, TJ = 25°C 350
mV
TPS76833
IO = 1 A, TJ = –40°C to 125°C 575
TPS76850
IO = 1 A, TJ = 25°C 230
TPS76850
IO = 1 A, TJ = –40°C to 125°C 380
NOTES: 3. If VO ≤ 1.8 V then Vimax = 10 V, Vimin = 2.7 V :
Line Reg. (mV)
+ǒ
%
ń
V
Ǔ
VO
ǒ
Vimax
*
2.7 V
Ǔ
100
1000
If VO ≥ 2.5 V then Vimax = 10 V, Vimin = VO + 1 V:
Line Reg. (mV)
+ǒ
%
ń
V
Ǔ
VO
ǒ
Vimax
*ǒ
VO
)
1V
ǓǓ
100
1000
4. IN voltage equals VO(Typ) – 100 mV; TPS76801 output voltage set to 3.3 V nominal with external resistor divider. TPS76815,
TPS76818, TPS76825, and TPS76827 dropout voltage limited by input voltage range limitations (i.e., TPS76830 input voltage
needs to drop to 2.9 V for purpose of this test).
Table of Graphs
FIGURE
VO
Out
p
ut voltage
vs Output current 2, 3, 4
V
O
O
u
tp
u
t
v
oltage
vs Free-air temperature 5, 6, 7
Ground current vs Free-air temperature 8, 9
Power supply ripple rejection vs Frequency 10
Output noise vs Frequency 11
ZoOutput impedance vs Frequency 12
VDO Dropout voltage vs Free-air temperature 13
Line transient response 14, 16
Load transient response 15, 17
Output voltage vs Time 18
Dropout voltage vs Input voltage 19
Equivalent series resistance (ESR) vs Output current 21 – 24
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 2
IO – Output Current – A
TPS76833
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.2830
3.2815
3.2800 0.1 0.3
3.2825
3.2820
3.2810
0.2 0.8 1
3.2835
0 0.9
– Output Voltage – V
VO
3.2805
0.4 0.5 0.6 0.7
VI = 4.3 V
TA = 25°C
Figure 3
IO – Output Current – A
1.4975
1.4960
1.4950
1.4970
1.4965
1.4955
1.4985
– Output Voltage – V
VO
TPS76815
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
1.4980
0.1 0.30.2 0.8 10 0.90.4 0.5 0.6 0.7
VI = 2.7 V
TA = 25°C
Figure 4
IO – Output Current – A
TPS76825
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
2.4955
2.4940
2.4920 0.1 0.3
2.4950
2.4945
2.4935
0.2 0.4 0.6
2.4960
0 0.5
– Output Voltage – V
VO
VI = 3.5 V
TA = 25°C
2.4930
2.4925
0.80.7 0.9 1
Figure 5
TA – Free-Air Temperature – °C
TPS76833
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
– Output Voltage – V
VO
3.31
3.28
3.25 –40 0
3.30
3.29
3.27
–20 100 140
3.32
–60 120
3.26
20 40 60 80
VI = 4.3 V
IO = 1 A IO = 1 mA
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
TA – Free-Air Temperature – °C
TPS76815
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
– Output Voltage – V
VO
1.515
1.500
1.485 –40 0
1.510
1.505
1.495
–20 100–60 120
1.490
20 40 60 80
VI = 2.7 V
IO = 1 A
IO = 1 mA
140
Figure 7
TA – Free-Air Temperature – °C
TPS76825
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
– Output Voltage – V
VO
–40 0–20 100–60 12020 40 60 80
2.515
2.500
2.480
2.510
2.505
2.495
2.490
2.485
VI = 3.5 V
IO = 1 A
IO = 1 mA
TA – Free-Air Temperature – °C
TPS76833
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
Ground Current – Aµ
92
84
72
90
88
82
80
78
76
74
86
–40 0–20 100–60 12020 40 60 80 140
VI = 4.3 V
IO = 500 mA
IO = 1 A
IO = 1 mA
Figure 8 Figure 9
TA – Free-Air Temperature – °C
TPS76815
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
Ground Current – Aµ
–40 0–20 100–60 12020 40 60 80 140
VI = 2.7 V
IO = 1 A
100
95
90
85
80
75
IO = 1 mA
IO = 500 mA
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
100k10k
PSRR – Power Supply Ripple Rejection – dB
f – Frequency – Hz
POWER SUPPLY RIPPLE REJECTION
vs
FREQUENCY
70
60
50
40
30
20
10
0
–10
TPS76833
90
80
1k10010 1M
VI = 4.3 V
CO = 10 µF
IO = 1 A
TA = 25°C
TPS76833
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
Figure 11
f – Frequency – Hz
102103104105
10–5
10–6
10–8
10–7
IO = 7 mA
IO = 1 A
VI = 4.3 V
CO = 10 µF
TA = 25°C
V HzOutput Spectral Noise Density – µ
Figure 12
f – Frequency – kHz
– Output Impedance –ZoΩ
101102105106
0
10–1
10–2 104
103
IO = 1 mA
IO = 1 A
VI = 4.3 V
CO = 10 µF
TA = 25°C
TPS76833
OUTPUT IMPEDANCE
vs
FREQUENCY
Figure 13
TA – Free-Air Temperature – °C
–40 0 20 120
103
–60 40 60 80 100
– Dropout Voltage – mV
VDO
TPS76833
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
102
101
100
10–1
10–2 –20 140
IO = 1 A
IO = 10 mA
IO = 0
CO = 10 µF
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 14
VO– Change in
10
0
3.7
2.7
TPS76815
LINE TRANSIENT RESPONSE
VI
t – Time – µs
0604020 80 100 140120 160 180 200
– Input Voltage – V
∆
Output Voltage – mV
CL = 10 µF
TA = 25°C
–10
Figure 15
t – Time – µs
TPS76815
LOAD TRANSIENT RESPONSE
I – Output Current – A
OVO– Change in∆
Output Voltage – mV
CL = 10 µF
TA = 25°C
1
0.5
0
0604020 80 100 140120 160 180 200
0
50
100
–50
–100
Figure 16
TPS76833
LINE TRANSIENT RESPONSE
t – Time – µs
VO– Change in VI– Input Voltage – V
∆
Output Voltage – mV
5.3
604020 80 100 140120 160 180 200
CL = 10 µF
TA = 25°C
0
4.3
10
0
–10
Figure 17
t – Time – µs
TPS76833
LOAD TRANSIENT RESPONSE
I – Output Current – A
OVO– Change in∆
Output Voltage – mV
1
0.5
604020 80 100 140120 160 180 200
0
CL = 10 µF
TA = 25°C
0
0
50
100
–50
–100
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 18
t – Time – µs
TPS76833
OUTPUT VOLTAGE
vs
TIME (AT STARTUP)
3
2
604020 80 100 140120 160 180 2000
VO– Output Voltage – V
0
1
4
Enable Pulse – V
Figure 19
VI – Input Voltage – V
600
300
034
500
400
200
3.52.5
– Dropout Voltage – mV
100
4.5 5
VDO
900
800
700
TA = 125°C
TA = –40°C
TA = 25°C
IO = 1 A
TPS76801
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
IN
EN
OUT
+
GND CO
ESR
RL
VITo Load
Figure 20. Test Circuit for Typical Regions of Stability (Figures 21 through 24) (Fixed Output Options)
†Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to CO.
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 21
0.10 200 400 600 800 1000
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE†
vs
OUTPUT CURRENT
10
IO – Output Current – mA
ESR – Equivalent series restance – Ω
1
Vo = 3.3 V
CL = 4.7 µF
VI = 4.3 V
TA = 25°C
Region of Stability
Region of Instability
Figure 22
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE†
vs
OUTPUT CURRENT
IO – Output Current – mA
ESR – Equivalent Series Resistance – Ω
0.10 200 400 600 800 1000
10
1
Vo = 3.3 V
Cl = 4.7 µF
VI = 4.3 V
TJ = 125°C
Region of Stability
Region of Instability
Figure 23
0.10 200 400 600 800 1000
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE†
vs
OUTPUT CURRENT
10
IO – Output Current – mA
ESR – Equivalent series restance – Ω
1
Region of Instability
Region of Stability
Vo = 3.3 V
CL = 22 µF
VI = 4.3 V
TA = 25°C
Figure 24
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE†
vs
OUTPUT CURRENT
0.10 200 400 600 800 1000
10
1
IO – Output Current – mA
Vo = 3.3 V
Cl = 22 µF
VI = 4.3 V
TJ = 125°C
Region of Stability
Region of Instability
ESR – Equivalent series restance – Ω
†Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to CO.
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
The TPS768xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V,
3.3 V, and 5.0 V), and offers an adjustable device, the TPS76801 (adjustable from 1.2 V to 5.5 V).
device operation
The TPS768xx features very low quiescent current, which remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the
load current through the regulator (IB = IC/β). The TPS768xx uses a PMOS transistor to pass current; because
the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates
to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems,
it means rapid battery discharge when the voltage decays below the minimum required for regulation. The
TPS768xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS768xx family also features a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown
feature is not used, EN should be tied to ground. Response to an enable transition is quick; regulated output
voltage is reestablished in typically 120 µs.
minimum load requirements
The TPS768xx family is stable even at zero load; no minimum load is required for operation.
FB - pin connection (adjustable version only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output
voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 26. Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup
is essential.
external capacitor requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves
load transient response and noise rejection if the TPS768xx is located more than a few inches from the power
supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load
transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS768xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR
(equivalent series resistance) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are
acceptable, provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and
multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of
the commercially available 10 µF surface–mount ceramic capacitors, including devices from Sprague and
Kemet, meet the ESR requirements stated above.
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
external capacitor requirements (continued)
PG
OUT
OUT
7
6
5
IN
IN
EN
GND
3
16
14
13
VI
C1
0.1 µF
PG
VO
10 µF
+
TPS768xx
CO
250 kΩ
Figure 25. Typical Application Circuit (Fixed Versions)
programming the TPS76801 adjustable LDO regulator
The output voltage of the TPS76801 adjustable regulator is programmed using an external resistor divider as
shown in Figure 26. The output voltage is calculated using:
VO
+
Vref
ǒ
1
)
R1
R2
Ǔ
(1)
Where
Vref = 1.1834 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 30.1 kΩ to set the divider current at 50 µA and then calculate R1 using:
R1
+ǒ
VO
Vref
*
1
Ǔ
R2 (2)
OUTPUT
VOLTAGE R1 R2
2.5 V
3.3 V
3.6 V
4.75 V
UNIT
33.2
53.6
61.9
90.8
30.1
30.1
30.1
30.1
kΩ
kΩ
kΩ
kΩ
OUTPUT VOLTAGE
PROGRAMMING GUIDE
VO
VIPG
OUT
FB / NC
R1
R2
GND
EN
IN
≤0.9 V
≥1.7 V
TPS76801
PG
0.1 µF250 kΩ
Figure 26. TPS76801 Adjustable LDO Regulator Programming
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
power-good indicator
The TPS768xx features a power-good (PG) output that can be used to monitor the status of the regulator . The
internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup
resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a
low-battery indicator. PG does not assert itself when the regulated output voltage falls out of the specified 2%
tolerance, but instead reports an output voltage low, relative to its nominal regulated value.
regulator protection
The TPS768xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS768xx also features internal current limiting and thermal protection. During normal operation, the
TPS768xx limits output current to approximately 1.7 A. When current limiting engages, the output voltage scales
back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device
failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of
the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below
130°C(typ), regulator operation resumes.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. T o ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than
or equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
PD(max)
+
TJmax
*
TA
R
q
JA
Where
TJmax is the maximum allowable junction temperature
TA is the ambient temperature.
RθJA is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal
SOIC and 32.6°C/W for the 20-terminal PWP with no airflow.
The regulator dissipation is calculated using:
PD
+ǒ
VI
*
VO
Ǔ
IO
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
4040047/B 03/95
0.228 (5,80)
0.244 (6,20)
0.069 (1,75) MAX 0.010 (0,25)
0.004 (0,10)
1
14
0.014 (0,35)
0.020 (0,51)
A
0.157 (4,00)
0.150 (3,81)
7
8
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
PINS **
0.008 (0,20) NOM
A MIN
A MAX
DIM
Gage Plane
0.189
(4,80)
(5,00)
0.197
8
(8,55)
(8,75)
0.337
14
0.344
(9,80)
16
0.394
(10,00)
0.386
0.004 (0,10)
M
0.010 (0,25)
0.050 (1,27)
0°–8°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Four center pins are connected to die mount pad.
E. Falls within JEDEC MS-012
TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q
TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS211B – JUNE 1999 – REVISED JULY 1999
18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
4073225/E 03/97
0,50
0,75
0,25
0,15 NOM
Thermal Pad
(See Note D)
Gage Plane
2824
7,70
7,90
20
6,40
6,60
9,60
9,80
6,60
6,20
11
0,19
4,50
4,30
10
0,15
20
A
1
0,30
1,20 MAX
1614
5,10
4,90
PINS **
4,90
5,10
DIM
A MIN
A MAX
0,05
Seating Plane
0,65
0,10
M
0,10
0°–8°
20-PIN SHOWN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusions.
D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically
and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments Incorporated.
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Copyright 1999, Texas Instruments Incorporated
