DM74LS323WM - National Semiconductor

TL/F/9829

DM54LS323/DM74LS323 8-Bit Universal Shift/Storage Register

with Synchronous Reset and Common I/O Pins

April 1992

DM54LS323/DM74LS323

8-Bit Universal Shift/Storage Register

with Synchronous Reset and Common I/O Pins

General Description

The ’LS323 is an 8-bit universal shift/storage register with

TRI-STATEÉoutputs. Its function is similar to the ’LS299

with the exception of Synchronous Reset. Parallel load in-

puts and flip-flop outputs are multiplexed to minimize pin

count. Separate inputs and outputs are provided for flip-

flops Q0 and Q7 to allow easy cascading. Four operation

modes are possible: hold (store), shift left, shift right, and

parallel load. All modes are activated on the LOW-to-HIGH

transition of the Clock.

Features

YCommon I/O for reduced pin count

YFour operation modes: shift left, shift right, parallel load

and store

YSeparate continuous inputs and outputs from Q0 and

Q7 allow easy cascading

YFully synchronous reset

YTRI-STATE outputs for bus oriented applications

Connection Diagram

Dual-In-Line Package

TL/F/9829–1

Order Number DM54LS323J, DM54LS323W, DM74LS323WM or DM74LS323N

See NS Package Number J20A, M20B, N20A or W20A

Pin Names Description

CP Clock Pulse Input (Active Rising Edge)

DS0 Serial Data Input for Right Shift

DS7 Serial Data Input for Left Shift

S0, S1 Mode Select Inputs

SR Synchronous Reset Input (Active LOW)

OE1, OE2 TRI-STATE Output Enable Inputs (Active LOW)

I/O0– I/O7 Parallel Data Inputs or TRI-STATE

Parallel Outputs

Q0, Q7 Serial Outputs

TRI-STATEÉis a registered trademark of National Semiconductor Corporation.

C1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.

Absolute Maximum Ratings (Note)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales

Office/Distributors for availability and specifications.

Supply Voltage 7V

Input Voltage 7V

Operating Free Air Temperature Range

DM54LS b55§Ctoa

125§C

DM74LS 0§Ctoa

70§C

Storage Temperature Range b65§Ctoa

150§C

Note:

The ‘‘Absolute Maximum Ratings’’ are those values

beyond which the safety of the device cannot be guaran-

teed. The device should not be operated at these limits. The

parametric values defined in the ‘‘Electrical Characteristics’’

table are not guaranteed at the absolute maximum ratings.

The ‘‘Recommended Operating Conditions’’ table will define

the conditions for actual device operation.

Recommended Operating Conditions

Symbol Parameter DM54LS323 DM74LS323 Units

Min Nom Max Min Nom Max

VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V

VIH High Level Input Voltage 2 2 V

VIL Low Level Input Voltage 0.7 0.8 V

IOH High Level Output Current b0.4 b0.4 mA

IOL Low Level Output Current 4 8 mA

TAFree Air Operating Temperature b55 125 0 70 §C

ts(H) Setup Time HIGH or LOW 24 24 ns

ts(L) S0 or S1 to CP 24 24

th(H) Hold Time HIGH or LOW 5 0 ns

th(L) S0 or S1 to CP 5 0

ts(H) Setup Time HIGH or LOW 15 10 ns

ts(L) I/On,D

0, DS7toCP 15 10

h(H) Hold Time HIGH or LOW 5 0 ns

th(L) I/On,D

0, DS7toCP 5 0

s(H) Setup Time HIGH or LOW 30 15 ns

ts(L) SR to CP 20 15

th(H) Hold Time HIGH or LOW 0 0 ns

th(L) SR to CP 0 0

tw(H) CP Pulse Width HIGH or LOW 15 15 ns

tw(L) 15 15

Electrical Characteristics

Over recommended operating free air temperature range (unless otherwise noted)

Symbol Parameter Conditions Min Typ Max Units

(Note 1)

VIInput Clamp Voltage VCC eMin, IIeb

18 mA b1.5 V

VOH High Level Output VCC eMin, IOH eMax DM54 2.5 V

Voltage VIL eMax DM74 2.7 3.4

VOL Low Level Output VCC eMin, IOL eMax DM54 0.4

Voltage VIH eMin DM74 0.35 0.5 V

IOL e4 mA, VCC eMin DM74 0.25 0.4

IIInput Current @Max VCC eMax, VIe7V Others 0.1 mA

Input Voltage VIe10V (DM54) SnInputs 0.2 mA

IIH High Level Input Current VCC eMax, VIe2.7V Others 20 mA

SnInputs 40 mA

IIL Low Level Input Current VCC eMax, VIe0.4V Others b0.4 mA

SnInputs b0.8 mA

IOS Short Circuit VCC eMax DM54 b20 b100 mA

Output Current (Note 2) DM74 b20 b100

ICC Supply Current VCC eMax 60 mA

IOZH TRI-STATE Output Off VCC eMax 40 mA

Current HIGH VOe2.7V

IOZL TRI-STATE Output Off VCC eMax b400 mA

Current LOW VOe0.4V

Note 1: All typicals are at VCC e5V, TAe25§C.

Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.

Switching Characteristics VCC ea

5.0V, TAea

25§C

DM54LS323 DM74LS323

Symbol Parameter CLe15 pF RLe2kX,C

Le15 pF Units

Min Max Min Max

fmax Maximum Input Frequency 35 35 MHz

tPLH Propagation Delay 26 23 ns

tPHL CP to Q0 or Q7 28 25

tPLH Propagation Delay 25 25 ns

tPHL CP to I/On35 29

tPZH Output Enable Time 18 18 ns

tPZL CLe50 pF 25 23

tPHZ Output Disable Time 15 15 ns

tPLZ CLe5pF 20 15

Functional Description

The ’LS323 contains eight edge-triggered D-type flip-flops

and the interstage logic necessary to perform synchronous

reset, shift left, shift right, parallel load and hold operations.

The type of operation is determined by S0 and S1 as shown

in the Mode Select Table. All flip-flop outputs are brought

out through TRI-STATE buffers to separate I/O pins that

also serve as data inputs in the parallel load mode. Q0 and

Q7 are also brought out on other pins for expansion in serial

shifting of longer words.

A LOW signal on SR overrides the Select inputs and allows

the flip-flops to be reset by the next rising edge of CP. All

other state changes are also initiated by the LOW-to-HIGH

CP transition. Inputs can change when the clock is in either

state provided only that the recommended setup and hold

times, relative to the rising edge of CP, are observed.

A HIGH signal on either OE1orOE2 disables the TRI-

STATE buffers and puts the I/O pins in the high impedance

state. In this condition the shift, load, hold and reset opera-

tions can still occur. The TRI-STATE buffers are also dis-

abled by HIGH signals on both S0 and S1 in preparation for

a parallel load operation.

Mode Select Table

Inputs Response

SR S1 S0 CP

LXXLSynchronous Reset; Q0– Q7 eLOW

HHHLParallel Load; I/On

HLHLShift Right; DS0

Q0, Q0

Q1, etc.

HHLLShift Left; DS7

Q7, Q7

Q6, etc.

H H H X Hold

HeHIGH Voltage Level

LeLOW Voltage Level

XeImmaterial

Logic Symbol

TL/F/9829–2

VCC ePin 20

GND ePin 10

Logic Diagram

TL/F/9829–3

Physical Dimensions inches (millimeters)

20-Lead Ceramic Dual-In-Line Package (J)

Order Number DM54LS323J

NS Package Number J20A

20-Lead Wide Small Outline Molded Package (M)

Order Number DM74LS323WM

NS Package Number M20B

Physical Dimensions inches (millimeters) (Continued)

20-Lead Molded Dual-In-Line Package (N)

Order Number DM74LS323N

NS Package Number N20A

DM54LS323/DM74LS323 8-Bit Universal Shift/Storage Register

with Synchronous Reset and Common I/O Pins

Physical Dimensions inches (millimeters) (Continued)

20-Lead Ceramic Flat Package (W)

Order Number DM54LS323W

NS Package Number W20A

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failure to perform, when properly used in accordance support device or system, or to affect its safety or

with instructions for use provided in the labeling, can effectiveness.

be reasonably expected to result in a significant injury

to the user.

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