LM8261 LM8261 Single RRIO, High Output Current & Unlimited Cap Load Op Amp in SOT23-5 Literature Number: SNOS469H LM8261 Single RRIO, High Output Current & Unlimited Cap Load Op Amp in SOT23-5 General Description The LM8261 is offered in the space saving SOT23-5 package. The LM8261 is a Rail-to-Rail input and output Op Amp which can operate with a wide supply voltage range. This device has high output current drive, greater than Rail-to-Rail input common mode voltage range, unlimited capacitive load drive capability, and provides tested and guaranteed high speed and slew rate while requiring only 0.97mA supply current. It is specifically designed to handle the requirements of flat panel TFT panel VCOM driver applications as well as being suitable for other low power, and medium speed applications which require ease of use and enhanced performance over existing devices. Greater than Rail-to-Rail input common mode voltage range with 50dB of Common Mode Rejection, allows high side and low side sensing, among many applications, without having any concerns over exceeding the range and no compromise in accuracy. Exceptionally wide operating supply voltage range of 2.5V to 30V alleviates any concerns over functionality under extreme conditions and offers flexibility of use in multitude of applications. In addition, most device parameters are insensitive to power supply variations; this design enhancement is yet another step in simplifying its usage. The output stage has low distortion (0.05% THD+N) and can supply a respectable amount of current (15mA) with minimal headroom from either rail (300mV). Features Output Response with Heavy Capacitive Load (VS = 5V, TA = 25C, Typical values unless specified). 21MHz GBWP 2.5V to 30V Wide supply voltage range 12V/s Slew rate 0.97 mA Supply current Unlimited Cap load limit +53mA/-75mA Output short circuit current 400ns (500pF, 100mVPP step) 5% Settling time 0.3V beyond rails Input common mode voltage 15nV/ Input voltage noise 1pA/ Input current noise < 0.05% THD+N Applications TFT-LCD flat panel VCOM driver A/D converter buffer High side/low side sensing Headphone amplifier Connection Diagram SOT23-5 10108462 Top View 10108437 Ordering Information Package Ordering Info Pkg Marking LM8261M5 5-Pin SOT-23 Supplied As NSC Drawing 1K Units Tape and Reel LM8261M5 NOPB LM8261M5X A45A 3K Units Tape and Reel MF05A LM8261M5X NOPB (c) 2009 National Semiconductor Corporation 101084 www.national.com LM8261 Single RRIO, High Output Current & Unlimited Cap Load Op Amp in SOT23-5 September 11, 2009 LM8261 Junction Temperature (Note 4) Soldering Information: Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance Human Body Model Machine Model VIN Differential Output Short Circuit Duration Supply Voltage (V+ - V-) Voltage at Input/Output pins Storage Temperature Range +150C Infrared or Convection (20 sec.) 235C Wave Soldering (10 sec.) 260C Operating Ratings 2KV (Note 2) 200V(Note 9) +/-10V (Note 3, Note 11) 32V V+ +0.8V, V- -0.1V -65C to +150C Supply Voltage (V+ - V-) Temperature Range(Note 4) 2.5V to 30V -40C to +85C Package Thermal Resistance, JA,(Note 4) SOT23-5 325C/W 2.7V Electrical Characteristics (Note 13) Unless otherwise specified, all limits guaranteed for TA = 25C, V+ = 2.7V, V- = 0V, VCM = 0.5V, VO = V+/2, and RL > 1M to V-. Boldface limits apply at the temperature extremes. Symbol Parameter Condition Typ (Note 5) Limit (Note 6) Units VOS Input Offset Voltage VCM = 0.5V & VCM = 2.2V +/-0.7 +/-5 +/-7 mV max TC VOS Input Offset Average Drift VCM = 0.5V & VCM = 2.2V (Note 12) +/-2 - V/C IB Input Bias Current VCM = 0.5V (Note 7) -1.20 -2.00 -2.70 VCM = 2.2V (Note 7) +0.49 +1.00 +1.60 IOS Input Offset Current VCM = 0.5V & VCM = 2.2V 20 250 400 CMRR Common Mode Rejection Ratio VCM stepped from 0V to 1.0V 100 76 60 VCM stepped from 1.7V to 2.7V 100 VCM stepped from 0V to 2.7V 70 58 50 A max nA max dB min +PSRR Positive Power Supply Rejection Ratio V+ = 2.7V to 5V 104 78 74 dB min CMVR Input Common-Mode Voltage Range CMRR > 50dB -0.3 -0.1 0.0 V max 3.0 2.8 2.7 V min VO = 0.5 to 2.2V, RL = 10K to V- 78 70 67 dB min VO = 0.5 to 2.2V, RL = 2K to V- 73 67 63 dB min RL = 10K to V- 2.59 2.49 2.46 RL = 2K to V- 2.53 2.45 2.41 Output Swing Low RL = 10K to V- 90 100 120 mV max Output Short Circuit Current Sourcing to V- VID = 200mV (Note 10) 48 30 20 mA min Sinking to V+ VID = -200mV (Note 10) 65 50 30 mA min AVOL VO ISC Large Signal Voltage Gain Output Swing High www.national.com 2 V min Parameter Condition Typ (Note 5) Limit (Note 6) Units 0.95 1.20 1.50 mA max IS Supply Current No load, VCM = 0.5V SR Slew Rate (Note 8) AV = +1,VI = 2VPP 9 - V/s fu Unity Gain-Frequency VI = 10mV, RL = 2K to V+/2 10 - MHz GBWP Gain Bandwidth Product f = 50KHz 21 15.5 14 MHz min Phim Phase Margin VI = 10mV 50 - Deg en Input-Referred Voltage Noise f = 2KHz, RS = 50 15 - in Input-Referred Current Noise f = 2KHz fMAX Full Power Bandwidth 1 ZL = (20pF || 10K) to V+/2 nV/ pA/ - 1 MHz 5V Electrical Characteristics (Note 13) Unless otherwise specified, all limited guaranteed for TA = 25C, V+ = 5V, V- = 0V, VCM = 1V, VO = V+/2, and RL > 1M to V-. Boldface limits apply at the temperature extremes. Symbol Parameter Condition Typ (Note 5) Limit (Note 6) Units VOS Input Offset Voltage VCM = 1V & VCM = 4.5V +/-0.7 +/-5 +/- 7 mV max TC VOS Input Offset Average Drift VCM = 1V & VCM = 4.5V (Note 12) +/-2 - V/C IB Input Bias Current VCM = 1V (Note 7) -1.18 -2.00 -2.70 VCM = 4.5V (Note 7) +0.49 +1.00 +1.60 IOS Input Offset Current VCM = 1V & VCM = 4.5V 20 250 400 CMRR Common Mode Rejection Ratio VCM stepped from 0V to 3.3V 110 84 72 VCM stepped from 4V to 5V 100 - VCM stepped from 0V to 5V 80 64 61 A max nA max dB min +PSRR Positive Power Supply Rejection Ratio V+ = 2.7V to 5V, VCM = 0.5V 104 78 74 dB min CMVR Input Common-Mode Voltage Range CMRR > 50dB -0.3 -0.1 0.0 V max 5.3 5.1 5.0 V min VO = 0.5 to 4.5V, RL = 10K to V- 84 74 70 VO = 0.5 to 4.5V, RL = 2K to V- 80 70 66 RL = 10K to V- 4.87 4.75 4.72 RL = 2K to V- 4.81 4.70 4.66 RL = 10K to V- 86 125 135 AVOL VO Large Signal Voltage Gain Output Swing High Output Swing Low 3 dB min V min mV max www.national.com LM8261 Symbol LM8261 Symbol ISC Typ (Note 5) Limit (Note 6) Sourcing to V- VID = 200mV (Note 10) 53 35 20 Sinking to V+ VID = -200mV (Note 10) 75 60 50 Parameter Output Short Circuit Current Condition Units mA min IS Supply Current No load, VCM = 1V 0.97 1.25 1.75 mA max SR Slew Rate (Note 8) AV = +1, VI = 5VPP 12 10 7 V/s min fu Unity Gain Frequency VI = 10mV, 10.5 - MHz RL = 2K to V+/2 GBWP Gain-Bandwidth Product f = 50KHz 21 16 15 MHz min Phim Phase Margin VI = 10mV 53 - Deg en Input-Referred Voltage Noise f = 2KHz, RS = 50 15 - nV/ in Input-Referred Current Noise f = 2KHz 1 - pA/ fMAX Full Power Bandwidth ZL = (20pF || 10k) to V+/2 900 - KHz tS Settling Time (5%) 100mVPP Step, 500pF load 400 - ns THD+N Total Harmonic Distortion + Noise 0.05 - % Typ (Note 5) Limit (Note 6) Units V+/2 RL = 1K to f = 10KHz to AV= +2, 4VPP swing 15V Electrical Characteristics (Note 13) Unless otherwise specified, all limited guaranteed for TA = 25C, V+ = 15V, V- = -15V, VCM = 0V, VO = 0V, and RL > 1M to 0V. Boldface limits apply at the temperature extremes. Symbol Parameter Condition VOS Input Offset Voltage VCM = -14.5V & VCM = 14.5V +/-0.7 +/-7 +/- 9 mV max TC VOS Input Offset Average Drift VCM = -14.5V & VCM = 14.5V (Note 12) +/-2 - V/C IB Input Bias Current VCM = -14.5V (Note 7) -1.05 -2.00 -2.80 VCM = 14.5V (Note 7) +0.49 +1.00 +1.50 A max IOS Input Offset Current VCM = -14.5V & VCM = 14.5V 30 275 550 CMRR Common Mode Rejection Ratio VCM stepped from -15V to 13V 100 84 80 VCM stepped from 14V to 15V 100 - VCM stepped from -15V to 15V 88 74 72 V+ = 12V to 15V 100 70 66 dB min 100 70 66 dB min -15.3 -15.1 -15.0 V max 15.3 15.1 15.0 V min +PSRR Positive Power Supply Rejection Ratio -PSRR Negative Power Supply Rejection Ratio V- = -12V to -15V CMVR Input Common-Mode Voltage Range www.national.com CMRR > 50dB 4 nA max dB min AVOL Typ (Note 5) Limit (Note 6) 85 78 74 79 72 66 RL = 10K 14.83 14.65 14.61 RL = 2K 14.73 14.60 14.55 RL = 10K -14.91 -14.75 -14.65 RL = 2K -14.83 -14.65 -14.60 Sourcing to ground VID = 200mV (Note 10) 60 40 25 Sinking to ground VID = 200mV (Note 10) 100 70 60 Parameter Large Signal Voltage Gain Condition VO = 0V to 13V, RL = 10K VO = 0V to 13V, RL = 2K VO Output Swing High Output Swing Low ISC Output Short Circuit Current Units dB min V min V max mA min IS Supply Current No load, VCM = 0V 1.30 1.50 1.90 mA max SR Slew Rate (Note 8) AV = +1, VI = 24VPP 15 10 8 V/s min fu Unity Gain Frequency VI = 10mV, RL = 2K 14 - MHz GBWP Gain-Bandwidth Product f = 50KHz 24 18 16 MHz min Phim Phase Margin VI = 10mV 58 - Deg en Input-Referred Voltage Noise f = 2KHz, RS = 50 15 - nV/ in Input-Referred Current Noise f = 2KHz 1 - pA/ fMAX Full Power Bandwidth ZL = 20pF || 10K 160 - ts Settling Time (1%, AV = +1) Positive Step, 5VPP 320 - Negative Step, 5VPP 600 - RL = 1K, f = 10KHz, AV = +2, 28VPP swing 0.01 - THD+N Total Harmonic Distortion +Noise KHz ns % Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Rating indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human Body Model is 1.5k in series with 100pF. Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Note 4: The maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ JA. All numbers apply for packages soldered directly onto a PC board. Note 5: Typical Values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: Positive current corresponds to current flowing into the device. Note 8: Slew rate is the slower of the rising and falling slew rates. Connected as a Voltage Follower. Note 9: Machine Model, 0 is series with 200pF. Note 10: Short circuit test is a momentary test. See Note 11. Note 11: Output short circuit duration is infinite for VS 6V at room temperature and below. For VS > 6V, allowable short circuit duration is 1.5ms. Note 12: Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change. Note 13: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA. 5 www.national.com LM8261 Symbol LM8261 Typical Performance Characteristics TA = 25C, Unless Otherwise Noted VOS vs. VCM for 3 Representative Units VOS vs. VCM for 3 Representative Units 10108430 10108429 VOS vs. VCM for 3 Representative Units VOS vs. VS for 3 Representative Units 10108431 10108434 VOS vs. VS for 3 Representative Units VOS vs. VS for 3 Representative Units 10108433 10108435 www.national.com 6 LM8261 IB vs. VCM IB vs. VS 10108424 10108436 IS vs. VCM IS vs. VCM 10108427 10108428 IS vs. VCM IS vs. VS (PNP side) 10108468 10108425 7 www.national.com LM8261 IS vs. VS (NPN side) Gain/Phase vs. Frequency 10108426 10108418 Unity Gain Frequency vs. VS Phase Margin vs. VS 10108407 10108408 Unity Gain Freq. and Phase Margin vs. VS Unity Gain Frequency vs. Load 10108404 www.national.com 10108405 8 LM8261 Phase Margin vs. Load Unity Gain Freq. and Phase Margin vs. CL 10108409 10108406 CMRR vs. Frequency +PSRR vs. Frequency 10108414 10108416 -PSRR vs. Frequency Output Voltage vs. Output Sourcing Current 10108417 10108446 9 www.national.com LM8261 Output Voltage vs. Output Sourcing Current Output Voltage vs. Output Sinking Current 10108444 10108445 Max Output Swing vs. Load Max Output Swing vs. Frequency 10108411 10108410 % Overshoot vs. Cap Load 5% Settling Time vs. Cap Load 10108448 www.national.com 10108447 10 LM8261 +SR vs. Cap Load -SR vs. Cap Load 10108451 10108452 +SR vs. Cap Load -SR vs. Cap Load 10108449 10108450 Settling Time vs. Error Voltage Settling Time vs. Error Voltage 10108442 10108443 11 www.national.com LM8261 Input Noise Voltage/Current vs. Frequency Input Noise Voltage for Various VCM 10108415 10108413 Input Noise Current for Various VCM Input Noise Voltage vs. VCM 10108455 10108412 Input Noise Current vs. VCM THD+N vs. Frequency 10108423 10108454 www.national.com 12 LM8261 THD+N vs. Frequency THD+N vs. Frequency 10108422 10108421 THD+N vs. Amplitude THD+N vs. Amplitude 10108419 10108420 Small Signal Step Response Large Signal Step Response 10108438 13 10108440 www.national.com LM8261 Application Hints BLOCK DIAGRAM AND OPERATIONAL DESCRIPTION A) Input Stage 10108467 FIGURE 1. Simplified Schematic Diagram As can be seen from the simplified schematic in Figure 1, the input stage consists of two distinct differential pairs (Q1-Q2 and Q3-Q4) in order to accommodate the full Rail-to-Rail input common mode voltage range. The voltage drop across R5, R6, R7, and R8 is kept to less than 200mV in order to allow the input to exceed the supply rails. Q13 acts as a switch to steer current away from Q3-Q4 and into Q1-Q2, as the input increases beyond 1.4V of V+. This in turn shifts the signal path from the bottom stage differential pair to the top one and causes a subsequent increase in the supply current. In transitioning from one stage to another, certain input stage parameters (VOS, Ib, IOS, en, and in) are determined based on which differential pair is "on" at the time. Input Bias current, IB, will change in value and polarity as the input crosses the transition region. In addition, parameters such as PSRR and CMRR which involve the input offset voltage will also be effected by changes in VCM across the differential pair transition region. The input stage is protected with the combination of R9-R10 and D1, D2, D3, and D4 against differential input over-volt- www.national.com ages. This fault condition could otherwise harm the differential pairs or cause offset voltage shift in case of prolonged over voltage. As shown in Figure 2, if this voltage reaches approximately 1.4V at 25C, the diodes turn on and current flow is limited by the internal series resistors (R9 and R10). The Absolute Maximum Rating of 10V differential on VIN still needs to be observed. With temperature variation, the point were the diodes turn on will change at the rate of 5mV/C. 14 10108466 FIGURE 2. Input Stage Current vs. Differential Input Voltage B) Output Stage The output stage Figure 1 is comprised of complementary NPN and PNP common-emitter stages to permit voltage swing to within a VCE(SAT) of either supply rail. Q9 supplies the sourcing and Q10 supplies the sinking current load. Output current limiting is achieved by limiting the VCE of Q9 and Q10; using this approach to current limiting, alleviates the draw back to the conventional scheme which requires one VBE reduction in output swing. The frequency compensation circuit includes Miller capacitors from collector to base of each output transistor (see Figure 1, Ccomp9 and Ccomp10). At light capacitive loads, the high frequency gain of the output transistors is high, and the Miller effect increases the effective value of the capacitors thereby stabilizing the Op Amp. Large capacitive loads greatly decrease the high frequency gain of the output transistors thus lowering the effective internal Miller capacitance - the internal pole frequency increases at the same time a low frequency pole is created at the Op Amp output due to the large load capacitor. In this fashion, the internal dominant pole compensation, which works by reducing the loop gain to less than 0dB when the phase shift around the feedback loop is more than 180C, varies with the amount of capacitive load and becomes less dominant when the load capacitor has increased enough. Hence the Op Amp is very stable even at high values of load capacitance resulting in the uncharacteristic feature of stability under all capacitive loads. 10108457 FIGURE 3. Output Short Circuit Sourcing Current vs. Input Overdrive DRIVING CAPACITIVE LOADS The LM8261 is specifically designed to drive unlimited capacitive loads without oscillations (See Settling Time and Percent Overshoot vs. Cap Load plots in the typical performance characteristics section). In addition, the output current handling capability of the device allows for good slewing characteristics even with large capacitive loads (see Slew Rate vs. Cap Load plots). The combination of these features is ideal for applications such as TFT flat panel buffers, A/D converter input amplifiers, etc. However, as in most Op Amps, addition of a series isolation resistor between the Op Amp and the capacitive load improves the settling and overshoot performance. Output current drive is an important parameter when driving capacitive loads. This parameter will determine how fast the output voltage can change. Referring to the Slew Rate vs. Cap Load Plots (typical performance characteristics section), two distinct regions can be identified. Below about 10,000pF, 10108456 FIGURE 4. Output Short Circuit Sinking Current vs. Input Overdrive Figure 5 shows the output voltage, output current, and the resulting input overdrive with the device set for AV = +1 and the input tied to a 1VPP step function driving a 47nF capacitor. As can be seen, during the output transition, the input over15 www.national.com LM8261 the output Slew Rate is solely determined by the Op Amp's compensation capacitor value and available current into that capacitor. Beyond 10nF, the Slew Rate is determined by the Op Amp's available output current. Note that because of the lower output sourcing current compared to the sinking one, the Slew Rate limit under heavy capacitive loading is determined by the positive transitions. An estimate of positive and negative slew rates for loads larger than 100nF can be made by dividing the short circuit current value by the capacitor. For the LM8261, the available output current increases with the input overdrive. Referring to Figure 3 and Figure 4, Output Short Circuit Current vs. Input Overdrive, it can be seen that both sourcing and sinking short circuit current increase as input overdrive increases. In a closed loop amplifier configuration, during transient conditions while the fed back output has not quite caught up with the input, there will be an overdrive imposed on the input allowing more output current than would normally be available under steady state condition. Because of this feature, the Op Amp's output stage quiescent current can be kept to a minimum, thereby reducing power consumption, while enabling the device to deliver large output current when the need arises (such as during transients). LM8261 drive reaches 1V peak and is more than enough to cause the output current to increase to its maximum value (see Figure 3 and Figure 4 plots). Note that because of the larger output sinking current compared to the sourcing one, the output negative transition is faster than the positive one. 10108459 FIGURE 7. Output Sinking Characteristics with Load Lines 10108439 FIGURE 5. Buffer Amplifier scope photo ESTIMATING THE OUTPUT VOLTAGE SWING It is important to keep in mind that the steady state output current will be less than the current available when there is an input overdrive present. For steady state conditions, the Output Voltage vs. Output Current plot (Typical Performance Characteristics section) can be used to predict the output swing. Figure 6 and Figure 7 show this performance along with several load lines corresponding to loads tied between the output and ground. In each cases, the intersection of the device plot at the appropriate temperature with the load line would be the typical output swing possible for that load. For example, a 1K load can accommodate an output swing to within 250mV of V- and to 330mV of V+ (VS = 15V) corresponding to a typical 29.3VPP unclipped swing. 10108460 FIGURE 6. Output Sourcing Characteristics with Load Lines www.national.com 16 LM8261 TFT APPLICATIONS Figure 8 below, shows a typical application where the LM8261 is used as a buffer amplifier for the VCOM signal employed in a TFT LCD flat panel: 10108461 FIGURE 8. VCOM Driver Application Schematic Figure 9 shows the time domain response of the amplifier when used as a VCOM buffer/driver with VREF at ground. In this application, the Op Amp loop will try and maintain its output voltage based on the voltage on its non-inverting input (VREF) despite the current injected into the TFT simulated load. As long as this load current is within the range tolerable by the LM8261 (45mA sourcing and 65mA sinking for 5V supplies), the output will settle to its final value within less than 2s. offset, or the output AC average current is non-zero, or if the Op Amp operates in a single supply application where the output is maintained somewhere in the range of linear operation. Therefore: PTOTAL = PQ + PDC + PAC PQ = IS * VS Op Amp Quiescent Power Dissipation DC Load Power PDC = IO * (VR - VO) PAC = See Table 1 below AC Load Power where: IS: Supply Current VS: Total Supply Voltage (V+ - V-) IO: Average load current VO: Average Output Voltage VR: V+ for sourcing and V- for sinking current Table 1 below shows the maximum AC component of the load power dissipated by the Op Amp for standard Sinusoidal, Triangular, and Square Waveforms: TABLE 1. Normalized AC Power Dissipated in the Output Stage for Standard Waveforms 10108465 PAC (W./V2) FIGURE 9. VCOM driver performance scope photo OUTPUT SHORT CIRCUIT CURRENT AND DISSIPATION ISSUES The LM8261 output stage is designed for maximum output current capability. Even though momentary output shorts to ground and either supply can be tolerated at all operating voltages, longer lasting short conditions can cause the junction temperature to rise beyond the absolute maximum rating of the device, especially at higher supply voltage conditions. Below supply voltage of 6V, output short circuit condition can be tolerated indefinitely. With the Op Amp tied to a load, the device power dissipation consists of the quiescent power due to the supply current flow into the device, in addition to power dissipation due to the load current. The load portion of the power itself could include an average value (due to a DC load current) and an AC component. DC load current would flow if there is an output voltage Sinusoidal Triangular Square 50.7 x 10-3 46.9 x 10-3 62.5 x 10-3 The table entries are normalized to VS2/ RL. To figure out the AC load current component of power dissipation, simply multiply the table entry corresponding to the output waveform by the factor VS2/ RL. For example, with 15V supplies, a 600 load, and triangular waveform power dissipation in the output stage is calculated as: PAC= (46.9 x 10-3) * [302/600]= 70.4mW Other Application Hints The use of supply decoupling is mandatory in most applications. As with most relatively high speed/high output current Op Amps, best results are achieved when each supply line is decoupled with two capacitors; a small value ceramic capacitor (0.01F) placed very close to the supply lead in addition to a large value Tantalum or Aluminum (> 4.7F). The large 17 www.national.com LM8261 * * capacitor can be shared by more than one device if necessary. The small ceramic capacitor maintains low supply impedance at high frequencies while the large capacitor will act as the charge "bucket" for fast load current spikes at the Op Amp output. The combination of these capacitors will provide supply decoupling and will help keep the Op Amp oscillation free under any load. * * LM8261 ADVANTAGES Compared to other Rail-to-Rail Input/Output devices, the LM8261 offers several advantages such as: www.national.com * 18 Improved cross over distortion. Nearly constant supply current throughout the output voltage swing range and close to either rail. Consistent stability performance for all input/output voltage and current conditions. Nearly constant Unity gain frequency (fu) and Phase Margin (Phim) for all operating supplies and load conditions. No output phase reversal under input overload condition. LM8261 Physical Dimensions inches (millimeters) unless otherwise noted 5-Pin SOT23-5 NS Package Number MF05A 19 www.national.com LM8261 Single RRIO, High Output Current & Unlimited Cap Load Op Amp in SOT23-5 Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH(R) Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage Reference www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Solutions www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise(R) Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagicTM www.national.com/solarmagic Wireless (PLL/VCO) www.national.com/wireless www.national.com/training PowerWise(R) Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION ("NATIONAL") PRODUCTS. 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