DEMO MANUAL DC2395A LTC2325/LTC2324/LTC2320 Quad/Octal 16-Bit/14-Bit/12-Bit, 5Msps/2Msps/1.5Msps, Serial, High Speed SAR ADCs Description Demonstration circuit 2395A features the LTC(R)2325/ LTC2324/LTC2320 family. With up to 5Msps, these differential, multiple channel, 16-bit, serial, high speed successive approximation register (SAR) ADCs are available in a 52-lead QFN package. Each ADC has an internal 20ppm/C maximum drift reference and an SPI-compatible serial interface that supports CMOS and LVDS logic. Note the demo board is configured for CMOS operation by default; see the note under JP8 for LVDS operation. The following text refers to the LTC2325, but applies to all members of the family, the only difference being the number of channels, the sample rate and/or the number of bits. The DC2395A demonstrates the DC and AC performance of the LTC2325 in conjunction with the DC890 PScopeTM data collection board. Alternatively, by connecting the DC2395A into a customer application, the performance of the LTC2325 can be evaluated directly in that circuit. Design files for this circuit board are available at http://www.linear.com/demo/DC2395A L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and PScope is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Assembly Options Table 1. DC2395A Assembly Options VERSION U1 PART NUMBER MAX CONVERSION RATE # OF BITS MAX CLOCK FREQUENCY DC2395A-A LTC2320CUKG-16#PBF 1.5Msps 16 52.5MHz DC2395A-B LTC2324CUKG-16#PBF 2Msps 16 110MHz DC2395A-C LTC2325CUKG-16#PBF 5Msps 16 110MHz DC2395A-D LTC2320CUKG-14#PBF 1.5Msps 14 52.5MHz DC2395A-E LTC2324CUKG-14#PBF 2Msps 14 110MHz DC2395A-F LTC2325CUKG-14#PBF 5Msps 14 110MHz DC2395A-G LTC2320CUKG-12#PBF 1.5Msps 12 52.5MHz DC2395A-H LTC2324CUKG-12#PBF 2Msps 12 110MHz DC2395A-I LTC2325CUKG-12#PBF 5Msps 12 110MHz dc2395af 1 DEMO MANUAL DC2395A Board Photo 7V DC POWER SUPPLY -7V DC POWER SUPPLY TO DC890B SIGNAL GENERATOR CLOCK SIGNAL FROM GENERATOR Figure 1. DC2395A Connection Diagram dc2395af 2 DEMO MANUAL DC2395A Quick Start Procedure Demonstration circuit 2395A is easy to set up and evaluate for performance. Refer to Figure 1 and follow the procedure below. n n n n n www.linear.com/software. Complete software documentation is available from the Help menu. Updates can be downloaded from the Tools menu. Check for updates periodically, as new features may be added. The PScope software should recognize the DC2395A and configure itself automatically. Connect the DC2395A to a DC890 USB high speed data collection board using edge connector P1. Connect the DC890 to a host PC with a standard USB A/B cable. n Apply a low jitter signal source to J11 to test channel 1. Note that the DC2395A is capable of accepting a differential input signal as well as a single-ended signal. See the Hardware Setup section for the jumper positions that correspond to these configurations. Drive Options Click the Collect button (Figure 2) to begin acquiring data. The Collect button then changes to Pause, which can be used to stop data acquisition. There are several ways to drive the LTC2325 on the DC2395A. It can be driven with a true differential source, or a single-ended source in either pseudo-differential bipolar or unipolar mode. For details on how to configure the DC2395A for any of these see Table 2. As a clock source, apply a low jitter 10dBm sine wave or square wave to connector J9. See Table 1 for maximum clock frequencies. Note that J9 has a 50 termination resistor to ground. An example input circuit for channel 1 is shown in Figure 3. Run the PScope software (Pscope.exe version K73, or later) supplied with the DC890 or download it from Table 2. Resistor Values for Different Input Configurations R32, 52, 72, 104, 146, 179, 202, 222 R17, 37, 57, 88, 125, 163, 187, 207 R15, 35, 55, 75, 122, 159, 185, 205 Differential 0 DNI DNI 0 DNI Single-Ended Differential ADC Drive 0 DNI 301 301 DNI Single-Ended Bipolar ADC Drive 0 DNI DNI 0 0 Unipolar ADC Drive DNI 0 301 301 0 INPUT CONFIGURATION R16, 36, 56, 76, R24, 44, 64, 100, 123, 160, 186, 206 143, 173, 194, 214 *DNI = Do not install dc2395af 3 DEMO MANUAL DC2395A Quick Start Procedure Figure 2. DC2395A PScope Screenshot dc2395af 4 BNC J11B 2 REF_OUT1 VCM_BIAS1 5 6 C128 DNI R217 0 C207 10uF C127 DNI J11A 1 DNI R221 BNC R219 0 R220 1K R218 DNI C206 10uF C129 10uF C124 DNI R203 0 - + -6V 0 R215 6 5 8 4 C123 10uF R222 0 R204 DNI R210 150 C125 DNI R214 1K R212 DNI R207 DNI C204 0.1uF 7 LT1819CMS8 U21B C2080.1uF R211 0 R205 301 R206 301 8 3 4 + 2 3 C203 DNI 4 - +6V 1 U21A LT1819CMS8 R208 49.9 C126 220pF R213 49.9 R209 DNI R216 DNI AIN1- AIN1+ DEMO MANUAL DC2395A Quick Start Procedure Figure 3. Example Input Circuit, Single-Ended Differential ADC Drive dc2395af 5 DEMO MANUAL DC2395A Hardware Setup SIGNAL Connections J2 FPGA Program: Factory use only. J4 JTAG: Factory use only. J11 Ch1 Input: In the single-ended configuration, use the upper BNC connector as the signal input. For differential operation, use the upper BNC as the Ch1+ input, and the lower BNC as the Ch1- input. J10 Ch2 Input: In the single-ended configuration, use the upper BNC connector as the signal input. For differential operation, use the upper BNC as the Ch2+ input, and the lower BNC as the Ch2- input. J8 Ch3 Input: In the single-ended configuration, use the upper BNC connector as the signal input. For differential operation, use the upper BNC as the Ch3+ input, and the lower BNC as the Ch3- input. J7 Ch4 Input: In the single-ended configuration, use the upper BNC connector as the signal input. For differential operation, use the upper BNC as the Ch4+ input, and the lower BNC as the Ch4- input. J6 Ch5 Input: In the single-ended configuration, use the upper BNC connector as the signal input. For differential operation, use the upper BNC as the Ch5+ input, and the lower BNC as the Ch5- input. J5 Ch6 Input: In the single-ended configuration, use the upper BNC connector as the signal input. For differential operation, use the upper BNC as the Ch6+ input, and the lower BNC as the Ch6- input. J3 Ch7 Input: In the single-ended configuration, use the upper BNC connector as the signal input. For differential operation, use the upper BNC as the Ch7+ input, and the lower BNC as the Ch7- input. J1 Ch8 Input: In the single-ended configuration, use the upper BNC connector as the signal input. For differential operation, use the upper BNC as the Ch8+ input, and the lower BNC as the Ch8- input. J9 CLK: This input has a 50 termination resistor, and is intended to be driven by a low jitter 10dBm sine or square wave. To achieve the full AC performance of this part, the clock jitter should be kept under 2ps. This input is capacitively coupled so that the input clock can be either 0V to 2.5V or 1.25V. This eliminates the need for level shifting. To run at the maximum conversion rate, apply the frequency specified in the Table 1. JP1 VCCIO: Use this jumper to select the VCCIO supply voltage. The default setting is 2.5V. The 1.8V setting selects a 1.8V supply voltage. JP2 VDD: Use this jumper to select the VDD supply voltage. The default setting is 5V. The 3.3V setting selects a 3.3V supply voltage. JP5 REF INT: Set for INT when using the internal reference. Set for EXT to disable the internal REFOUT1-4 buffers for use with external voltage references. JP11 REF1: Set for ONB to use onboard voltage reference. Set for EXT to use external reference applied at E14. JP10 REF2: Set for ONB to use onboard voltage reference. Set for EXT to use external reference applied at E13. JP4 REF3: Set for ONB to use onboard voltage reference. Set for EXT to use external reference applied at E12. JP3 REF4: Set for ONB to use onboard voltage reference. Set for EXT to use external reference applied at E11. dc2395af 6 DEMO MANUAL DC2395A Hardware Setup JP8 SDR/DDR: Set for SDR for single data rate operation. Set for DDR for double data rate operation. JP6 CMOS/LVDS: Use this jumper to select the data output format from the LTC2325. The default setting is CMOS. The output data will not be valid if the jumper is moved to the LVDS position unless the following changes have been made: JP7 EEPROM: Factory use only. JP9 OSC: Use this jumper to enable the onboard encode clock source. The default setting is OFF. The ON setting energizes this source. Refer to the DC2395A schematic for additional passive elements required to use the onboard source. Install 100 S0402 resistors at R113, 114, 117, 118, 124, 239 Reprogram the CPLD through J2 using the programming file LTC2325_lvds.pof found at: http://www.linear.com/demo/DC2395A Move JP6 to the LVDS position. dc2395af Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7 DEMO MANUAL DC2395A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright (c) 2004, Linear Technology Corporation dc2395af 8 Linear Technology Corporation LT 0916 * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 2016