MCP6541/1R/1U/2/3/4 Push-Pull Output Sub-Microamp Comparators Features: Description: * * * * The Microchip Technology Inc. MCP6541/1R/1U/2/3/4 family of comparators is offered in single (MCP6541, MCP6541R, MCP6541U), single with Chip Select (CS) (MCP6543), dual (MCP6542) and quad (MCP6544) configurations. The outputs are push-pull (CMOS/TTLcompatible) and are capable of driving heavy DC or capacitive loads. * * * * * * * Low Quiescent Current: 600 nA/Comparator (typ.) Rail-to-Rail Input: VSS - 0.3V to VDD + 0.3V CMOS/TTL-Compatible Output Propagation Delay: 4 s (typical, 100 mV Overdrive) Wide Supply Voltage Range: 1.6V to 5.5V Available in Single, Dual and Quad Single Available in SOT-23-5, SC-70-5 * Packages Chip Select (CS) with MCP6543 Low Switching Current Internal Hysteresis: 3.3 mV (typ.) Temperature Ranges: - Industrial: -40C to +85C - Extended: -40C to +125C Typical Applications: * * * * * * * * Laptop Computers Mobile Phones Metering Systems Hand-held Electronics RC Timers Alarm and Monitoring Circuits Windowed Comparators Multivibrators These comparators are optimized for low-power, single-supply operation with greater than rail-to-rail input operation. The push-pull output of the MCP6541/1R/1U/2/3/4 family supports rail-to-rail output swing and interfaces with TTL/CMOS logic. The internal input hysteresis eliminates output switching due to internal input noise voltage, reducing current draw. The output limits supply current surges and dynamic power consumption while switching. This product family operates with a single-supply voltage as low as 1.6V and draws less than 1 A/comparator of quiescent current. The related MCP6546/7/8/9 family of comparators from Microchip has an open-drain output. Used with a pullup resistor, these devices can be used as level-shifters for any desired voltage up to 10V and in wired-OR logic. * SC-70-5 E-Temp parts not available at this release of the data sheet. MCP6541U SOT-23-5 is E-Temp only. Related Devices: * Open-Drain Output: MCP6546/7/8/9 Package Types MCP6541 PDIP, SOIC, MSOP 7 VDD OUT 1 VDD 2 6 OUT VIN+ 3 5 NC 5 VDD OUT 1 - VIN+ 3 + VSS 2 4 VIN- MCP6541U SC-70-5, SOT-23-5 VIN+ 1 VSS 2 VIN- 3 (c) 2002-2011 Microchip Technology Inc. 5 VDD 4 OUT 8 VDD OUTA 1 + - 6 VINB- 5 VINB+ MCP6543 PDIP, SOIC, MSOP NC 1 VIN+ 3 VSS 4 + MCP6544 PDIP, SOIC, TSSOP 7 OUTB - + VINA+ 3 VSS 4 VIN- 2 - MCP6541 SC-70-5, SOT-23-5 MCP6542 PDIP, SOIC, MSOP VINA- 2 4 VIN- + VINA+ 3 VSS 4 + 5 VSS + VIN- 2 8 NC - NC 1 MCP6541R SOT-23-5 8 CS 7 VDD OUTA 1 VINA- 2 - + + VINA+ 3 VDD 4 14 OUTD 13 VIND- 12 VIND+ 11 VSS 10 VINC+ VINB+ 5 VINB- 6 - + + - 9 VINCOUTB 7 8 OUTC 6 OUT 5 NC DS21696H-page 1 MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 2 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 1.0 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings VDD - VSS .........................................................................7.0V Current at Analog Input Pin (VIN+, VIN-.........................2 mA See Section 4.1.2 "Input Voltage and Current Limits" Analog Input (VIN) ...................... VSS - 1.0V to VDD + 1.0V All other Inputs and Outputs........... VSS - 0.3V to VDD + 0.3V Difference Input Voltage ....................................... |VDD - VSS| Output Short-Circuit Current ................................ Continuous Current at Input Pins ....................................................2 mA Current at Output and Supply Pins ............................30 mA Storage Temperature ....................................-65C to +150C Maximum Junction Temperature (TJ) .......................... +150C ESD Protection on all Pins (HBM;MM) ..................4 kV; 400V DC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C,VIN+ = VDD/2, VIN- = VSS, and RL = 100 k to VDD/2 (Refer to Figure 1-3). Parameters Sym Min Typ Max VDD IQ Units 1.6 -- 5.5 V 0.3 0.6 1.0 A Conditions Power Supply Supply Voltage Quiescent Current per comparator IOUT = 0 Input Input Voltage Range VCMR VSS-0.3 -- VDD+0.3 V Common Mode Rejection Ratio CMRR 55 70 -- dB VDD = 5V, VCM = -0.3V to 5.3V Common Mode Rejection Ratio CMRR 50 65 -- dB VDD = 5V, VCM = 2.5V to 5.3V Common Mode Rejection Ratio CMRR 55 70 -- dB VDD = 5V, VCM = -0.3V to 2.5V Power Supply Rejection Ratio PSRR 63 80 -- dB VCM = VSS VOS -7.0 1.5 +7.0 mV VOS/TA -- 3 -- V/C VCM = VSS (Note 1) TA = -40C to +125C, VCM = VSS Input Offset Voltage Drift with Temperature Input Hysteresis Voltage VHYST 1.5 3.3 6.5 mV Linear Temp. Co. (Note 2) TC1 -- 6.7 -- V/C Quadratic Temp. Co. (Note 2) TC2 -- -0.035 -- V/C2 TA = -40C to +125C, VCM = VSS IB -- 1 -- At Temperature (I-Temp parts) IB -- 25 100 pA TA = +85C, VCM = VSS (Note 3) At Temperature (E-Temp parts) IB -- 1200 5000 pA TA = +125C, VCM = VSS (Note 3) Input Offset Current IOS -- 1 -- pA VCM = VSS Common Mode Input Impedance ZCM -- 1013||4 -- ||pF Differential Input Impedance ZDIFF -- 1013||2 -- ||pF Input Bias Current Note 1: 2: 3: 4: pA VCM = VSS (Note 1) TA = -40C to +125C, VCM = VSS VCM = VSS The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. VHYST at different temperatures is estimated using VHYST (TA) = VHYST + (TA - 25C) TC1 + (TA - 25C)2 TC2. Input bias current at temperature is not tested for SC-70-5 package. Limit the output current to Absolute Maximum Rating of 30 mA. (c) 2002-2011 Microchip Technology Inc. DS21696H-page 3 MCP6541/1R/1U/2/3/4 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C,VIN+ = VDD/2, VIN- = VSS, and RL = 100 k to VDD/2 (Refer to Figure 1-3). Parameters Sym Min Typ Max Units Conditions High-Level Output Voltage VOH VDD-0.2 -- -- V Low-Level Output Voltage VOL -- -- VSS+0.2 V ISC -- -2.5, +1.5 -- mA VDD = 1.6V (Note 4) ISC -- 30 -- mA VDD = 5.5V (Note 4) Push-Pull Output Short-Circuit Current Note 1: 2: 3: 4: IOUT = -2 mA, VDD = 5V IOUT = 2 mA, VDD = 5V The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. VHYST at different temperatures is estimated using VHYST (TA) = VHYST + (TA - 25C) TC1 + (TA - 25C)2 TC2. Input bias current at temperature is not tested for SC-70-5 package. Limit the output current to Absolute Maximum Rating of 30 mA. AC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, Step = 200 mV, Overdrive = 100 mV, and CL = 36 pF (Refer to Figure 1-2 and Figure 1-3). Parameters Sym Min Typ Max Units Rise Time tR -- 0.85 -- s Fall Time tF -- 0.85 -- s Propagation Delay (High-to-Low) tPHL -- 4 8 s Propagation Delay (Low-to-High) tPLH -- 4 8 s Propagation Delay Skew tPDS -- 0.2 -- s Maximum Toggle Frequency fMAX -- 160 -- kHz VDD = 1.6V fMAX -- 120 -- kHz VDD = 5.5V Eni -- 200 -- Input Noise Voltage Note 1: Conditions (Note 1) VP-P 10 Hz to 100 kHz Propagation Delay Skew is defined as: tPDS = tPLH - tPHL. DS21696H-page 4 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 MCP6543 CHIP SELECT (CS) CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = VSS, and CL= 36 pF (Refer to Figures 1-1 and 1-3). Parameters Sym Min Typ Max Units CS Logic Threshold, Low VIL VSS -- 0.2 VDD V CS Input Current, Low ICSL -- 5.0 -- pA VIH 0.8 VD -- VDD V Conditions CS Low Specifications CS = VSS CS High Specifications CS Logic Threshold, High D CS Input Current, High ICSH -- 1 -- pA CS = VDD CS Input High, VDD Current IDD -- 18 -- pA CS = VDD CS Input High, GND Current ISS -- -20 -- pA CS = VDD Comparator Output Leakage IO(LEAK) -- 1 -- pA VOUT = VDD, CS = VDD CS Low to Comparator Output Low Turn-on Time tON -- 2 50 ms CS = 0.2 VDD to VOUT = VDD/2, VIN- = VDD CS High to Comparator Output High Z Turn-off Time tOFF -- 10 -- s CS = 0.8 VDD to VOUT = VDD/2, VIN- = VDD VCS_HYS -- 0.6 -- V VDD = 5V CS Dynamic Specifications CS Hysteresis T CS VIL VIH tON VOUT ISS ICS tOFF 100 mV VIN+ = VDD/2 Hi-Z Hi-Z -20 pA (typ.) VIN- -0.6 A (typ.) 1 pA (typ.) FIGURE 1-1: Timing Diagram for the CS Pin on the MCP6543. (c) 2002-2011 Microchip Technology Inc. tPLH -20 pA (typ.) 1 pA (typ.) 100 mV VOUT VOL FIGURE 1-2: Diagram. tPHL VOH VOL Propagation Delay Timing DS21696H-page 5 MCP6541/1R/1U/2/3/4 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V and VSS = GND. Parameters Sym Min Typ Max Units Specified Temperature Range TA -40 -- +85 C Operating Temperature Range TA -40 -- +125 C Storage Temperature Range TA -65 -- +150 C Conditions Temperature Ranges Note Thermal Package Resistances Thermal Resistance, 5L-SC-70 JA -- 331 -- C/W Thermal Resistance, 5L-SOT-23 JA -- 220.7 -- C/W Thermal Resistance, 8L-PDIP JA -- 89.3 -- C/W Thermal Resistance, 8L-SOIC JA -- 149.5 -- C/W Thermal Resistance, 8L-MSOP JA -- 211 -- C/W Thermal Resistance, 14L-PDIP JA -- 70 -- C/W Thermal Resistance, 14L-SOIC JA -- 95.3 -- C/W Thermal Resistance, 14L-TSSOP JA -- 100 -- C/W Note: 1.1 The MCP6541/1R/1U/2/3/4 I-Temp parts operate over this extended temperature range, but with reduced performance. In any case, the Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150C. Test Circuit Configuration This test circuit configuration is used to determine the AC and DC specifications. VDD 200 k MCP654X 200 k 200 k VIN = VSS 200 k VOUT 36 pF VSS = 0V FIGURE 1-3: AC and DC Test Circuit for the Push-Pull Output Comparators. DS21696H-page 6 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD /2, VIN - = GND, RL = 100 k to VDD /2, and CL = 36 pF. 18% 1200 Samples VCM = VSS 12% Percentage of Occurrences 10% 8% 6% 4% 2% 0% 16% 14% 1200 Samples VCM = VSS 12% 10% 8% 6% 4% 2% 0% 4 5 6 7 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0 Input Hysteresis Voltage (mV) Input Offset Voltage (mV) FIGURE 2-4: VCM = VSS. 5% VIN- 0 -1 0 1 2 3 4 5 6 7 Time (1 ms/div) 8 9 10 FIGURE 2-3: The MCP6541/1R/1U/2/3/4 Comparators Show No Phase Reversal. (c) 2002-2011 Microchip Technology Inc. 9.0 8.6 9.4 -0.016 1 VDD = 1.6V -0.020 2 -0.024 3 VDD = 5.5V -0.028 4 596 Samples VCM = VSS TA = -40C to +125C -0.056 VOUT 5 20% 18% 16% 14% 12% 10% 8% 6% 4% 2% 0% -0.060 VDD = 5.5V 6 FIGURE 2-5: Input Hysteresis Voltage Linear Temp. Co. (TC1) at VCM = VSS. Percentage of Occurrences Inverting Input, Output Voltage (V) 7 8.2 14 12 8 10 6 4 2 0 -2 -4 -6 -8 -10 -12 Input Hysteresis Voltage - Linear Temp. Co.; TC1 (V/C) Input Offset Voltage Drift (V/C) Input Offset Voltage Drift at 7.8 0% 0% FIGURE 2-2: VCM = VSS. VDD = 1.6V 7.4 2% VDD = 5.5V -0.032 4% 10% 7.0 6% 15% -0.036 8% 6.6 10% 5.4 12% 596 Samples VCM = VSS TA = -40C to +125C 20% -0.052 14% Input Hysteresis Voltage at 25% 4.6 1200 Samples VCM = VSS TA= -40C to +125C 5.0 Input Offset Voltage at Percentage of Occurrences 16% -14 Percentage of Occurrences FIGURE 2-1: VCM = VSS. -0.040 3 6.2 2 -0.044 1 5.8 -7 -6 -5 -4 -3 -2 -1 0 -0.048 Percentage of Occurrences 14% Input Hysteresis Voltage - 2 Quadratic Temp. Co.; TC2 (V/C ) FIGURE 2-6: Input Hysteresis Voltage Quadratic Temp. Co. (TC2) at VCM = VSS. DS21696H-page 7 MCP6541/1R/1U/2/3/4 VCM = VSS VDD = 1.6V VDD = 5.5V 125 FIGURE 2-7: Input Offset Voltage vs. Ambient Temperature at VCM = VSS. 4.5 4.0 3.5 3.0 2.5 TA = -40C 2.0 Common Mode Input Voltage (V) Common Mode Input Voltage (V) FIGURE 2-9: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 5.5V. DS21696H-page 8 2.0 1.8 1.6 4.0 3.5 3.0 2.5 2.0 6.0 5.5 5.0 4.5 1.5 4.0 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -2.0 4.5 3.5 -1.5 5.0 3.0 -1.0 TA = +125C TA = +85C TA = +25C TA = -40C 2.5 TA = +85C TA = +125C VDD = 5.5V 2.0 0.0 5.5 0.0 TA = -40C TA = +25C 6.0 -0.5 Input Hysteresis Voltage (mV) Input Offset Voltage (mV) VDD = 5.5V -0.5 1.4 FIGURE 2-11: Input Hysteresis Voltage vs. Common Mode Input Voltage at VDD = 1.6V. 2.0 0.5 1.2 Common Mode Input Voltage (V) FIGURE 2-8: Input Offset Voltage vs. Common Mode Input Voltage at VDD = 1.6V. 1.0 1.0 1.5 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -2.0 1.5 125 TA = +125C TA = +85C TA = +25C 5.0 0.8 -1.5 VDD = 1.6V 1.5 -1.0 5.5 1.0 -0.5 100 6.0 0.6 TA = +125C TA = +85C TA = +25C TA = -40C TA = +125C 0 25 50 75 Ambient Temperature (C) 0.4 1.0 0.0 -25 0.2 Input Hysteresis Voltage (mV) Input Offset Voltage (mV) VDD = 1.6V 0.5 -50 FIGURE 2-10: Input Hysteresis Voltage vs. Ambient Temperature at VCM = VSS. 2.0 1.5 VDD = 5.5V 0.0 0 25 50 75 100 Ambient Temperature (C) VDD = 1.6V -0.2 -25 VCM = VSS 0.5 -50 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 -0.4 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 -0.4 -0.6 -0.8 -1.0 Input Hysteresis Voltage (mV) Input Offset Voltage (mV) Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. Common Mode Input Voltage (V) FIGURE 2-12: Input Hysteresis Voltage vs. Common Mode Input Voltage at VDD = 5.5V. (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. 10n 10000 Input Bias, Offset Currents (A) 90 Input Referred CMRR, PSRR (dB) 85 80 75 PSRR, VIN+ = VSS, VDD = 1.6V to 5.5V 70 65 CMRR, VIN+ = -0.3 to 5.3V, VDD = 5.0V 60 55 -50 -25 0 25 50 75 Ambient Temperature (C) 125 100p 100 IOS, TA = +125C 1p 1 100f 0.1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 CMRR, PSRR vs. Ambient FIGURE 2-16: Input Bias Current, Input Offset Current vs. Common Mode Input Voltage. 0.7 100 IB 10 | IOS | 1 0.1 0.6 0.5 0.4 TA = +125C TA = +85C TA = +25C TA = -40C 0.3 0.2 0.1 0.0 55 65 75 85 95 105 115 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) Ambient Temperature (C) FIGURE 2-14: Input Bias Current, Input Offset Current vs. Ambient Temperature. FIGURE 2-17: Quiescent Current vs. Power Supply Voltage. 0.7 VDD = 1.6V 0.6 Quiescent Current per Comparator (A) Quiescent Current per comparator (A) IOS, TA = +85C Common Mode Input Voltage (V) VDD = 5.5V VCM = VDD 0.5 0.4 0.3 0.2 IB, TA = +85C 10p 10 1000 0.7 VDD = 5.5V 1n 1000 Quiescent Current per Comparator (A) Input Bias, Offset Currents (pA) FIGURE 2-13: Temperature. 100 IB, TA = +125C Sweep VIN+, VIN- = VDD/2 0.1 Sweep VIN-, VIN+ = VDD/2 VDD = 5.5V 0.6 0.5 0.4 0.3 0.2 0.1 Sweep VIN+, VIN- = VDD/2 Sweep VIN-, VIN+ = VDD/2 0.0 0.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Common Mode Input Voltage (V) 1.6 FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage at VDD = 1.6V. (c) 2002-2011 Microchip Technology Inc. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) FIGURE 2-18: Quiescent Current vs. Common Mode Input Voltage at VDD = 5.5V. DS21696H-page 9 MCP6541/1R/1U/2/3/4 Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. Output Short Circuit Current Magnitude (mA) Supply Current (A) 10 100 mV Overdrive VCM = VDD/2 RL = infinity 1 VDD = 5.5V VDD = 1.6V 35 25 20 15 10 0.1 1 10 Toggle Frequency (kHz) Supply Current vs. Toggle 0.8 0.7 0.6 0.5 0.4 VDD = 1.6V VOL-VSS: TA = +125C TA = +85C TA = +25C TA = -40C VDD-VOH: TA = +125C TA = +85C TA = +25C TA = -40C 0.3 0.2 0.1 0.0 0.0 0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) 100 1.0 1.5 2.0 Output Current (mA) 2.5 FIGURE 2-22: Output Short Circuit Current Magnitude vs. Power Supply Voltage. Output Voltage Headroom (V) FIGURE 2-19: Frequency. Output Voltage Headroom (V) 5 0 0.1 VDD - VOH: TA = +125C TA = +85C TA = +25C TA = -40C VDD = 5.5V 5 10 15 Output Current (mA) 20 25 FIGURE 2-23: Output Voltage Headroom vs. Output Current at VDD = 5.5V. 45% Percentage of Occurrences 35% VOL - VSS: TA = +125C TA = +85C TA = +25C TA = -40C 0 45% 40% 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 3.0 FIGURE 2-20: Output Voltage Headroom vs. Output Current at VDD = 1.6V. Percentage of Occurrences TA = -40C TA = +25C TA = +85C TA = +125C 30 600 Samples 100 mV Overdrive VCM = VDD/2 30% 25% 20% 15% VDD = 1.6V 10% VDD = 5.5V 5% 0% 600 Samples 100 mV Overdrive VCM = VDD/2 40% 35% 30% 25% 20% 15% VDD = 1.6V 10% VDD = 5.5V 5% 0% 0 1 2 3 4 5 6 7 8 0 1 High-to-Low Propagation Delay (s) FIGURE 2-21: Delay. DS21696H-page 10 High-to-Low Propagation 2 3 4 5 6 7 8 Low-to-High Propagation Delay (s) FIGURE 2-24: Delay. Low-to-High Propagation (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 45% 8 600 Samples 100 mV Overdrive VCM = VDD/2 40% 35% 30% 25% 20% VDD = 1.6V VDD = 5.5V 15% 10% 5% Propagation Delay (s) Percentage of Occurrences Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. 0% 100 mV Overdrive VCM = VDD/2 7 6 tPLH @ VDD = 5.5V tPHL @ VDD = 5.5V tPLH @ VDD = 1.6V tPHL @ VDD = 1.6V 5 4 3 2 1 0 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 -50 -25 Propagation Delay Skew (s) 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Propagation Delay Skew. tPLH @ 10 mV Overdrive tPHL @ 10 mV Overdrive tPLH @ 100 mV Overdrive tPHL @ 100 mV Overdrive 2.5 3.0 3.5 4.0 4.5 Power Supply Voltage (V) 5.0 tPHL @ VDD = 5.5V tPLH @ VDD = 1.6V tPHL @ VDD = 1.6V 10 tPLH @ VDD = 5.5V 5.5 FIGURE 2-29: Overdrive. 8 VDD = 1.6V 100 mV Overdrive 6 5 tPLH 4 3 1 Propagation Delay (s) Propagation Delay (s) VCM = VDD/2 1 2.0 FIGURE 2-26: Propagation Delay vs. Power Supply Voltage. 7 125 100 VCM = VDD/2 1.5 8 100 FIGURE 2-28: Propagation Delay vs. Ambient Temperature. Propagation Delay (s) Propagation Delay (s) FIGURE 2-25: 0 25 50 75 Ambient Temperature (C) tPHL 2 1 0 7 10 100 Input Overdrive (mV) 1000 Propagation Delay vs. Input VDD = 5.5V 100 mV Overdrive 6 5 4 tPHL tPLH 3 2 1 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Common Mode Input Voltage (V) 1.6 FIGURE 2-27: Propagation Delay vs. Common Mode Input Voltage at VDD = 1.6V. (c) 2002-2011 Microchip Technology Inc. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) FIGURE 2-30: Propagation Delay vs. Common Mode Input Voltage at VDD = 5.5V. DS21696H-page 11 MCP6541/1R/1U/2/3/4 Chip Select, Output Voltage (V) 100 mV Overdrive VCM = VDD/2 tPHL @ VDD = 1.6V tPLH @ VDD = 1.6V tPHL @ VDD = 5.5V tPLH @ VDD = 5.5V 0 10 20 FIGURE 2-31: Capacitance. 1.E-03 1m Supply Current per Comparator (A) 1.E-04 100 30 40 50 60 70 Load Capacitance (nF) 80 90 Propagation Delay vs. Load Comparator Shuts Off VOUT CS 0 1 2 CS High-to-Low CS Low-to-High 7 8 9 10 FIGURE 2-34: Chip Select (CS) Step Response (MCP6543 only). Comparator Turns On 100 1.E-04 Comparator Shuts Off VDD = 1.6V 10p 1.E-11 0.0 0.2 0.4 CS Hysteresis 100n 1.E-07 10n 1.E-08 CS Low-to-High 1n 1.E-09 0.6 0.8 1.0 1.2 1.4 1.6 VDD = 5.5V 10p 1.E-11 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Chip Select (CS) Voltage (V) Chip Select (CS) Voltage (V) 1.6 VOUT 25 CS 20 0.0 -1.6 VDD = 1.6V 15 Charging output capacitance Start-up IDD 5 -3.2 -4.9 -6.5 0 -8.1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Time (1 ms/div) FIGURE 2-33: Supply Current (charging current) vs. Chip Select (CS) pulse at VDD = 1.6V (MCP6543 only). FIGURE 2-35: Supply Current (shoot through current) vs. Chip Select (CS) Voltage at VDD = 5.5V (MCP6543 only). Supply Current per Comparator (A) 30 Output Voltage, Chip Select Voltage (V), FIGURE 2-32: Supply Current (shoot through current) vs. Chip Select (CS) Voltage at VDD = 1.6V (MCP6543 only). DS21696H-page 12 CS High-to-Low 100p 1.E-10 100p 1.E-10 Supply Current (A) 4 5 6 Time (ms) 1 1.E-06 CS Hysteresis 100n 1.E-07 10 3 10 1.E-05 1 1.E-06 1n 1.E-09 VDD = 5.5V 1.E-03 1m Comparator Turns On 10 1.E-05 10n 1.E-08 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 200 180 160 140 120 100 80 60 40 20 0 6 3 0 -3 -6 -9 -12 -15 -18 -21 -24 VOUT CS Start-up IDD VDD = 5.5V Charging output capacitance 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Time (0.5 ms/div) Output Voltage, Chip Select Voltage (V) 50 45 40 35 30 25 20 15 10 5 0 Supply Current per Comparator (A) Propagation Delay (s) Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. 3.5 FIGURE 2-36: Supply Current (charging current) vs. Chip Select (CS) pulse at VDD = 5.5V (MCP6543 only). (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 Input Current Magnitude (A) Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = GND, RL = 100 k to VDD/2, and CL = 36 pF. 1.E-02 10m 1.E-03 1m 1.E-04 100 1.E-05 10 1 1.E-06 100n 1.E-07 10n 1.E-08 1n 1.E-09 100p 1.E-10 10p 1.E-11 1p 1.E-12 +125C +85C +25C -40C -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 Input Voltage (V) FIGURE 2-37: Voltage. Input Bias Current vs. Input (c) 2002-2011 Microchip Technology Inc. DS21696H-page 13 MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 14 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. MCP6541U SOT-23-5 SC-70-5 MCP6542 MCP6543 MCP6544 PIN FUNCTION TABLE MCP6541R TABLE 3-1: 1 4 1 6 1 OUT, OUTA Digital Output (comparator A) 4 3 2 2 2 VIN-, VINA- Inverting Input (comparator A) 3 3 1 3 3 3 VIN+, VINA+ Non-inverting Input (comparator A) 7 5 2 5 8 7 4 VDD -- -- -- -- 5 -- 5 VINB+ Non-inverting Input (comparator B) -- -- -- -- 6 -- 6 VINB- Inverting Input (comparator B) -- -- -- -- 7 -- 7 OUTB Digital Output (comparator B) -- -- -- -- -- -- 8 OUTC Digital Output (comparator C) -- -- -- -- -- -- 9 VINC- Inverting Input (comparator C) -- -- -- -- -- -- 10 VINC+ Non-inverting Input (comparator C) MCP6541 PDIP, SOIC, MSOP MCP6541 SOT-23-5, SC-70-5 6 1 2 4 3 Symbol Description Positive Power Supply 4 2 5 2 4 4 11 VSS -- -- -- -- -- -- 12 VIND+ -- -- -- -- -- -- 13 VIND- Inverting Input (comparator D) -- -- -- -- -- -- 14 OUTD Digital Output (comparator D) -- -- -- -- -- 8 -- CS Chip Select 1, 5, 8 -- -- -- -- 1, 5 -- NC No Internal Connection 3.1 Analog Inputs The comparator non-inverting and inverting inputs are high-impedance CMOS inputs with low bias currents. 3.2 CS Digital Input This is a CMOS, Schmitt-triggered input that places the part into a low-power mode of operation. 3.3 Digital Outputs The comparator outputs are CMOS, push-pull digital outputs. They are designed to be compatible with CMOS and TTL logic and are capable of driving heavy DC or capacitive loads. (c) 2002-2011 Microchip Technology Inc. 3.4 Negative Power Supply Non-inverting Input (comparator D) Power Supply (VSS and VDD) The positive power supply pin (VDD) is 1.6V to 5.5V higher than the negative power supply pin (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need a local bypass capacitor (typically 0.01 F to 0.1 F) within 2 mm of the VDD pin. These can share a bulk capacitor with nearby analog parts (within 100 mm), but it is not required. DS21696H-page 15 MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 16 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 4.0 APPLICATIONS INFORMATION The MCP6541/1R/1U/2/3/4 family of push-pull output comparators are fabricated on Microchip's state-of-theart CMOS process. They are suitable for a wide range of applications requiring very low-power consumption. 4.1 VDD D1 R1 Comparator Inputs 4.1.1 INPUT VOLTAGE AND CURRENT LIMITS The ESD protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors, and to minimize input bias current (IB). The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go too far above VDD; their breakdown voltage is high enough to allow normal operation, and low enough to bypass ESD events within the specified limits. VDD Bond Pad Input Stage Bond Pad VIN- VSS Bond Pad FIGURE 4-1: Structures. Simplified Analog Input ESD In order to prevent damage and/or improper operation of these amplifiers, the circuits they are in must limit the currents (and voltages) at the VIN+ and VIN- pins (see Absolute Maximum Ratings at the beginning of Section 1.0 "Electrical Characteristics"). Figure 4-3 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (VIN+ and VIN-) from going too far below ground, and the resistors R1 and R2, limit the possible current drawn out of the input pin. Diodes D1 and D2 prevent the input pin (VIN+ and VIN-) from going too far above VDD. When implemented as shown, resistors R1 and R2 also limit the current through D1 and D2. (c) 2002-2011 Microchip Technology Inc. - VOUT V2 R2 R3 R1 VSS - (minimum expected V1) 2 mA R2 VSS - (minimum expected V2) 2 mA FIGURE 4-2: Inputs. Protecting the Analog It is also possible to connect the diodes to the left of the resistors R1 and R2. In this case, the currents through the diodes D1 and D2 need to be limited by some other mechanism. The resistor then serves as in-rush current limiter; the DC current into the input pins (VIN+ and VIN-) should be very small. A significant amount of current can flow out of the inputs when the common mode voltage (VCM) is below ground (VSS); see Figure 2-37. Applications that are high-impedance may need to limit the usable voltage range. 4.1.3 VIN+ Bond Pad MCP654X D2 PHASE REVERSAL The MCP6541/1R/1U/2/3/4 comparator family uses CMOS transistors at the input. They are designed to prevent phase inversion when the input pins exceed the supply voltages. Figure 2-3 shows an input voltage exceeding both supplies with no resulting phase inversion. 4.1.2 + V1 NORMAL OPERATION The input stage of this family of devices uses two differential input stages in parallel: one operates at low input voltages and the other at high input voltages. With this topology, the input voltage is 0.3V above VDD and 0.3V below VSS. Therefore, the input offset voltage is measured at both VSS - 0.3V and VDD + 0.3V to ensure proper operation. The MCP6541/1R/1U/2/3/4 family has internally-set hysteresis that is small enough to maintain input offset accuracy (<7 mV) and large enough to eliminate output chattering caused by the comparator's own input noise voltage (200 Vp-p). Figure 4-3 depicts this behavior. DS21696H-page 17 MCP6541/1R/1U/2/3/4 VDD = 5.0V VIN- VOUT Hysteresis 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 Input Voltage (10 mV/div) Output Voltage (V) 4.4 8 7 6 5 4 3 2 1 0 -1 -2 -3 Time (100 ms/div) FIGURE 4-3: The MCP6541/1R/1U/2/3/4 comparators' internal hysteresis eliminates output chatter caused by input noise voltage. 4.2 Push-Pull Output The push-pull output is designed to be compatible with CMOS and TTL logic, while the output transistors are configured to give rail-to-rail output performance. They are driven with circuitry that minimizes any switching current (shoot-through current from supply-to-supply) when the output is transitioned from high-to-low, or from low-to-high (see Figures 2-15, 2-18, and 2-32 -- 2-36 for more information). 4.3 Externally Set Hysteresis Greater flexibility in selecting hysteresis (or input trip points) is achieved by using external resistors. Input offset voltage (VOS) is the center (average) of the (input-referred) low-high and high-low trip points. Input hysteresis voltage (VHYST) is the difference between the same trip points. Hysteresis reduces output chattering when one input is slowly moving past the other and thus reduces dynamic supply current. It also helps in systems where it is best not to cycle between states too frequently (e.g., air conditioner thermostatic control). 4.4.1 NON-INVERTING CIRCUIT Figure 4-4 shows a non-inverting circuit for singlesupply applications using just two resistors. The resulting hysteresis diagram is shown in Figure 4-5. VDD The internal CS circuitry is designed to minimize glitches when cycling the CS pin. This helps conserve power, which is especially important in battery-powered applications. VOUT MCP654X + VIN MCP6543 Chip Select (CS) The MCP6543 is a single comparator with Chip Select (CS). When CS is pulled high, the total current consumption drops to 20 pA (typ.); 1 pA (typ.) flows through the CS pin, 1 pA (typ.) flows through the output pin and 18 pA (typ.) flows through the VDD pin, as shown in Figure 1-1. When this happens, the comparator output is put into a high-impedance state. By pulling CS low, the comparator is enabled. If the CS pin is left floating, the comparator will not operate properly. Figure 1-1 shows the output voltage and supply current response to a CS pulse. - VREF R1 RF FIGURE 4-4: Non-inverting Circuit with Hysteresis for Single-supply. VOUT VDD VOH High-to-Low VOL VSS VSS Low-to-High VIN VTHL VTLH VDD FIGURE 4-5: Hysteresis Diagram for the Non-Inverting Circuit. The trip points for Figures 4-4 and 4-5 are: EQUATION 4-1: R1 R1 VTLH = V REF 1 + ------- - V OL ------- RF RF R1 R 1 VTHL = V REF 1 + ------- - V OH ------- RF RF VTLH = trip voltage from low-to-high VTHL = trip voltage from high-to-low DS21696H-page 18 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 4.4.2 INVERTING CIRCUIT Figure 4-6 shows an inverting circuit for single-supply using three resistors. The resulting hysteresis diagram is shown in Figure 4-7. Using this simplified circuit, the trip voltage can be calculated using the following equation: EQUATION 4-2: RF R 23 V THL = V OH ----------------------- + V 23 ---------------------- R + R R 23 23 + R F F VDD RF R23 V TLH = V OL ----------------------- + V 23 ---------------------- R + R R 23 23 + R F F VIN VDD VOUT MCP654X VTLH = trip voltage from low-to-high R2 VTHL = trip voltage from high-to-low Figure 2-20 and Figure 2-23 can be used to determine typical values for VOH and VOL. RF R3 FIGURE 4-6: Hysteresis. 4.5 Inverting Circuit With With this family of comparators, the power supply pin (VDD for single supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good edge rate performance. VOUT VDD VOH 4.6 Low-to-High High-to-Low VIN VOL VSS VSS VTLH VTHL FIGURE 4-7: Inverting Circuit. VDD Hysteresis Diagram for the In order to determine the trip voltages (VTHL and VTLH) for the circuit shown in Figure 4-6, R2 and R3 can be simplified to the Thevenin equivalent circuit with respect to VDD, as shown in Figure 4-8. VDD MCP654X + VSS VOUT V23 R23 RF Thevenin Equivalent Circuit. Capacitive Loads Reasonable capacitive loads (e.g., logic gates) have little impact on propagation delay (see Figure 2-31). The supply current increases with increasing toggle frequency (Figure 2-19), especially with higher capacitive loads. 4.7 Battery Life In order to maximize battery life in portable applications, use large resistors and small capacitive loads. Avoid toggling the output more than necessary. Do not use Chip Select (CS) frequently to conserve start-up power. Capacitive loads will draw additional power at start-up. 4.8 - FIGURE 4-8: Bypass Capacitors PCB Surface Leakage In applications where low input bias current is critical, PCB (Printed Circuit Board) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow. This is greater than the MCP6541/1R/1U/2/3/4 family's bias current at 25C (1 pA, typ.). Where: R2R3 R 23 = ------------------R2 + R3 R3 V23 = ------------------- x V DD R2 + R3 (c) 2002-2011 Microchip Technology Inc. DS21696H-page 19 MCP6541/1R/1U/2/3/4 The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-9. VIN- VIN+ VSS 4.10 Typical Applications 4.10.1 PRECISE COMPARATOR Some applications require higher DC precision. An easy way to solve this problem is to use an amplifier (such as the MCP6041) to gain-up the input signal before it reaches the comparator. Figure 4-11 shows an example of this approach. VDD VREF MCP6041 Guard Ring FIGURE 4-9: Example Guard Ring Layout for Inverting Circuit. 1. 2. 4.9 Inverting Configuration (Figures 4-6 and 4-9): a.Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the comparator (e.g., VDD/2 or ground). b.Connect the inverting pin (VIN-) to the input pad without touching the guard ring. Non-inverting Configuration (Figure 4-4): a.Connect the non-inverting pin (VIN+) to the input pad without touching the guard ring. b.Connect the guard ring to the inverting input pin (VIN-). VDD VIN R1 R2 VREF FIGURE 4-11: Comparator. 4.10.2 Precise Inverting WINDOWED COMPARATOR Figure 4-12 shows one approach to designing a windowed comparator. The AND gate produces a logic `1' when the input voltage is between VRB and VRT (where VRT > VRB). VRT 1/2 MCP6542 Unused Comparators An unused amplifier in a quad package (MCP6544) should be configured as shown in Figure 4-10. This circuit prevents the output from toggling and causing crosstalk. It uses the minimum number of components and draws minimal current (see Figure 2-15 and Figure 2-18). 1/4 MCP6544 VDD VOUT MCP654X VIN 1/2 MCP6542 VRB FIGURE 4-12: 4.10.3 Windowed Comparator. ASTABLE MULTIVIBRATOR A simple astable multivibrator design is shown in Figure 4-13. VREF needs to be between the power supplies (VSS = GND and VDD) to achieve oscillation. The output duty cycle changes with VREF. R1 - R2 VREF VDD + MCP6541 FIGURE 4-10: Unused Comparators. C1 FIGURE 4-13: DS21696H-page 20 VOUT R3 Astable Multivibrator. (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 5-Lead SC-70 (MCP6541, MCP6541U) Example: I-Temp Code E-Temp Code MCP6541T-I/LT ABNN Note 2 MCP6541UT-I/LT BANN Note 2 Device XXNN Front) YWW (Back) Note 1: 2: BA25 Front) 146 (Back) I-Temp parts prior to March 2005 are marked "BAN" SC-70-5 E-Temp parts not available at this release of this data sheet. Example: 5-Lead SOT-23 (MCP6541, MCP6541R, MCP6541U) Device XXNN I-Temp Code E-Temp Code MCP6541 ABNN GTNN MCP6541R AGNN GUNN -- ATNN MCP6541U Note: AB25 Applies to 5-Lead SOT-23 8-Lead PDIP (300 mil) (MCP6541, MCP6542, MCP6543, MCP6544) XXXXXXXX XXXXXNNN YYWW Example: MCP6541 I/P256 1146 8-Lead SOIC (150 mil) (MCP6541, MCP6542, MCP6543, MCP6544) XXXXXXXX XXXXYYWW NNN XXXXXX OR MCP6541E SN^^1146 e3 256 Example: 6543E 6543I YWWNNN 146256 Legend: XX...X Y YY WW NNN e3 * Note: Example: MCP6542 I/SN1146 256 8-Lead MSOP (MCP6541, MCP6542, MCP6543) OR MCP6541 e3 E/P^^256 1146 OR 146256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. (c) 2002-2011 Microchip Technology Inc. DS21696H-page 21 MCP6541/1R/1U/2/3/4 Package Marking Information (Continued) 14-Lead PDIP (300 mil) (MCP6544) Example: XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN MCP6544-I/P 114656 OR MCP6544E/P e3 1146256 MCP6544 I/P e3 1146256 OR 14-Lead SOIC (150 mil) (MCP6544) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP6544ISL 1146256 MCP6544 e3 E/SL^^ 1146256 OR OR 14-Lead TSSOP (MCP6544) XXXXXXXX YYWW NNN DS21696H-page 22 MCP6544 e3 I/SL^^ 1146256 Example: MCP6544I 1146 256 OR MCP6544E 1146 256 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / D b 3 1 2 E1 E 4 5 e A e A2 c A1 L 3# 4# 5$8 %1 44" " 5 5 56 7 ( 1# 6, : # ; < ; < < !!1/ / #! %% 9()* 6, =!# " ; !!1/=!# " ( ( ( 6, 4# ; ( . 4 9 #4# 4! / 4!=!# ; < 9 8 ( < !"! #$! !% # $ !% # $ !# "'( )*+ ) #&#,$ --# $## #&! ! (c) 2002-2011 Microchip Technology Inc. - *9) DS21696H-page 23 MCP6541/1R/1U/2/3/4 . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / DS21696H-page 24 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 ! . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / b N E E1 3 2 1 e e1 D A2 A c A1 L L1 3# 4# 5$8 %1 44" " 5 56 7 5 ( 4!1# ()* 6$# !4!1# 6, : # < ; < < ( 6, =!# " < !!1/=!# " < ; 6, 4# < !!1/ / #! %% )* ( . #4# 4 < 9 . # # 4 ( < ; . # > < > ; < 9 4! / 4!=!# 8 < ( !"! #$! !% # $ !% # $ #&! ! !# "'( )*+ ) #&#,$ --# $## (c) 2002-2011 Microchip Technology Inc. - *) DS21696H-page 25 MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 26 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 " # $ %! &' #$ . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b 3# 4# 5$8 %1 5*:" 5 5 1# 7 ; # #1 56 )* < < ( ( ) # #1 ( < < " ( !!1/ $! # / $! =!# !!1/=!# " ( ; 6, 4# ; 9( ( # #1 4 ( / ; ( 4!=!# 8 9 8 ; ) < < 4! 3 4 - 4!=!# 6, - ? 1, $!&%#$ , 08$#$ #8 #!-# # # ! ?%#* # # !"! #$! !% # $ !% # $ !# "'( )*+) #&#,$ --# $## #&!@ ! (c) 2002-2011 Microchip Technology Inc. - *;) DS21696H-page 27 MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 28 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2002-2011 Microchip Technology Inc. DS21696H-page 29 MCP6541/1R/1U/2/3/4 " %()!*+&'$ . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / DS21696H-page 30 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2002-2011 Microchip Technology Inc. DS21696H-page 31 MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 32 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2002-2011 Microchip Technology Inc. DS21696H-page 33 MCP6541/1R/1U/2/3/4 ,- # $ %! &' #$ . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / N NOTE 1 E1 1 3 2 D E A2 A L A1 c b1 b e eB 3# 4# 5$8 %1 5*:" 5 5 1# 7 # #1 56 )* < < ( ( ) # #1 ( < < " ( !!1/ $! # / $! =!# !!1/=!# " ( ; 6, 4# ( ( ( ( # #1 4 ( / ; ( 4!=!# 8 ( 9 8 ; ) < < 4! 3 4 - 4!=!# 6, - ? 1, $!&%#$ , 08$#$ #8 #!-# # # ! ?%#* # # !"! #$! !% # $ !% # $ !# "'( )*+) #&#,$ --# $## #&!@ ! DS21696H-page 34 - *() (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2002-2011 Microchip Technology Inc. DS21696H-page 35 MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 36 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / (c) 2002-2011 Microchip Technology Inc. DS21696H-page 37 MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 38 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging (c) 2002-2011 Microchip Technology Inc. DS21696H-page 39 MCP6541/1R/1U/2/3/4 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21696H-page 40 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 APPENDIX A: REVISION HISTORY Revision H (December 2011) The following is the list of modifications: 1. 1. 2. 3. 4. Updated Package Types drawings to correctly show the device representation for the SC-70 package. Updated package's temperatures in the Temperature Characteristics table. Corrected the marking information table for the 5-Lead SC-70 package (MCP6541 and MCP6541U) in Section 5.1 "Package Marking Information". Updated package outline drawings in Section 5.1 "Package Marking Information" to show all views for each package. Minor editorial changes. Revision G (March 2011) The following is the list of modifications: 1. Revision D (May 2006) The following is the list of modifications: 1. 2. 3. 4. 5. 6. Added E-temp parts. Changed VHYST temperature specification to linear and quadratic temperature coefficients. Changed specifications and plots for E-Temp. Added section 3.0 "Pin Descriptions". Corrected package marking (See Section 5.1 "Package Marking Information"). Added Appendix A: "Revision History". Revision C (September 2003) * Undocumented changes. Revision B (November 2002) * Undocumented changes. Revision A (March 2002) * Original Release of this Document. Updated the marking information for the 5-Lead SC-70 package in Section 5.1 "Package Marking Information". Revision F (September 2007) 1. 2. Corrected polarity of MCP6541U SOT-23-5 pin out diagram on front page. Section 5.0 "Packaging Information": Updated package outline drawings per MarCom. Revision E (September 2006) The following is the list of modifications: 1. 2. 3. 4. Added MCP6541U pinout for the SOT-23-5 package. Clarified Absolute Maximum Analog Input Voltage and Current Specifications. Added applications write-ups on unused comparators. Added disclaimer to package outline drawings. (c) 2002-2011 Microchip Technology Inc. DS21696H-page 41 MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 42 (c) 2002-2011 Microchip Technology Inc. MCP6541/1R/1U/2/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. -X /XX Device Temperature Range Package Device: MCP6541: MCP6541T: MCP6541RT: MCP6541UT: MCP6542: MCP6542T: MCP6543: MCP6543T: MCP6544: MCP6544T: Temperature Range: Single Comparator Single Comparator (Tape and Reel) (SC-70, SOT-23, SOIC, MSOP) Single Comparator (Rotated - Tape and Reel) (SOT-23 only) Single Comparator (Tape and Reel) (SC-70, SOT-23; SOT-23-5 is E-Temp only) Dual Comparator Dual Comparator (Tape and Reel for SOIC and MSOP) Single Comparator with CS Single Comparator with CS (Tape and Reel for SOIC and MSOP) Quad Comparator Quad Comparator (Tape and Reel for SOIC and TSSOP) I = -40C to +85C E * = -40C to +125C Examples: a) MCP6541T-I/LT: b) MCP6541T-I/OT: c) MCP6541-I/MS: d) MCP6541-E/P: e) MCP6541-E/SN: f) MCP6541RT-I/OT: Tape and Reel, Industrial Temperature, 5LD SOT23. g) MCP6541UT-E/LT: Tape and Reel, Industrial Temperature, 5LD SC-70 MCP6541UT-E/OT: Tape and Reel, Extended Temperature, 5LD SOT23. h) * SC-70-5 E-Temp parts not available at this release of the data sheet. Package: LT OT MS P SN SL ST = = = = = = = Plastic Package (SC-70), 5-lead Plastic Small Outline Transistor (SOT-23), 5-lead Plastic MSOP, 8-lead Plastic DIP (300 mil Body), 8-lead, 14-lead Plastic SOIC (150 mil Body), 8-lead Plastic SOIC (150 mil Body), 14-lead (MCP6544) Plastic TSSOP (4.4mm Body), 14-lead (MCP6544) (c) 2002-2011 Microchip Technology Inc. a) MCP6542-I/MS: b) MCP6542T-I/MS: c) MCP6542-I/P: d) MCP6542-E/SN: a) MCP6543-I/SN: b) MCP6543T-I/SN: c) MCP6543-I/P: d) MCP6543-E/SN: a) MCP6544T-I/SL: b) MCP6544T-E/SL: c) MCP6544-I/P: d) MCP6544T-E/ST: Tape and Reel, Industrial Temperature, 5LD SC-70. Tape and Reel, Industrial Temperature, 5LD SOT-23. Tape and Reel, Industrial Temperature, 8LD MSOP. Extended Temperature, 8LD PDIP. Extended Temperature, 8LD SOIC. Industrial Temperature, 8LD MSOP. Tape and Reel, Industrial Temperature, 8LD MSOP. Industrial Temperature, 8LD PDIP. Extended Temperature, 8LD SOIC. Industrial Temperature, 8LD SOIC. Tape and Reel, Industrial Temperature, 8LD SOIC. Industrial Temperature, 8LD PDIP. Extended Temperature, 8LD SOIC. Tape and Reel, Industrial Temperature, 14LD SOIC. Tape and Reel, Extended Temperature, 14LD SOIC. Industrial Temperature, 14LD PDIP. Tape and Reel, Extended Temperature, 14LD TSSOP. DS21696H-page 43 MCP6541/1R/1U/2/3/4 NOTES: DS21696H-page 44 (c) 2002-2011 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2002-2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-61341-921-2 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2002-2011 Microchip Technology Inc. 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