© Semiconductor Components Industries, LLC, 2015
March, 2015 − Rev. 1 1Publication Order Number:
NSI50150AD/D
NSI50150ADT4G
Adjustable Constant Current
Regulator & LED Driver
50 V, 150 − 350 mA + 10%, 4.2 W Package
The adjustable constant current regulator (CCR) is a simple,
economical and robust device designed to provide a cost effective
solution for regulating current in LEDs. The CCR is based on
Self-Biased Transistor (SBT) technology and regulates current over a
wide voltage range. It is designed with a negative temperature
coefficient to protect LEDs from thermal runaway at extreme voltages
and currents.
The CCR turns on immediately and is at 14% of regulation with
only 0.5 V Vak. The Radj pin allows Ireg(SS) to be adjusted to higher
currents by attaching a resistor between Radj (Pin 3) and the Cathode
(Pin 4). The Radj pin can also be left open (No Connect) if no
adjustment is required. It requires no external components allowing it
to be designed as a high or low−side regulator. The high anode-
cathode voltage rating withstands surges common in Automotive,
Industrial and Commercial Signage applications. This device is
available in a thermally robust package and is qualified to stringent
AEC−Q101 standard, which is lead-free RoHS compliant and uses
halogen-free molding compound.
Features
•Robust Power Package: 4.2 Watts
•Adjustable up to 350 mA
•Wide Operating Voltage Range
•Immediate Turn-On
•Voltage Surge Suppressing − Protecting LEDs
•UL94−V0 Certified
•SBT (Self−Biased Transistor) Technology
•Negative Temperature Coefficient
•Eliminates Additional Regulation
•NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
•Automobile: Chevron Side Mirror Markers, Cluster, Display &
Instrument Backlighting, CHMSL, Map Light
•AC Lighting Panels, Display Signage, Decorative Lighting, Channel
Lettering
•Application Notes AND8391/D, AND9008/D − Power Dissipation
Considerations
•Application Note AND8349/D − Automotive CHMSL
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DPAK
CASE 369C
MARKING DIAGRAM
Anode
1
4
Cathode
Ireg(SS) = 150 − 350 mA
@ Vak = 7.5 V
3
Radj
123
4
1
Y = Year
WW = Work Week
NSI150 = Specific Device Code
G = Pb−Free Package
C
A
Radj
YWW
NSI
150G
Device Package Shipping†
ORDERING INFORMATION
NSI50150ADT4G DPAK
(Pb−Free) 2500/Tape & Ree
l
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer t o our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
NSV50150ADT4G DPAK
(Pb−Free) 2500/Tape & Ree
l
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2
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating Symbol Value Unit
Anode−Cathode Voltage Vak Max 50 V
Reverse Voltage VR500 mV
Operating and Storage Junction Temperature Range TJ, Tstg −55 to +175 °C
ESD Rating: Human Body Model
Machine Model ESD Class 3B (8000 V)
Class C (400 V)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be af fected.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Steady State Current @ Vak = 7.5 V (Note 1) Ireg(SS) 135 150 165 mA
Voltage Overhead (Note 2) Voverhead 1.8 V
Pulse Current @ Vak = 7.5 V (Note 3) Ireg(P) 140.5 158 175.35 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Ireg(SS) steady state is the voltage (Vak) applied for a time duration ≥ 170 sec, using FR−4 @ 1000 mm2 2 oz. Copper traces, in still air.
2. Voverhead = Vin − VLEDs. Voverhead is typical value for 48% Ireg(SS).
3. Ireg(P) non−repetitive pulse test. Pulse width t ≤ 1 msec.
Figure 1. CCR Voltage−Current Characteristic
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3
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation (Note 4) TA = 25°C
Derate above 25°CPD2125
14.16 mW
mW/°C
Thermal Resistance, Junction−to−Ambient (Note 4) RθJA 70.6 °C/W
Thermal Resistance, Junction−to−Tab (Note 4) RψJ−TAB 6.8 °C/W
Total Device Dissipation (Note 5) TA = 25°C
Derate above 25°CPD2500
16.67 mW
mW/°C
Thermal Resistance, Junction−to−Ambient (Note 5) RθJA 60 °C/W
Thermal Resistance, Junction−to−Tab (Note 5) RψJ−TAB 6.3 °C/W
Total Device Dissipation (Note 6) TA = 25°C
Derate above 25°CPD2496
16.64 mW
mW/°C
Thermal Resistance, Junction−to−Ambient (Note 6) RθJA 60.1 °C/W
Thermal Resistance, Junction−to−Tab (Note 6) RψJ−TAB 6.5 °C/W
Total Device Dissipation (Note 7) TA = 25°C
Derate above 25°CPD2930
19.53 mW
mW/°C
Thermal Resistance, Junction−to−Ambient (Note 7) RθJA 51.2 °C/W
Thermal Resistance, Junction−to−Tab (Note 7) RψJ−TAB 5.9 °C/W
Total Device Dissipation (Note 8) TA = 25°C
Derate above 25°CPD2771
18.47 mW
mW/°C
Thermal Resistance, Junction−to−Ambient (Note 8) RθJA 54.1 °C/W
Thermal Resistance, Junction−to−Tab (Note 8) RψJ−TAB 6.2 °C/W
Total Device Dissipation (Note 9) TA = 25°C
Derate above 25°CPD3256
21.71 mW
mW/°C
Thermal Resistance, Junction−to−Ambient (Note 9) RθJA 46.1 °C/W
Thermal Resistance, Junction−to−Tab (Note 9) RψJ−TAB 5.7 °C/W
Total Device Dissipation (Note 10) TA = 25°C
Derate above 25°CPD4202
28.01 mW
mW/°C
Thermal Resistance, Junction−to−Ambient (Note 10) RθJA 35.7 °C/W
Thermal Resistance, Junction−to−Tab (Note 10) RψJ−TAB 5.4 °C/W
Total Device Dissipation (Note 11) TA = 25°C
Derate above 25°CPD4144
27.62 mW
mW/°C
Thermal Resistance, Junction−to−Ambient (Note 11) RθJA 36.2 °C/W
Thermal Resistance, Junction−to−Tab (Note 11) RψJ−TAB 1.0 °C/W
Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C
4. FR−4 @ 300 mm2, 1 oz. copper traces, still air.
5. FR−4 @ 300 mm2, 2 oz. copper traces, still air.
6. FR−4 @ 500 mm2, 1 oz. copper traces, still air.
7. FR−4 @ 500 mm2, 2 oz. copper traces, still air.
8. FR−4 @ 700 mm2, 1 oz. copper traces, still air.
9. FR−4 @ 700 mm2, 2 oz. copper traces, still air.
10.FR−4 @ 1000 mm2, 3 oz. copper traces, still air.
11.400 mm2, DENKA K1, 1.5 mm AL, 2 kV thermally conductive dielectric, 2 oz. Cu, or equivalent.
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4
TYPICAL PERFORMANCE CUR VES
(Minimum FR−4 @ 1000 mm2, 3 oz. Copper Trace, Still Air)
Figure 2. Steady State Current (Ireg(SS)) vs.
Anode−Cathode Voltage (Vak) Figure 3. Pulse Current (Ireg(P)) vs.
Anode−Cathode Voltage (Vak)
Figure 4. Steady State Current vs. Pulse
Current Testing
Vak, ANODE−CATHODE VOLTAGE (V)
Ireg(P), PULSE CURRENT (mA)
Ireg(P), PULSE CURRENT (mA)
Ireg(SS), STEADY STATE CURRENT (mA)
Figure 5. Current Regulation vs. Time
Figure 6. Ireg(SS) vs. Radj
Vak, ANODE−CATHODE VOLTAGE (V)
Ireg(SS), STEADY STATE CURRENT (mA)
DC Test Steady State, Still Air, Radj = Open
TIME (s)
Ireg, CURRENT REGULATION (mA)
Radj (W), Max Power 1 W
101
150
200
Ireg(SS), STEADY STATE CURRENT (mA)
100
250
300
1000
350
Vak @ 7.5 V
TA = 25°C
Radj = Open
Vak @ 7.5 V
TA = 25°C
Non−Repetitive Pulse Test
TA = 25°C
Radj = Open
20080400 120
148
149
Vak @ 7.5 V
TA = 25°C
Radj = Open
150
151
152
153
154
155
156
1806020 100 140
96543
20
60
80
100
7108
40
TA = 25°C
210
120
180
140
0
160
11 12 13 14 15
TA = 85°C
TA = −40°C
TA = 125°C
TJ, maximum die temperature limit 175°C
≈−0.118 mA/°C typ
≈−0.153 mA/°C typ
≈−0.174 mA/°C typ
10987654
40
80
100
60
3
120
140
160
180
21 1112131415
180170
130
135
140
145
150
155
160
140 160
165
170
150 175145 165155 160
NSI50150ADT4G
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5
300 mm2
2 oz Cu
Figure 7. DPAK Thermal Power Dissipation vs.
Ambient Temperature @ TJ = 1755C
TA, AMBIENT TEMPERATURE (°C)
PD, POWER DISSIPATION (mW)
1200
1500
1800
2100
2400
2700
3000
3300
3600
3900
4200
4500
4800
5100
5400
5700
6000
−40 −20 0 20 40 60 80
700 mm2 2 oz
500 mm2 2 oz Cu
500 mm2
1 oz Cu
300 mm2 1 oz Cu
700 mm2 1 oz Cu
1000 mm2 3 oz Cu
400 mm2 MCPCB
NSI50150ADT4G
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6
APPLICATIONS INFORMATION
The CCR is a self biased transistor designed to regulate the
current through itself and any devices in series with it. The
device has a slight negative temperature coefficient, as
shown in Figure 2 – Tri Temp. (i.e. if the temperature
increases the current will decrease). This negative
temperature coefficient will protect the LEDS by reducing
the current as temperature rises.
The CCR turns on immediately and is typically at 20% of
regulation with only 0.5 V across it.
The device is capable of handling voltage for short
durations of up to 50 V so long as the die temperature does
not exceed 175°C. The determination will depend on the
thermal pad it is mounted on, the ambient temperature, the
pulse duration, pulse shape and repetition.
Single LED String
The CCR can be placed in series with LEDs as a High Side
or a Low Side Driver. The number of the LEDs can vary
from one to an unlimited number. The designer needs to
calculate the maximum voltage across the CCR by taking the
maximum input voltage less the voltage across the LED
string (Figures 8 and 9).
Figure 8.
Figure 9.
Higher Current LED Strings
Two or more fixed current CCRs can be connected in
parallel. The current through them is additive (Figure 10).
Figure 10.
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7
Other Currents
The adjustable CCR can be placed in parallel with any
other CCR to obtain a desired current. The adjustable CCR
provides the ability to adjust the current as LED efficiency
increases to obtain the same light output (Figure 11).
Figure 11.
Dimming using PWM
The dimming of an LED string can be easily achieved by
placing a BJT in series with the CCR (Figure 12).
Figure 12.
The method of pulsing the current through the LEDs is
known as Pulse Width Modulation (PWM) and has become
the preferred method of changing the light level. LEDs being
a silicon device, turn on and off rapidly in response to the
current through them being turned on and off. The switching
time is in the order of 100 nanoseconds, this equates to a
maximum frequency of 10 Mhz, and applications will
typically operate from a 100 Hz to 100 kHz. Below 100 Hz
the human eye will detect a flicker from the light emitted
from the LEDs. Between 500 Hz and 20 kHz the circuit may
generate audible sound. Dimming is achieved by turning the
LEDs on and off for a portion of a single cycle. This on/off
cycle is called the Duty cycle (D) and is expressed by the
amount of time the LEDs are on (Ton) divided by the total
time of an on/off cycle (Ts) (Figure 13).
Figure 13.
The current through the LEDs is constant during the period
they are turned on resulting in the light being consistent with
no shift i n chromaticity (color). The b rightness i s in p roportion
to the percentage of time that the LEDs are turned on.
Figure 14 i s a t ypical r esponse o f Luminance v s D uty C ycle.
Figure 14. Luminous Emmitance vs. Duty Cycle
DUTY CYCLE (%) 10
0
908070605040
0
1000
3000
ILLUMINANCE (lx)
2000
30
4000
6000
20100
5000
Lux
Linear
Reducing EMI
Designers creating circuits switching medium to high
currents need to be concerned about Electromagnetic
Interference (EMI). The LEDs and the CCR switch
extremely fast, less than 100 nanoseconds. To help eliminate
EMI, a capacitor can be added to the circuit across R2.
(Figure 12) This will cause the slope on the rising and falling
edge on the current through the circuit to be extended. The
slope of the CCR on/off current can be controlled by the
values of R1 and C1.
The selected delay / slope will impact the frequency that
is selected to operate the dimming circuit. The longer the
delay, the lower the frequency will be. The delay time should
not be less than a 10:1 ratio of the minimum on time. The
frequency is also impacted by the resolution and dimming
NSI50150ADT4G
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8
steps that are required. With a delay of 1.5 microseconds on
the rise and the fall edges, the minimum on time would be
30 microseconds. If the design called for a resolution of 100
dimming steps, then a total duty cycle time (Ts) of 3
milliseconds or a frequency of 333 Hz will be required.
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9
Thermal Considerations
As power in the CCR increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the device has good thermal conductivity through the PCB,
the junction temperature will be relatively low with high
power applications. The maximum dissipation the device
can handle is given by:
PD(MAX) +TJ(MAX) *TA
RqJA
Referring to the thermal table on page 2 the appropriate
RqJA for the circuit board can be selected.
AC Applications
The CCR is a DC device; however , it can be used with full
wave rectified AC as shown in application notes
AND8433/D and AND8492/D and design notes
DN05013/D and DN06065/D. Figure 15 shows the basic
circuit configuration.
Figure 15. Basic AC Application
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
DATE 21 JUL 2015
SCALE 1:1
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
STYLE 5:
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
STYLE 6:
PIN 1. MT1
2. MT2
3. GATE
4. MT2
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
12
3
4
STYLE 8:
PIN 1. N/C
2. CATHODE
3. ANODE
4. CATHODE
STYLE 9:
PIN 1. ANODE
2. CATHODE
3. RESISTOR ADJUST
4. CATHODE
STYLE 10:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. ANODE
b
D
E
b3
L3
L4
b2
M
0.005 (0.13) C
c2
A
c
C
Z
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
D0.235 0.245 5.97 6.22
E0.250 0.265 6.35 6.73
A0.086 0.094 2.18 2.38
b0.025 0.035 0.63 0.89
c2 0.018 0.024 0.46 0.61
b2 0.028 0.045 0.72 1.14
c0.018 0.024 0.46 0.61
e0.090 BSC 2.29 BSC
b3 0.180 0.215 4.57 5.46
L4 −−− 0.040 −−− 1.01
L0.055 0.070 1.40 1.78
L3 0.035 0.050 0.89 1.27
Z0.155 −−− 3.93 −−−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
7. OPTIONAL MOLD FEATURE.
12 3
4
XXXXXX = Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
AYWW
XXX
XXXXXG
XXXXXXG
ALYWW
DiscreteIC
5.80
0.228
2.58
0.102
1.60
0.063
6.20
0.244
3.00
0.118
6.17
0.243
ǒmm
inchesǓ
SCALE 3:1
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer
to device data sheet for actual part
marking.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
H0.370 0.410 9.40 10.41
A1 0.000 0.005 0.00 0.13
L1 0.114 REF 2.90 REF
L2 0.020 BSC 0.51 BSC
A1
H
DETAIL A
SEATING
PLANE
A
B
C
L1
L
H
L2 GAUGE
PLANE
DETAIL A
ROTATED 90 CW5
e
BOTTOM VIEW
Z
BOTTOM VIEW
SIDE VIEW
TOP VIEW
ALTERNATE
CONSTRUCTIONS
NOTE 7
Z
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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DPAK (SINGLE GAUGE)
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