© 2010 Semiconduc tor Component s Indus tries , LLC. Publication Order Number:
December-2017, Rev. 2 FAN53611/D
FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
FAN53601 / FAN53611
6 MHz, 600 mA / 1 A Synchronous Buck Regulator
Features
600 mA or 1 A Output Current Capability
24 µA Typical Quies cent Cur rent
6 MHz Fixed-Frequency Operation
Best-in-Class Load Trans ient Response
Best-in-Class Efficiency
2.3 V to 5.5 V Input Voltage Range
Low Ripple Light-Load PFM Mode
Forc ed PWM and Ex ternal Clock Sync hronization
Internal Soft-Start
Input Under-Voltage Loc kout (UV LO)
Thermal Shutdown and Overload Protection
Optional Output Discharge
6-Bump WLCSP, 0.4 mm Pitc h
Applications
3G, 4 G, WiFi®, WiMA X™, and WiBro® Data Cards
Tablets
DSC, DVC
Netbooks®, Ultra-Mobile PCs
All tr ademar k s ar e the pr oper ty of their r especti ve own er s .
Description
The FAN53601/11 is a 6 MHz, step-down switching voltag e
regulator, av ail ab le in 6 00 mA o r 1 A optio ns, that de liver s a
fixed output from an input voltage supply of 2.3 V to 5.5 V.
Using a proprietary architecture with synchronous
rectification, the FA N53601/11 is capable of delivering a
peak efficiency of 92%, while maintaining efficiency over
80% at load currents as low as 1 mA.
The regulator operates at a nominal fixed frequency of
6 MHz, which reduc es the v alue of the exter na l c o mpon ents
to as low as 470 nH for the output inductor and 4.7 µF for the
output capacitor. In addition, the Pulse Width Modulation
(PWM) modulator can be synchronized to an external
frequency source.
At moderate and light loads, Pulse Frequency Modulation
(PFM) is used to operate the device in Power-Save Mode
with a ty pic al qu iesc ent cur rent of 24 µA. Ev en with suc h a
low quiescent current, the part exhibits excellent transient
response during large load sw ings. At higher loads, the
system automatically switches to fixed-frequency control,
operating at 6 MHz. In Shutdow n Mode, the supply current
drops below 1 µA, reducing power consumption. For
appl ic ations tha t req uire mi ni mu m ripp le or f ixed fr equency ,
PFM Mode c an be disabled us ing the MODE pin.
The FAN53601/11 is available in 6-bu mp, 0.4 mm pitch,
Wafer-Level C hip-Scale Package (WLCSP).
Figure 1. Typical Application
SW
MODE
GND
EN
L1
CIN
2.2µF
470nH
C2
B2
A2
C1
B1
A1
FB
4.7µFCOUT
VIN
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Ordering Information
Part Number
Output
Voltage(1)
Max. Output
Current
Active
Discharge(2)
VIN Package
Temperature
Range Packing
FAN53601AUC10X
1.000 V
600 mA
Yes
5.5 V WLCSP-6,
0.4 mm Pitch -40 to +85° C
Tape and
Reel
FAN53601AUC105X
1.050 V
600 mA
Yes
FAN53611AUC11X
1.100 V
1 A
Yes
FAN53611AUC115X
1.150 V
1 A
Yes
FAN53611AUC13X
1.300 V
1 A
Yes
FAN53611AUC135X
1.350 V
1 A
Yes
FAN53611UC123X
1.233 V
1 A
No
FAN53601UC182X
1.820 V
600 mA
No
FAN53611AUC205X
2.050 V
1 A
Yes
FAN53611AUC123X
1.233 V
1 A
Yes
FAN53611AUC12X
1.200 V
1 A
Yes
FAN53611AUC18X
1.800 V
1 A
Yes
Notes:
1. Other v oltage options available on r equest. Contac t a ON Semiconductor representative.
2. All voltage and output current options are available with or without active discharge. Contact a ON Semiconductor
representative.
Pin Configurations
C1
B1
A1
C2
B2
A2
MODE
SW
FB
VIN
EN
GND
C1
B1
A1
C2
B2
A2MODE
SW
FB
VIN
EN
GND
Figure 2. Bum ps Facing Down Figure 3 . Bum ps Facing Up
Pin Definitions
Pi n # Name Description
A1 MODE
MODE. Logic 1 on this pin f orc es the IC to s tay in PWM Mode. A logic 0 allow s the IC to
automatically s witch to PFM during light loads. The regulator also s ync hronizes its s witching
frequency to four times the fr equency pr ovided on this pin. Do not leave this pin f loating.
B1
SW
Switching N ode. Connect to output inductor.
C1
FB
Feedba c k / V
OUT
. Connect to output voltage.
C2
GND
Ground. Power and IC ground. A ll s ignals ar e refer enced to this pin.
B2 EN
Enable. The dev ic e is in Shutdown Mode w hen voltage to this pin is <
0.4
V and enabled when
> 1.2 V . Do not leave this pin f loating.
A2
VIN
I nput Voltage. Connect to input pow er source.
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Absolute Maximum Ratings
Stres ses ex ceeding the absolute max imu m ratings may da mage the dev ic e. The dev ic e may not f unc tion or be operable above
the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended
expos ure to s tresses above the r ecommended op erating conditi ons may af f ect dev ic e reliability . The absolut e max imum ratin gs
are stress ratings only.
Symbol Parameter Min. Max. Units
V
IN
Input Voltage
-0.3
7.0
V
V
SW
Voltage on SW Pin
-0.3
V
IN
+ 0.3(3)
V
V
CTRL
EN an d MO DE Pi n Voltage
-0.3
V
IN
+ 0.3(3)
V
Other Pins
-0.3
V
IN
+ 0.3(3)
V
ESD Electrostatic Discharge
Protection Level
Human Body Model per JESD22-A114
2.0
kV
Charged Device Model per JESD22-C101
1.5
T
J
Junction Temperature
-40
+150
°C
T
STG
Storage Temperature
-65
+150
°C
T
L
Lead Solder ing Temperatur e, 10 Sec onds
+260
°C
Note:
3. Lesser of 7 V or VIN+0.3 V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating
conditions are s pecified to ens ure optimal performance to the datas heet spec if ications. ON Semic onductor does not recommend
exceeding them or designing to Absolute M axim um R atings.
Symbol
Parameter
Min.
Typ.
Max.
Units
V
CC
Supply V oltage Range
2.3
5.5
V
IOUT
Output Current for FAN53601
0
600
mA
Output Current for FAN53611
0
1
A
L
Inductor
470
nH
C
IN
Input Capacitor
2.2
µF
C
OUT
Output Capacitor
1.6
4.7
12.0
µF
T
A
Operating Ambient Temperature
-40
+85
°C
T
J
Operating Junction Temperature
-40
+125
°C
T he rmal Prope rtie s
Junction-to-a mbient th ermal res is tance is a f unc tion of application and board layout. This data is measur ed with four-layer 2s2p
boards in accordance to JEDEC standard JESD51. Special attention must be paid to not exceed junction temperature TJ(max) at a
gi ven ambient temperature TA.
Symbol Parameter Typical Unit
θJA Junction-to-Ambient Thermal Resistance 125 °C/W
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Elect rical C har acte r istics
Mini mu m an d maxi mu m v alues are at V IN = VEN = 2.3 V to 5.5 V, VMODE = 0 V (AUTO Mode), TA = -40 ° C to +85 ° C; c ir c uit of
Figure 1 , unless otherw ise noted. Typical values are at TA = 25°C, VIN = VEN = 3.6 V.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Power Supplies
IQ Quiescent Current No Load, No t S w itching 24 50 µA
PWM Mode 8 mA
I
(SD)
Shutdown Supply Current
EN = GND, V
IN
= 3.6 V
0.25
1.00
VUVLO Under-V oltage Loc kout Thr eshold Rising VIN 2.15 2.27 V
VUVHYST Under-Voltage Lockout Hysteresis 200 mV
Logi c I nputs: EN a nd MODE Pins
VIH Enable HIGH-Level Input Voltage 1.2 V
V
IL
Enable LOW-Level Input Voltage
0.4
VLHYST Logic Input Hysteresis Voltage 100 mV
IIN Enable Input Leakage Current Pin to VIN or GND 0.01 1.00 µA
Switching and Synchroni zation
fSW Sw itching Frequency(4) VIN = 3.6 V, TA = 25°C, PWM
Mode, ILOAD = 10 mA 5.4 6.0 6.6 MHz
fSYNC MODE Synchronization Range
(4)
Square Wave at MO DE Input 1.3 1.5 1.7 MHz
Regulation
VO Output Voltage
Accuracy
1.000 V ILOAD = 0 to 600 mA 0.953 1.000 1.048
V
PWM Mode 0.967 1.000 1.034
1.35 V
I
LOAD
= 0 to 1 A
1.298
1.350
1.402
PWM mode 1.309 1.350 1.391
1.233 V ILOAD = 0 to 1 A 1.185 1.233 1.281
PWM Mode
1.192
1.233
1.274
1.820 V ILOAD = 0 to 600 mA 1.755 1.820 1.885
PWM Mode 1.781 1.820 1.859
1.100 V
I
LOAD
= 0 to 1 A
1.054
1.100
1.147
PWM Mode 1.061 1.100 1.140
1.300 V ILOAD = 0 to 1 A 1.250 1.300 1.350
PWM Mode
1.259
1.300
1.341
1.150 V ILOAD = 0 to 1 A 1.104 1.150 1.196
PWM Mode 1.110 1.150 1.190
1.050 V ILOAD = 0 to 600 mA 1.003 1.050 1.097
PWM Mode 1.016 1.050 1.084
2.050 V ILOAD = 0 to 1 A, VIN = 2.7 V to
5.5 V 1.973 2.050 2.127
PWM Mode, VIN = 2.7 V to 5.5 V 2.004 2.050 2.096
1.200 V ILOAD = 0 to 1 A 1.152 1.200 1.248
PWM Mode 1.160 1.200 1.240
1.800 V ILOAD = 0 to 1 A 1.732 1.800 1.868
PWM Mode 1.756 1.800 1.844
tSS Soft-Start VIN = 4.5 V, From EN Rising Edge 180 300 µs
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Elect rical C har acte r istics (Continued)
Mini mu m an d maxi mu m v alues are at V IN = V EN = 2.3 V to 5.5 V, VM ODE = 0 V (AUTO Mode), TA = -
40 ° C to +85 ° C; c ir cuit of
Figure 1 , unless otherwise noted. T ypi cal val ues are at T A = 25°C, VIN = VEN = 3.6 V.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Output Driver
RDS(on) PMOS On Res is tance VIN = V GS = 3.6 V 175 m
NMOS On Res is tance
V
IN
= V
GS
= 3.6 V
165
m
ILIM(OL) PMOS Peak Current Limit
Open-Loop for F AN53601,
VIN = 3.6 V, TA = 25°C 900 1100 1250 mA
Open-Loop for FAN53611,
VIN = 3.6 V, TA = 25°C 1500 1750 2000 mA
RDIS Output Discharge Resistance EN = GND 230
T
TSD
Thermal Shutdown
150
THYS Thermal Shutdown Hys teres is 15 °C
Notes:
4. Limited by the effec t of tOFF minimum ( see O per ati o n D esc r ipt io n secti on ) .
5. The Electr ical C har acter istics table r efle cts open-loop data. R efer to the Oper ati o n D esc r ipt io n and Ty pica l C har acter istics Sec t io ns for
closed-loop data.
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Typical P e rformance C har acter istics
U nless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), V OUT = 1.82 V, and TA = 25°C.
70%
75%
80%
85%
90%
95%
0200 400 600 800 1000
Efficiency
Load Current (mA)
2.7 VIN
3.6 VIN
4.2 VIN
5.0 VIN
60%
62%
64%
66%
68%
70%
72%
74%
76%
78%
80%
82%
84%
86%
88%
90%
92%
0200 400 600 800 1000
Efficiency
Load Current (mA)
-40C, AUTO
+25C, AUTO
+85C, AUTO
-40C, PWM
+25C, PWM
+85C, PWM
Figure 4. Efficiency vs . Load Curre nt and
Input Voltage, Auto Mode, Dotted for Decreasing Load Figure 5. Efficiency vs . Load Curre nt
and Temperature, A uto Mode, Dotted for FPW M
64%
66%
68%
70%
72%
74%
76%
78%
80%
82%
84%
86%
88%
90%
0200 400 600 800 1000
Efficiency
Load Current (mA)
2.7 VIN
3.6 VIN
4.2 VIN
5.0 VIN
60%
62%
64%
66%
68%
70%
72%
74%
76%
78%
80%
82%
84%
86%
88%
90%
0200 400 600 800 1000
Efficiency
Load Current (mA)
-40C, AUTO
+25C, AUTO
+85C, AUTO
-40C, PWM
+25C, PWM
+85C, PWM
Figure 6. Efficiency vs . Load Curre nt and
Input Voltage , VOUT = 1.23 V, Auto Mode, Dotte d
for Decreasing Load
Figure 7. Efficiency vs . Load Curre nt
and Temperature, VOUT = 1.23 V, Auto M ode,
Dotted for FP WM
-2
-1
0
1
2
3
0100 200 300 400 500 600
Output R e gula tion ( %)
Load Current (mA)
2.7VIN, AUTO
3.6VIN, AUTO
4.2VIN, AUTO
5.0VIN, AUTO
2.7V IN, PWM
3.6V IN, PWM
4.2V IN, PWM
5.0V IN, PWM
64%
66%
68%
70%
72%
74%
76%
78%
80%
82%
84%
86%
88%
90%
0100 200 300 400 500 600
Efficiency
Load Current (mA)
2.7 VIN
3.6 VIN
4.2 VIN
5.0 VIN
Figure 8. Output Regulation vs. Load Current,
VOUT = 1.00 V, Dotted for Auto Mode Figure 9. Efficiency vs. Load Curr ent, VOUT = 1.00 V,
Dotted for Decreasing Load
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Typical P e rformance C har acter istics (Continued)
Unless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), V OUT = 1.82 V, and TA = 25°C.
-2
-1
0
1
2
3
0200 400 600 800 1000
Output Regulation (%)
Load Current (mA)
2.7VIN, AUTO
3.6VIN, AUTO
4.2VIN, AUTO
5.0VIN, AUTO
2.7VIN, PWM
3.6VIN, PWM
4.2VIN, PWM
5.0VIN, PWM
-2
-1
0
1
2
3
0200 400 600 800 1000
Output Regulation (%)
Load Current (mA)
2.7VIN, AUTO
3.6VIN, AUTO
4.2VIN, AUTO
5.0VIN, AUTO
2.7VIN, PWM
3.6VIN, PWM
4.2VIN, PWM
5.0VIN, PWM
Figure 10. VOUT (%) v s. L oad Current and In put
Voltage, Nor m aliz e d to 3.6 VIN, 500 mA Load, FPWM ,
Dotted for Auto Mode
Figure 11. VOUT (%) vs. Load Current and Input
V oltage , V OUT = 1.23 V, Normalized to 3.6 VIN, 500 mA
Load, FPWM, Dotted for Auto Mode
50
100
150
200
250
300
350
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Load Current (mA)
Input Voltage (V)
PWM
PFM
50
100
150
200
250
300
350
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Load Current (mA)
Input Voltage (V)
PWM
PFM
Figure 12. PFM / PWM Boundary vs. Input Voltage
Figure 13. PFM / PWM Boundary vs. Input Voltage ,
VOUT = 1.23 V
15
20
25
30
35
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Cur rent (µA)
Input Voltage (V)
-40C, EN=VIN
+25 C , EN=VIN
+85 C , EN=VIN
-40C, EN=1.8V
+25C, EN=1.8V
+85C, EN=1.8V
0
3
6
9
12
15
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Current (mA)
Input Voltage (V)
-40C
+25C
+85C
Figure 14. Quies ce nt Curre nt vs. Input V oltage and
Temperature, Auto Mode; EN = VIN Solid, Dotte d for
EN=1. 8 V (-40oC, +25oC, +85oC)
Figure 15. Quies ce nt Curre nt vs. Input V oltage and
Temperature, Mode = EN = VIN (FPWM)
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Typical P e rformance C har acter istics (Continued)
U nless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), V OUT = 1.82 V, and TA = 25°C.
0
5
10
15
20
25
0200 400 600 800 1000
Output Ripple (mVpp)
Load Current (mA)
2.7VIN, AUTO
3.6VIN, AUTO
5.0VIN, AUTO
2.7VIN, PWM
3.6VIN, PWM
5.0VIN, PWM
0
1,500
3,000
4,500
6,000
7,500
0200 400 600 800 1000
Switching Frequency (KHz)
Load Current (mA)
2.7VIN, AUTO
3.6VIN, AUTO
5.0VIN, AUTO
2.7VIN, PWM
3.6VIN, PWM
5.0VIN, PWM
Figure 16. Output Ripple vs. Load Current and
Input Voltage , FPWM, Dotted for Auto Mode
Figure 17. Frequency vs. Load Curre nt and
Input Voltage , Auto Mode , Dotted for FPW M
Figure 18. Load Transient, 10-200-10 m A, 100 ns Edge Figure 19. Load Transient, 200-800-200 mA,
100 ns Edge
Figure 20. Line Tr ans ie nt, 3.3-3.9-3.3 VIN, 10 µs Edge,
36 m A Load Figure 21. Line Transient, 3.3-3.9-3.3 VIN, 10 µs Edge,
600 mA Loa d
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Typical P e rformance C har acter istics (Continued)
U nless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), V OUT = 1.82 V, and TA = 25°C.
Figure 22. Com bine d Line / Load Transient, 3.9-3.3 V
IN
,
10 µs Edge, 36-400 m A Load, 100 ns Edge
Figure 23. Com bine d Line / Load Transient, 3.3-3.9 V
IN
,
10 µs Edge, 400-36 mA Lo ad, 100 ns Edge
Figure 24. Startup, 50 Load Figure 25. Startup, 3 Load
Figure 26. Shutdown, 10k Load, No Output Discharge
Figure 27. Shutdown, No Load, Output Discharge
Enabled
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
T ypical Pe rfor mance Characteristics (Continued)
U nless otherwise noted, VIN = VEN = 3.6 V, VMODE = 0 V (AUTO Mode), V OUT = 1.82 V, and TA = 25°C.
Figure 28. Over-Current, Load Increasing Past
Current Limit, FAN5360 1 Figure 29. 250 m Fault , Rapid Fault,
Hiccup, FAN53601
Figure 30. Over-Cur re nt, Load Increasing Past
Current Limit, FAN5361 1
Figure 31. 250 m Fault, Rapid Fault,
Hiccup, FAN53611
20
30
40
50
60
70
0.1 110 100 1000
PSRR (dB)
Frequency (KHz)
36mA Load
600mA Load
20
30
40
50
60
70
0.1 110 100 1000
PSRR (dB)
Frequency (KHz)
24mA Load
500mA Load
Figure 32. PSRR, 50 and 3 Load Figure 33. PSRR, 50 and 3 Load, VOUT = 1.23 V
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FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Operation Description
The FAN53601/11 is a 6 MHz, step-down switching volta ge
regulator av aila ble i n 6 00 mA o r 1 A o pti ons that deliver s a
fixed output from an input voltage supply of 2.3 V to 5.5 V.
Using a proprietary architecture w ith synchronous
rectification, the FAN53601/11 is capable of delivering a
peak efficiency of 92%, while maintaining efficiency over
80% at load currents as low as 1 mA.
The regulator operates at a nominal fixed frequency of
6 MHz, which reduc es the v alue of the exter na l c o mpo nents
to as low as 470 nH for the output inductor and 4.7 µF for the
output capacitor. In addition, the PWM modulator can be
sy nchr oniz ed to an ex ternal f requenc y s ourc e.
Control S cheme
The FAN53601/11 uses a proprietary, non-linear, fixed-
frequency PWM modulator to deliver a fast load transient
response, while maintaining a constant switching frequency
over a wide range of operating conditions. The regulator
performance is independent of the output capacitor ESR,
allow ing for the use of ceramic output capacitors. Although
this type of operati on normally results in a swi tching frequency
that varies w ith input voltage and load current, an internal
f requency loop holds the switc hing f r equency cons tant ov er a
l arge range of input voltages and load currents.
For very light loads, the FAN53601/11 operates in
Discontinuous Current Mode (DCM) single-pu lse PFM Mode,
w hich pr oduces low output ri pple c o mp ared w ith other PFM
architectures. Transition between PWM and PFM is
seamless, allowing for a smooth transition betw een DCM
and CCM.
Combined w ith exceptional transient response
characteristics, the very low quiescent current of the
controller mai nta ins high eff iciency ; even at ver y lig ht l oads ;
while preserving fast transient response for applications
requiring tight output regulation.
E nable and S oft-Start
When EN is LOW, all circuits are off and the IC draw s
~250 nA of current. When EN is HIGH and VIN is above its
UVLO threshold, the regulator begins a soft-start cycle. The
output ra mp during sof t-s tart is a f ixed s lew r ate of 50 mV/µs
from Vout = 0 to 1 V, then 12.5 mVs until the output reaches
its setpoint. Regardless of the state of the MODE pin, PFM
Mode is enabled to prevent current from being discharged
from COUT if soft-start begins w hen COUT is charged.
In addit ion, a ll voltage options c an be order ed with a f eature
that actively discharges FB to ground through a 230 path
when EN is LOW. Raising EN above its threshold voltage
activates the part and starts the soft-start cycle. During soft-
start, the internal reference is ramped using an exponential
RC s hape to prev ent ov ers hoot of the output voltage. Current
limiting minimizes inrush during soft-start.
The c urrent-l imi t f ault respons e pro tec ts the IC in the ev ent
of an over-current condition present during soft-start. As a
res ult, the IC may f ail to start if heavy loa d is applie d duri ng
startup and/or if ex ces sive COUT is used.
The current required to charge COUT during soft-start
commonly referred to asdisplacement current” is given as:
dt
dV
CI
OUTDISP
=
(1)
where
dt
dV
refers to the soft-start slew rate.
To prev ent shut dow n dur ing s of t-s tart, the f ollowing condition
must be met:
)DC(MAXLOADDISP
I I I <+
(2)
where IMAX(DC) is the maximum load current the IC is
guaranteed to support.
Startup into Larg e COUT
Multiple soft-start cycles are required for no-load startup if
COUT is greater than 15 µF. Large COUT requires light initial
load to ensure the FA N53601/11 s tarts approp riately. The I C
shuts dow n for 1.3 ms w hen IDISP exceeds ILIMIT for more
than 200 µs of current limit. The IC then begins a new soft-
start c yc le. Since COUT retains its charge w hen the IC is o ff,
the IC reaches regulation after multiple soft-start attempts.
MODE Pin
Logic 1 on this pin forces the IC to stay in PWM Mode. A
logic 0 al low s the IC to automatically sw itch to PFM during
light loads. If the MODE pin is toggled w ith a frequency
betw een 1.3 MHz and 1.7 MHz, the converter synchronizes
its sw itching frequency to four times the frequency on the
MODE pin.
The MODE pin is internally buffered w ith a Schmitt trigger,
which all ows the MODE pi n to be drive n w ith slow rise an d
fall times. An asymmetric duty cycle for frequency
synchronization is also permitted as long as the minimum
time below VIL(MAX) or above VIH(MAX) is 100 ns.
Current L imit, Fault S hutdown, and Restart
A heavy load or short circuit on the output causes the current
in the induc tor to incr ease un til a maxi mum current threshold
is r eached in the high-side sw itch. Upon r eachi ng this poi nt,
the high-side sw itch tur ns o ff, prev enting high cur rents fr om
caus ing damage. The reg ulator continues to li mit the c urr ent
cycle-by-cyc le. A fter 16 c yc les of cur rent limit, the reg ulator
triggers an over-current fault, causing the regulator to shut
dow n for about 1.3 ms before attempting a restart.
If the fault is caused by short circuit, the soft-start circuit
attempts to restart and produces an over-current fault after
about 200 µs, w hich results in a duty cycle of less than 15%,
limiting pow er dissipation.
The closed-loop peak-current limit is not the same as the
open-loop tested current limit, ILIM(OL), in the Electrical
Characteristics table. This is primarily due to the effect of
propagation delays of the IC current limit comparator.
Under-Voltag e L ockout (UVLO)
When EN is HIGH, the under-voltage lockout keeps the part
from operating until the input supply voltage rises high
enough to properly operate. This ensures no misbehavior of
the regulator during startup or shutdown.
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12
FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
T herm al Shutd own (TSD)
When the die temperature increases, due to a high load
condition and/or a high ambient temperature; the output
switching is disabled until the die temperature falls sufficiently.
The junction temperature at which the thermal shutdown
activates is nom inally 150°C with a 15°C hysteresis.
Minimum Off-Time Effect on Switching
Frequency
tOFF(MIN) is 40 ns. This impos es c onstr aints on t he maxi mu m
IN
OUT
V
V
that the FAN53601/11 can provide or the maximum
output v oltage it c an prov ide at low VIN w hile maintaining a
fixed switchi ng frequency in PWM Mode.
When VIN is LOW, f ixed switching is mai nta ined as lo ng as :
7.01 )( SWMINOFF
IN
OUT ft
V
V
.
The switching frequency drops when the regulator cannot
prov ide s uf f icient duty c yc le at 6 MHz to mai ntain regul ati on.
This occurs when VOUT is 1.82 V and VIN is below 2.7 V at
high load currents (see Figure 34).
0
1,500
3,000
4,500
6,000
7,500
0200 400 600 800 1000
Switching Frequency (KHz)
Load Current (mA)
2.7VIN, AUTO
2.3VIN, AUTO
2.7VIN, PWM
2.3VIN, PWM
Figure 34. Fre quency vs. Load Curre nt to
Demonstrate tOFFMIN Effect, VIN = 2.3 V and 2.7 V,
VOUT = 1.82 V, Au to Mode, FPWM Dotted
The calculation for switching frequency is given by:
=MHz
t
f
MAXSW
SW
6 ,
1
min
)(
(3)
where:
+
+=
OUTONOUTIN
OFFOUTOUT
MAXSW
VRIV RIV
nst140
)(
(4
)
where:
OFF
R
=
LNDSON DCRR +
_
ON
R
=
LPDSON DCRR +
_
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13
FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
Applications Information
Selecting the Inductor
The o utput ind uctor mus t meet b oth the re quired ind uc tanc e
and the energy-handling capability of the application. The
inductor value affects average current limit, the PWM-to-
PFM trans ition point, output voltage ripple, and ef f ic iency.
The ripple current (∆I) of the regulator is:
SW
OUTIN
IN
OUT
f
LVV
V
V
I
(5)
The maximum average load current, IMAX(LOAD), is related to
the peak c urrent limit, ILIM(PK), by the ripple current, given by:
2I
II
)PK(LIM)LOAD(MAX
=
(6)
The transition betw een PFM and PWM operation is
determined by the point at which the in ductor val ley curr ent
crosses zero. The regulator DC current when the inductor
current crosses zero, IDCM, is:
2I
I
DCM
=
(7)
The FAN53601/11 is opti mized for oper ation with L = 470 nH,
but is stable w ith inductances up to 1 µH (nominal). The
inductor s hould be r ated to mai ntain at least 80% of its v alue
at ILIM(PK).
Efficiency is affected by the inductor DCR and inductance
value. Decr easing the induc tor v alue f or a giv en phys ic al size
typically decreases the DCR; but because I increases, the
R M S current increases, as do the core and skin effect losses.
12
I
I I 2
2
)DC(OUTRMS
+=
(8)
The increased RMS current produces higher losses through
the RDS(ON) of the I C M OSFE Ts, as well as the inductor DCR.
Inc reasi ng the ind uctor value pro duc es lower RMS cur rents ,
but degrades transient response. For a given physical
inductor size, increased inductance usually results in an
inductor w ith lower saturation current and higher DCR.
Table 1 shows the effects of inductance higher or lower than
the rec ommended 1 µH on r egulator performanc e.
Output C apacito r
Table 2 suggests 0402 capacitors. 0603 capacitors may
f urther impr ove perfor manc e in that the ef fective c apacitanc e
i s higher. This improves transient response and output r ipple.
Increasing COUT has no effect on loop stability and can
therefore be increased to reduce output voltage ripple or to
i mprove transient response. Output voltage ripple, VOUT, is:
()
+
=
OUTSW
2
OUTSW
LOUT
Cf8 1
D1D2 ESRCf
IV
(9)
Input C apacit or
The 2.2 µF ceramic input capacitor should be placed as
close as possible between the VIN pin and GND to minimize
the par asitic inductance. If a long wire is used to bring power
to the IC, additionalbulk capacitance (electrolytic or
tantalum) should be placed between CIN and the pow er
source lead to reduce the ringing that can occur between the
inductance of the pow er source leads and CIN.
The ef f ec tive capac itanc e value dec reas es as V IN increases
due to DC bias effects.
Table 1. Effects of Changes in Inductor Value (from 470 nH Recommended Value) on R egulator Performance
I nductor V al ue IMAX(LOAD) VOUT Transi ent Response
Increase
Increase
Decrease
Degraded
Decrease
Decrease
Increase
Improved
Table 2. Rec ommended Passi v e Components and their Variation Due to D C Bias
Component
Description
Vendor
Min.
Typ.
Max.
L1
470 nH,
2012,90 ,
1.1 A
Murata LQM21PNR47MC0
Murata LQM21PNR54MG0
Hitachi Metals HLSI 201210R47 300 nH 470 nH 520 nH
CIN 2.2 µF, 6.3 V,
X5R, 0402 Murata or Equivalent GRM155R60J 225ME15
GRM188R60J225KE19D 1.0 µF 2.2 µF
COUT
4.7 µF, X5R,
0402
Murata or Equivalent GRM155R60G475M
GRM155R60E475ME760 1.6 µF 4.7 µF
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14
FAN53601 / FAN53611 — 6 MHz 600 mA / 1 A Synchronous Buck Regulator
PCB Layout Guidelines
There are only three external components: the inductor and
the input and output capacitors. For any buck switcher IC,
i ncluding the FAN53601/11, it is important to place a low-ESR
input capacitor very close to the IC, as shown in Figure 35.
The input capacitor ensures good input decoupling, which
helps reduce noise appearing at the output terminals and
ensures that the control sections of the IC do not behave
erratically due to excessive noise. This reduces switching
cycle jitter and ensures good overall performance. It is
important to place the common GND of CIN and COUT as close
as possible to the C2 terminal. There is some flexibility in
moving the inductor further aw ay from the IC; in that case,
VOUT should be considered at the COUT terminal.
Figure 35. PCB Layout Guidance
T he followin g inf or mat ion app lies to th e WL CS P package dim ensio ns on th e next pag e:
Product-Specific Dimensions
D E X Y
1.160 ±0.030
0.860 ±0.030
0.230
0.180
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15
FAN53601 / FAN53611 — 6 MHz, 600 mA / 1 A Synchronous Buck Regulator
Physical Dimensions
SEATING PLANE
0.06 C
0.05 C
C
SIDE VIEWS
NOTES:
A. NO JEDEC REGISTRATION APPLIES.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASMEY14.5M, 1994.
D. DATUM C, THE SEATING PLANE IS DEFINED
BY THE SPHERICAL CROWNS OF THE BALLS.
E. PACKAGE TYPICAL HEIGHT IS 586 MICRONS
±39 MICRONS (547-625 MICRONS).
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
G. DRAWING FILENAME: UC006ACrev4.
BOTTOM VIEW
TOP VIEW RECOMMENDED LAND PATTERN
(NSMD PAD TYPE)
E
D
B
A
BALL A1
INDEX AREA A1
0.03 C
2X
0.03 C
2X
0.208±0.021
0.378±0.018
12
A
B
C
0.40
0.40
0.005 C A B
(X) +/-0.018
(Y) +/-0.018
Ø0.260±0.010
0.40
6X
E
D
F
F0.40
(Ø0.20)
Cu Pad
(Ø0.30)
Solder Mask
Opening
F
0.625
0.547
Figure 36. 6-Bump WLCSP, 0.4 mm Pitch
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16
FAN53601 / FAN53611 — 6 MHz, 600 mA / 1 A Synchronous Buck Regulator
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