FDC6561AN
Dual N-Channel Logic Level PowerTrenchTM MOSFET
Features
Absolute Maximum Ratings TA = 25°C unless otherwise note
Symbol Parameter Ratings Units
VDSS Drain-Source Voltage 30 V
VGSS Gate-Source Voltage - Continuous ±20 V
IDDrain Current - Continuous 2.5 A
- Pulsed 10
PDMaximum Power Dissipation (Note 1a) 0.96 W
(Note 1b) 0.9
(Note 1c) 0.7
TJ,TSTG Operating and Storage Temperature Range -55 to 150°C
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 130 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 60 °C/W
Publication Order Number:
FDC6561AN/D
General Description
These N-Channel Logic Level MOSFETs are
produced using ON Semiconductor's advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
low gate charge for superior switching performance.
These devices are well suited for all applications where
small size is desireable but especially low cost DC/DC
conversion in battery powered systems.
2.5 A, 30 V. RDS(ON) = 0.095 Ω @ VGS = 10 V
RDS(ON) = 0.145 Ω @ VGS = 4.5 V
Very fast switching.
Low gate charge (2.1nC typical).
SuperSOTTM-6 package: small footprint (72% smaller than
standard SO-8); low profile (1mm thick).
SOIC-16
SOT-23 SuperSOTTM-8 SO-8 SOT-223SuperSOTTM-6
D1
S2
G1
D2
S1
G2
SuperSOT -6
TM pin 1
.561
1
5
3
2
6
4
© 1999 Semiconductor Components Industries, LLC.
October-2017, Rev. 3
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA30 V
∆BVDSS/∆TJBreakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC23.6 mV/oC
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1µA
TJ = 55 oC10 µA
IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA
ON CHARACTERISTICS (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 11.8 3V
∆VGS(th)/∆TJGate Threshold VoltageTemp.Coefficient ID = 250 µA, Referenced to 25 oC-4 mV/oC
RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 2.5 A 0.082 0.095 Ω
TJ = 125 oC0.122 0.152
VGS = 4.5 V, ID = 2.0 A 0.113 0.145
ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V 10 A
gFS Forward Transconductance VDS = 5 V, ID = 2.5 A 5S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 15 V, VGS = 0 V, 220 pF
Coss Output Capacitance f = 1.0 MHz 50 pF
Crss Reverse Transfer Capacitance 25 pF
SWITCHING CHARACTERISTICS (Note 2)
tD(on)Turn - On Delay Time VDD = 5 V, ID = 1 A, 6 12 ns
trTurn - On Rise Time VGS = 10 V, RGEN = 6 Ω10 18 ns
tD(off) Turn - Off Delay Time 12 22 ns
tfTurn - Off Fall Time 2 6 ns
QgTotal Gate Charge VDS = 15 V, ID = 2.5 A 2.3 3.2 nC
Qgs Gate-Source Charge VGS = 5 V 0.7 1nC
Qgd Gate-Drain Charge 0.9 1.3 nC
DRAIN-SOURCE DIODE CHARACTERISTICS
ISContinuous Source Diode Current 0.75 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.75 A (Note 2)0.78 1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed
by design while RθCA is determined by the user's board design.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
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c. 180OC/W on a minimum pad.
b. 140OC/W on a 0.005 in2 pad of
2oz copper.
a. 130OC/W on a 0.125 in2 pad of
2oz copper.
01234
0
2
4
6
8
10
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
V =10V
GS
3.5V
4.5V
4.0V
DS
D
6.0V
3.0V
0 2 4 6 8 10
0.8
1
1.2
1.4
1.6
1.8
2
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = 4.0V
GS
10V
6.0V
4.5V
D
7.0V
R , NORMALIZED
5.0V
DS(ON)
Typical Electrical Characteristics
Figure 1. On-Region Characteristics.Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
Figure 3. On-Resistance Variation
with Temperature.
Figure 5.Transfer Characteristics.
00.2 0.4 0.6 0.8 11.2 1.4
0.0001
0.001
0.01
0.1
1
10
V , BODY DIODE FORWARD VOLTAGE (V)
I , REVERSE DRAIN CURRENT (A)
T = 125°C
A
25°C
-55°C
V = 0V
GS
SD
S
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
-50 -25 025 50 75 100 125 150
0.6
0.8
1
1.2
1.4
1.6
T , JUNCTION TEMPERATURE (°C)
DRAIN-SOURCE ON-RESISTANCE
J
V = 10 V
GS
I = 2.5 A
D
R , NORMALIZED
DS(ON)
2 4 6 8 10
0.05
0.1
0.15
0.2
0.25
0.3
V , GATE TO SOURCE VOLTAGE (V)
GS
R , ON-RESISTANCE (OHM)
DS(ON)
T = 25°C
A
I = 1.3A
D
T = 125°C
A
1 2 3 4 5 6
0
2
4
6
8
10
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
GS
25°C
125°C
V = 5V
DS
D
T = -55°C
A
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
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Figure 10. Single Pulse Maximum Power
Dissipation.
0.1 0.5 1 2 5 10 30
10
20
50
100
200
500
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C
iss
f = 1 MHz
V = 0V
GS
C
oss
C
rss
Figure 8. Capacitance Characteristics.
Figure 7. Gate Charge Characteristics.
Figure 9. Maximum Safe Operating Area.
Typical Electrical Characteristics (continued)
0 1 2 3 4
0
2
4
6
8
10
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I = 2.5A
D
10V
15V
V = 5V
DS
0.1 0.3 1 3 10 30 50
0.01
0.03
0.1
0.3
1
3
10
30
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
DS
D
RDS(ON) LIMIT
V = 10V
SINGLE PULSE
R =180°C/W
T = 25°C
GS
A
θJA
DC
1s
10ms
100ms
1ms
100us
0.01 0.1 110 100 300
0
1
2
3
4
5
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
R =180°C/W
T = 25°C
A
θJA
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
0.0001 0.001 0.01 0.1 110 100 300
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TIME (sec)
TRANSIENT THERMAL RESISTANCE
1
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
r(t), NORMALIZED EFFECTIVE
Duty Cycle, D = t / t
12
T - T = P * R (t)
θJA
A
J
P(pk)
t
1 t
2
R (t) = r(t) * R
R =180°C/W
θJA
θJA
θJA
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