TABLE OF CONTENTS
Description ................................................................................................................................................................................... 1
Features ....................................................................................................................................................................................... 1
Applications ................................................................................................................................................................................. 1
Block Diagram ............................................................................................................................................................................. 1
5.0 mm x 3.2 mm Package Pinout ............................................................................................................................................... 1
Ordering Information .................................................................................................................................................................... 2
Electrical Characteristics .............................................................................................................................................................. 4
Device Configurations and Pin-outs ........................................................................................................................................... 10
Pin-out Top Views............................................................................................................................................................... 10
Test Circuit Diagrams for LVCMOS and Clipped Sinewave Outputs ......................................................................................... 11
Waveforms ................................................................................................................................................................................. 13
Timing Diagrams ........................................................................................................................................................................ 14
Stability Diagrams ...................................................................................................................................................................... 14
Typical Performance Plots ......................................................................................................................................................... 15
Architecture Overview ................................................................................................................................................................ 19
Frequency Stability ............................................................................................................................................................. 19
Output Frequency and Format ............................................................................................................................................ 19
Output Frequency Tuning ................................................................................................................................................... 19
Pin 1 Configuration (OE, VC, or NC) .................................................................................................................................. 20
Device Configurations ................................................................................................................................................................ 20
TCXO Configuration ........................................................................................................................................................... 20
VCTCXO Configuration ...................................................................................................................................................... 21
DCTCXO Configuration ...................................................................................................................................................... 22
VCTCXO-Specific Design Considerations ................................................................................................................................. 23
Linearity .............................................................................................................................................................................. 23
Control Voltage Bandwidth ................................................................................................................................................. 23
FV Characteristic Slope KV ................................................................................................................................................. 23
Pull Range, Absolute Pull Range ........................................................................................................................................ 24
DCTCXO-Specific Design Considerations ................................................................................................................................. 25
Pull Range and Absolute Pull Range .................................................................................................................................. 25
Output Frequency ............................................................................................................................................................... 26
I2C Control Registers .......................................................................................................................................................... 28
Register Descriptions .......................................................................................................................................................... 28
Register Address: 0x00. Digital Frequency Control Least Significant Word (LSW) ............................................................ 28
Register Address: 0x01. OE Control, Digital Frequency Control Most Significant Word (MSW) ......................................... 29
Register Address: 0x02. DIGITAL PULL RANGE CONTROL[18] ........................................................................................ 30
Serial Interface Configuration Description .......................................................................................................................... 31
Serial Signal Format ........................................................................................................................................................... 31
Parallel Signal Format ........................................................................................................................................................ 32
Parallel Data Format ........................................................................................................................................................... 32
I2C Timing Specification ...................................................................................................................................................... 34
I2C Device Address Modes ................................................................................................................................................. 35
Schematic Example ............................................................................................................................................................ 36
Dimensions and Patterns ........................................................................................................................................................... 37
Layout Guidelines ...................................................................................................................................................................... 38
Manufacturing Guidelines .......................................................................................................................................................... 38
Additional Information ................................................................................................................................................................ 39
Revision History ......................................................................................................................................................................... 40