JM38510/65604BRA - Texas Instruments High-Performance Analog

SN54HC574, SN74HC574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS148F − DECEMBER 1982 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DWide Operating Voltage Range of 2 V to 6 V

DHigh-Current 3-State Noninverting Outputs

Drive Bus Lines Directly or Up To 15 LSTTL

Loads

DLow Power Consumption, 80-μA Max ICC

DTypical tpd = 22 ns

D±6-mA Output Drive at 5 V

DLow Input Current of 1 μA Max

DBus-Structured Pinout

description/ordering information

These octal edge-triggered D-type flip-flops

feature 3-state outputs designed specifically for

bus driving. They are particularly suitable for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

The eight flip-flops enter data on the low-to-high

transition of the clock (CLK) input.

A buffered output-enable (OE) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or the

high-impedance state. In the high-impedance

state, the outputs neither load nor drive the bus

lines significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without interface or pullup components.

ORDERING INFORMATION

TAPACKAGE†ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 20 SN74HC574N SN74HC574N

SOIC DW

Tube of 25 SN74HC574DW

HC574

SOIC − DW Reel of 2000 SN74HC574DWR HC574

40°Cto85°C

SSOP − DB Reel of 2000 SN74HC574DBR HC574

−40°C to 85°CSOP − NS Reel of 2000 SN74HC574NSR HC574

Tube of 70 SN74HC574PW

TSSOP − PW Reel of 2000 SN74HC574PWR HC574

TSSOP

Reel of 250 SN74HC574PWT

HC574

CDIP − J Tube of 20 SNJ54HC574J SNJ54HC574J

−55°C to 125°CCFP − W Tube of 85 SNJ54HC574W SNJ54HC574W

LCCC − FK Tube of 55 SNJ54HC574FK SNJ54HC574FK

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

3212019

910111213

GND

CLK

SN54HC574 . . . FK PACKAGE

(TOP VIEW)

SN54HC574 ...J OR W PACKAGE

SN74HC574 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

GND

VCC

CLK

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

SN54HC574, SN74HC574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS148F − DECEMBER 1982 − REVISED AUGUST 2003

2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description/ordering information (continued)

OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

FUNCTION TABLE

(each flip-flop)

INPUTS OUTPUT

OE CLK D

OUTPUT

L↑H H

L↑LL

LH or L X Q0

H X X Z

logic diagram (positive logic)

CLK

To Seven Other Channels

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, IO (VO = 0 to VCC) ±35 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through VCC or GND ±70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

SN54HC574, SN74HC574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS148F − DECEMBER 1982 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

SN54HC574 SN74HC574

UNIT

MIN NOM MAX MIN NOM MAX UNIT

VCC Supply voltage 2 5 6 2 5 6 V

VCC = 2 V 1.5 1.5

VIH High-level input voltage VCC = 4.5 V 3.15 3.15 V

VIH

High level

input

voltage

VCC = 6 V 4.2 4.2

VCC = 2 V 0.5 0.5

VIL Low-level input voltage VCC = 4.5 V 1.35 1.35 V

VIL

Low level

input

voltage

VCC = 6 V 1.8 1.8

VIInput voltage 0 VCC 0 VCC V

VOOutput voltage 0 VCC 0 VCC V

VCC = 2 V 1000 1000

Δt/ΔvInput transition rise/fall time VCC = 4.5 V 500 500 ns

Δt/Δv

Input

transition

rise/fall

time

VCC = 6 V 400 400

TAOperating free-air temperature −55 125 −40 85 °C

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

TA = 25°C SN54HC574 SN74HC574

UNIT

PARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX MIN MAX UNIT

2 V 1.9 1.998 1.9 1.9

IOH = −20 μA4.5 V 4.4 4.499 4.4 4.4

VOH VI = VIH or VIL

IOH

μA

6 V 5.9 5.999 5.9 5.9 V

VOH

VIH

VIL

IOH = −6 mA 4.5 V 3.98 4.3 3.7 3.84

IOH = −7.8 mA 6 V 5.48 5.8 5.2 5.34

2 V 0.002 0.1 0.1 0.1

IOL = 20 μA4.5 V 0.001 0.1 0.1 0.1

VOL VI = VIH or VIL

IOL

μA

6 V 0.001 0.1 0.1 0.1 V

VOL

VIH

VIL

IOL = 6 mA 4.5 V 0.17 0.26 0.4 0.33

IOL = 7.8 mA 6 V 0.15 0.26 0.4 0.33

IIVI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA

IOZ VO = VCC or 0 6 V ±0.01 ±0.5 ±10 ±5μA

ICC VI = VCC or 0, IO = 0 6 V 8 160 80 μA

Ci2 V to 6 V 3 10 10 10 pF

SN54HC574, SN74HC574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS148F − DECEMBER 1982 − REVISED AUGUST 2003

4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

timing requirements over recommended operating free-air temperature range (unless otherwise

noted)

TA = 25°C SN54HC574 SN74HC574

UNIT

VCC MIN MAX MIN MAX MIN MAX UNIT

2 V 645

fclock Clock frequency 4.5 V 30 20 24 MHz

fclock

Clock

frequency

6 V 38 24 28

MHz

2 V 80 120 100

twPulse duration, CLK high or low 4.5 V 16 24 20 ns

Pulse

duration,

CLK

high

low

6 V 14 20 17

2 V 100 150 125

tsu Setup time, data before CLK↑4.5 V 20 30 25 ns

tsu

Setup

time,

data

before

CLK↑

6 V 17 26 21

2 V 5 5 5

thHold time, data after CLK↑4.5 V 5 5 5 ns

6 V 5 5 5

switching characteristics over recommended operating free-air temperature range, CL = 50 pF

(unless otherwise noted) (see Figure 1)

PARAMETER

FROM TO

TA = 25°C SN54HC574 SN74HC574

UNIT

PARAMETER

FROM

(INPUT)

(OUTPUT) VCC MIN TYP MAX MIN MAX MIN MAX UNIT

2 V 611 4 5

fmax 4.5 V 30 36 20 24 MHz

fmax

6 V 36 40 24 28

MHz

2 V 90 180 270 225

dCLK Any Q 4.5 V 28 36 54 45 ns

tpd

CLK

Any

6 V 24 31 46 38

2 V 77 150 225 190

ten OE Any Q 4.5 V 26 30 45 38 ns

ten

Any

6 V 23 26 38 32

2 V 52 150 225 190

tdis OE Any Q 4.5 V 24 30 45 38 ns

tdis

Any

6 V 22 26 38 32

2 V 28 60 90 75

ttAny Q 4.5 V 8 12 18 15 ns

6 V 6 10 15 13

SN54HC574, SN74HC574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS148F − DECEMBER 1982 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

switching characteristics over recommended operating free-air temperature range, CL = 150 pF

(unless otherwise noted) (see Figure 1)

PARAMETER

FROM TO

TA = 25°C SN54HC574 SN74HC574

UNIT

PARAMETER

FROM

(INPUT)

(OUTPUT) VCC MIN TYP MAX MIN MAX MIN MAX UNIT

2 V 6 5

fmax 4.5 V 30 24 MHz

fmax

6 V 36 28

MHz

2 V 105 265 400 330

dCLK Any Q 4.5 V 36 53 80 66 ns

tpd

CLK

Any

6 V 31 46 68 57

2 V 95 235 355 295

ten OE Any Q 4.5 V 32 47 71 59 ns

ten

Any

6 V 28 41 60 51

2 V 60 210 315 265

ttAny Q 4.5 V 17 42 63 53 ns

6 V 14 36 53 45

operating characteristics, TA = 25°C

PARAMETER TEST CONDITIONS TYP UNIT

Cpd Power dissipation capacitance per flip-flop No load 100 pF

SN54HC574, SN74HC574

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCLS148F − DECEMBER 1982 − REVISED AUGUST 2003

6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

VOLTAGE WAVEFORMS

SETUP AND HOLD AND INPUT RISE AND FALL TIMES

VOLTAGE WAVEFORMS

PULSE DURATIONS

tsu

50%

50%50% 10%10%

90% 90%

VCC

0 V

trtf

Reference

Input

Data

Input

50%

High-Level

Pulse 50%

VCC

0 V

50% 50%

VCC

0 V

Low-Level

Pulse

VOLTAGE WAVEFORMS

PROPAGATION DELAY AND OUTPUT TRANSITION TIMES

50%

50%50% 10%10%

90% 90%

VCC

VOH

VOL

0 V

trtf

Input

In-Phase

Output

50%

tPLH tPHL

50% 50%

10% 10%

90%90% VOH

VOL

tPHL tPLH

Out-of-

Phase

Output

50%

10%

90%

VCC

≈VCC

VOL

0 V

Output

Control

(Low-Level

Enabling)

Output

Waveform 1

(See Note B)

50%

tPZL tPLZ

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS

VOH

≈0 V

50%

tPZH tPHZ

Output

Waveform 2

(See Note B)

≈VCC

Test

Point

From Output

Under Test

VCC

LOAD CIRCUIT

PARAMETER CL

tPZH

tpd or tt

tdis

ten tPZL

tPHZ

tPLZ

1 kΩ

50 pF

150 pF

50 pF

Open Closed

RLS1

Closed Open

Open Closed

Closed Open

50 pF

150 pF

Open Open−−

NOTES: A. CL includes probe and test-fixture capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following

characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.

D. For clock inputs, fmax is measured when the input duty cycle is 50%.

E. The outputs are measured one at a time with one input transition per measurement.

F. tPLZ and tPHZ are the same as tdis.

G. tPZL and tPZH are the same as ten.

H. tPLH and tPHL are the same as tpd.

(see Note A)

Figure 1. Load Circuit and Voltage Waveforms

PACKAGE OPTION ADDENDUM

www.ti.com 18-Oct-2013

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

JM38510/65604BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/

65604BRA

M38510/65604BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/

65604BRA

SN54HC574J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54HC574J

SN74HC574DBR ACTIVE SSOP DB 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574DW ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574DWE4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574DWG4 ACTIVE SOIC DW 20 25 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574DWR ACTIVE SOIC DW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574DWRE4 OBSOLETE SOIC DW 20 TBD Call TI Call TI -40 to 85

SN74HC574DWRG4 OBSOLETE SOIC DW 20 TBD Call TI Call TI -40 to 85 HC574

SN74HC574N ACTIVE PDIP N 20 20 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC574N

SN74HC574N3 OBSOLETE PDIP N 20 TBD Call TI Call TI -40 to 85

SN74HC574NE4 ACTIVE PDIP N 20 20 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 SN74HC574N

SN74HC574NSR ACTIVE SO NS 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574NSRG4 ACTIVE SO NS 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574PW ACTIVE TSSOP PW 20 70 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

PACKAGE OPTION ADDENDUM

www.ti.com 18-Oct-2013

Addendum-Page 2

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

SN74HC574PWE4 ACTIVE TSSOP PW 20 70 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574PWG4 ACTIVE TSSOP PW 20 70 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574PWR ACTIVE TSSOP PW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574PWT ACTIVE TSSOP PW 20 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574PWTE4 ACTIVE TSSOP PW 20 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SN74HC574PWTG4 ACTIVE TSSOP PW 20 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 HC574

SNJ54HC574FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54HC

574FK

SNJ54HC574J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54HC574J

SNJ54HC574W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 SNJ54HC574W

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

PACKAGE OPTION ADDENDUM

www.ti.com 18-Oct-2013

Addendum-Page 3

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF SN54HC574, SN74HC574 :

•Catalog: SN74HC574

•Military: SN54HC574

NOTE: Qualified Version Definitions:

•Catalog - TI's standard catalog product

•Military - QML certified for Military and Defense Applications

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

SN74HC574DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1

SN74HC574DWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.0 Q1

SN74HC574NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1

SN74HC574PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1

SN74HC574PWRG4 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1

SN74HC574PWT TSSOP PW 20 250 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jul-2013

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

SN74HC574DBR SSOP DB 20 2000 367.0 367.0 38.0

SN74HC574DWR SOIC DW 20 2000 366.0 364.0 50.0

SN74HC574NSR SO NS 20 2000 367.0 367.0 45.0

SN74HC574PWR TSSOP PW 20 2000 364.0 364.0 27.0

SN74HC574PWRG4 TSSOP PW 20 2000 367.0 367.0 38.0

SN74HC574PWT TSSOP PW 20 250 367.0 367.0 38.0

PACKAGE MATERIALS INFORMATION

www.ti.com 5-Jul-2013

Pack Materials-Page 2

MECHANICAL DATA

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE

4040065 /E 12/01

28 PINS SHOWN

Gage Plane

8,20

7,40

0,55

0,95

0,25

12,90

12,30

10,50

8,50

Seating Plane

9,907,90

10,50

9,90

0,38

5,60

5,00

0,22

2016

6,50

0,05 MIN

5,905,90

DIM

A MAX

A MIN

PINS **

2,00 MAX

6,90

7,50

0,65 M

0,15

0°–ā8°

0,10

0,09

0,25

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-150

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