ADUM242D0BRWZ-RL - ANALOG DEVICES

5.0 kV rms Quad Digital Isolators

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support www.analog.com

FEATURES

High common-mode transient immunity: 100 kV/μs

High robustness to radiated and conducted noise

Low propagation delay

13 ns maximum for 5 V operation

15 ns maximum for 1.8 V operation

150 Mbps maximum guaranteed data rate

Safety and regulatory approvals

UL recognition: 5000 V rms for 1 minute per UL 1577

CSA Component Acceptance Notice 5A

VDE certificate of conformity

DIN V VDE V 0884-10 (VDE V 0884-10):2006-12

VIORM = 849 V peak

8000 V peak reinforced surge isolation voltage

CQC certification per GB4943.1-2011

Backward compatibility

ADuM240E1/ADuM241E1/ADuM242E1 pin compatible

with ADuM2400/ADuM2401/ADuM2402

Low dynamic power consumption

1.8 V to 5 V level translation

High temperature operation: 125°C

Fail-safe high or low options

16-lead, RoHS compliant, SOIC package

Qualified for automotive applications

APPLICATIONS

General-purpose multichannel isolation

Serial peripheral interface (SPI)/data converter isolation

Industrial field bus isolation

GENERAL DESCRIPTION

The ADuM240D/ADuM240E/ADuM241D/ADuM241E/

ADuM242D/ADuM242E1 are quad-channel digital isolators

based on Analog Devices, Inc., iCoupler® technology. Combining

high speed, complementary metal-oxide semiconductor (CMOS)

and monolithic air core transformer technology, these isolation

components provide outstanding performance characteristics

superior to alternatives such as optocoupler devices and other

integrated couplers. The maximum propagation delay is 13 ns

with a pulse width distortion of less than 3 ns at 5 V operation.

Channel matching is tight at 3.0 ns maximum.

The ADuM240D/ADuM240E/ADuM241D/ADuM241E/

ADuM242D/ADuM242E data channels are independent and

are available in a variety of configurations with a withstand

voltage rating of 5.0 kV rms (see the Ordering Guide). The

devices operate with the supply voltage on either side ranging

from 1.8 V to 5 V, providing compatibility with lower voltage

FUNCTIONAL BLOCK DIAGRAMS

ENCODE DECODE

DD1

GND

DISABLE

/NIC

GND

DD2

GND

ADuM240D/ADuM240E

NIC/V

GND

NOTES

1. NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.

2. PIN 7 IS DISABLE

AND PIN 10 IS NIC FOR THE ADuM240D, AND

PIN 7 IS NIC AND PIN 10 IS V

FOR THE ADuM240E.

13576-101

Figure 1. ADuM240D/ADuM240E Functional Block Diagram

DECODE ENCODE

ENCODE DECODE

DD1

GND

DISABLE

GND

DD2

GND

ADuM241D/ADuM241E

DISABLE

GND

NOTES

1. PIN 7 IS DISABLE

AND PIN 10 IS DISABLE

FOR THE ADuM241D,

AND PIN 7 IS V

AND PIN 10 IS V

FOR THE ADuM241E.

13576-102

Figure 2. ADuM241D/ADuM241E Functional Block Diagram

DECODE ENCODE

ENCODE DECODE

DD1

GND

DISABLE

GND

DD2

GND

ADuM242D/ADuM242E

DISABLE

GND

NOTES

1. PIN 7 IS DISABLE

AND PIN 10 IS DISABLE

FOR THE ADuM242D,

AND PIN 7 IS V

AND PIN 10 IS V

FOR THE ADuM242E.

13576-103

Figure 3. ADuM242D/ADuM242E Functional Block Diagram

systems as well as enabling voltage translation functionality

across the isolation barrier.

Unlike other optocoupler alternatives, dc correctness is ensured in

the absence of input logic transitions. Two different fail-safe options

are available, by which the outputs transition to a predetermined

state when the input power supply is not applied or the inputs are

disabled. The ADuM240E1/ADuM241E1/ ADuM242E1 are pin

compatible with the ADuM2400/ ADuM2401/ADuM2402.

1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 2 of 26

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagrams ............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Characteristics—5 V Operation................................ 3

Electrical Characteristics—3.3 V Operation ............................ 5

Electrical Characteristics—2.5 V Operation ............................ 7

Electrical Characteristics—1.8 V Operation ............................ 9

Insulation and Safety Related Specifications .......................... 11

Package Characteristics ............................................................. 11

Regulatory Information ............................................................. 12

DIN V VDE V 0884-10 (VDE V 0884-10) Insulation

Characteristics ............................................................................ 13

Recommended Operating Conditions .................................... 13

Absolute Maximum Ratings ......................................................... 14

ESD Caution................................................................................ 14

Pin Configurations and Function Descriptions ......................... 16

Typical Performance Characteristics ........................................... 19

Theory of Operation ...................................................................... 21

Applications Information .............................................................. 22

PCB Layout ................................................................................. 22

Propagation Delay Related Parameters ................................... 22

Jitter Measurement ..................................................................... 22

Insulation Lifetime ..................................................................... 22

Outline Dimensions ....................................................................... 24

Ordering Guide .......................................................................... 24

Automotive Products ................................................................. 26

REVISION HISTORY

11/2018—Rev. C to Rev. D

Changes to Table 12 and Table 13 ................................................ 12

4/2018—Rev. B to Rev. C

Change to Features Section ............................................................. 1

Changes to Table 12 and Table 13 ................................................ 12

Changes to Ordering Guide .......................................................... 24

Changes to Automotive Products Section ................................... 26

3/2018—Rev. A to Rev. B

Updated Outline Dimensions ....................................................... 24

Changes to Ordering Guide .......................................................... 24

Change to Automotive Products Section .................................... 26

4/2016—Rev. 0 to Rev. A

Added RI-16-2 .................................................................... Universal

Changes to Features Section ............................................................ 1

Changes to Table 1 ............................................................................. 3

Changes to Table 3 ............................................................................. 5

Changes to Table 5 ............................................................................. 7

Changes to Table 7 ............................................................................. 9

Added Table 10; Renumbered Sequentially ................................ 11

Added Table 13 ............................................................................... 12

Added Table 18 ............................................................................... 14

Updated Outline Dimensions ....................................................... 23

Added Figure 26 ............................................................................. 24

Changes to Ordering Guide .......................................................... 24

Added Automotive Products Section .......................................... 26

9/2015—Revision 0: Initial Version

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 3 of 26

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V OPERATION

All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended

operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications

are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.

Table 1.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

SWITCHING SPECIFICATIONS

Pulse Width PW 6.6 ns Within pulse width distortion (PWD) limit

Data Rate1 150 Mbps Within PWD limit

Propagation Delay tPHL, tPLH 4.8 7.2 13 ns 50% input to 50% output

Pulse Width Distortion PWD 0.5 3 ns |tPLH − tPHL|

Change vs. Temperature 1.5 ps/°C

Propagation Delay Skew tPSK 6.1 ns Between any two units at the

same temperature, voltage, and load

Channel Matching

Codirectional tPSKCD 0.5 3.0 ns

Opposing Direction tPSKOD 0.5 3.0 ns

Jitter 490 ps p-p See the Jitter Measurement section

70 ps rms See the Jitter Measurement section

DC SPECIFICATIONS

Input Threshold Voltage

Logic High VIH 0.7 × VDDx V

Logic Low VIL 0.3 × VDDx V

Output Voltage

Logic High VOH V

DDx − 0.1 VDDx V IOx2 = −20 μA, VIx = VIxH3

DDx − 0.4 VDDx − 0.2 V IOx2 = −4 mA, VIx = VIxH3

Logic Low VOL 0.0 0.1 V IOx2 = 20 μA, VIx = VIxL4

0.2 0.4 V IOx2 = 4 mA, VIx = VIxL4

Input Current per Channel II −10 +0.01 +10 μA 0 V ≤ VIx ≤ VDDx

VE2 Enable Input Pull-Up Current IPU −10 −3 μA VE2 = 0 V

DISABLE1 Input Pull-Down Current IPD 9 15 μA DISABLE1 = VDDx

Tristate Output Current per Channel IOZ −10 +0.01 +10 μA 0 V ≤ VOx ≤ VDDx

Quiescent Supply Current

ADuM240D/ADuM240E

DD1 (Q) 1.2 2.2 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 2.0 2.72 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 12.0 20.0 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 2.0 2.92 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

ADuM241D/ADuM241E

DD1 (Q) 1.6 2.46 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 1.9 2.62 mA VI5 = 0(E0, D0), 1 (E1, D1)6

DD1 (Q) 10.0 17.0 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 6.0 10.0 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

ADuM242D/ADuM242E

DD1 (Q) 1.6 2.46 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 1.6 2.46 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 7.0 11.5 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 7.0 11.5 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

Dynamic Supply Current

Dynamic Input IDDI (D) 0.01 mA/Mbps Inputs switching, 50% duty cycle

Dynamic Output IDDO (D) 0.02 mA/Mbps Inputs switching, 50% duty cycle

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 4 of 26

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

Undervoltage Lockout UVLO

Positive VDDx Threshold VDDxUV+ 1.6 V

Negative VDDx Threshold VDDxUV− 1.5 V

VDDx Hysteresis VDDxUVH 0.1 V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%

Common-Mode Transient Immunity7 |CMH| 75 100 kV/μs VIx = VDDx, VCM = 1000 V,

transient magnitude = 800 V

|CML| 75 100 kV/μs VIx = 0 V, VCM = 1000 V,

transient magnitude = 800 V

1 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible.

2 IOx is the Channel x output current, where x = A, B, C, or D.

3 VIxH is the input side logic high.

4 VIxL is the input side logic low.

5 VI is the voltage input.

6 E0 is the ADuM240E0/ADuM241E0/ADuM242E0 models, D0 is the ADuM240D0/ADuM241D0/ADuM242D0 models, E1 is the ADuM240E1/ADuM241E1/ADuM242E1

models, and D1 is the ADuM240D1/ADuM241D1/ADuM242D1 models. See the Ordering Guide section.

7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum common-

mode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode

voltage edges.

Table 2. Total Supply Current vs. Data Throughput

1 Mbps 25 Mbps 100 Mbps

Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit

SUPPLY CURRENT

ADuM240D/ADuM240E

Supply Current Side 1 IDD1 6.8 10 7.8 12 11.8 17.4 mA

Supply Current Side 2 IDD2 2.1 3.7 3.9 5.7 9.2 13 mA

ADuM241D/ADuM241E

Supply Current Side 1 IDD1 5.8 10.3 7.0 10.9 11.4 15.9 mA

Supply Current Side 2 IDD2 4.0 6.85 5.5 8.5 10.3 14.0 mA

ADuM242D/ADuM242E

Supply Current Side 1 IDD1 4.3 7.7 6.0 9.3 10.3 14.2 mA

Supply Current Side 2 IDD2 5.3 8.7 6.7 10.1 11.0 14.9 mA

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 5 of 26

ELECTRICAL CHARACTERISTICS—3.3 V OPERATION

All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended

operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications

are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.

Table 3.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

SWITCHING SPECIFICATIONS

Pulse Width PW 6.6 ns Within PWD limit

Data Rate1 150 Mbps Within PWD limit

Propagation Delay tPHL, tPLH 4.8 6.8 14 ns 50% input to 50% output

Pulse Width Distortion PWD 0.7 3 ns |tPLH − tPHL|

Change vs. Temperature 1.5 ps/°C

Propagation Delay Skew tPSK 7.5 ns Between any two units at the same

temperature, voltage, and load

Channel Matching

Codirectional tPSKCD 0.7 3.0 ns

Opposing Direction tPSKOD 0.7 3.0 ns

Jitter 580 ps p-p See the Jitter Measurement section

120 ps rms See the Jitter Measurement section

DC SPECIFICATIONS

Input Threshold Voltage

Logic High VIH 0.7 × VDDx V

Logic Low VIL 0.3 × VDDx V

Output Voltage

Logic High VOH V

DDx − 0.1 VDDx V IOx2 = −20 μA, VIx = VIxH3

DDx − 0.4 VDDx − 0.2 V IOx2 = −2 mA, VIx = VIxH3

Logic Low VOL 0.0 0.1 V IOx2 = 20 μA, VIx = VIxL4

0.2 0.4 V IOx2 = 2 mA, VIx = VIxL4

Input Current per Channel II −10 +0.01 +10 μA 0 V ≤ VIx ≤ VDDx

VE2 Enable Input Pull-Up Current IPU −10 −3 μA VE2 = 0 V

DISABLE1 Input Pull-Down Current IPD 9 15 μA DISABLE1 = VDDx

Tristate Output Current per Channel IOZ −10 +0.01 +10 μA 0 V ≤ VOx ≤ VDDx

Quiescent Supply Current

ADuM240D/ADuM240E

DD1 (Q) 1.2 2.12 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 2.0 2.68 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 12.0 19.6 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 2.0 2.8 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

ADuM241D/ADuM241E

DD1 (Q) 1.5 2.36 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 1.8 2.52 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 9.8 16.7 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 5.7 9.7 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

ADuM242D/ADuM242E

DD1 (Q) 1.6 2.4 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 1.6 2.4 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 7.0 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 7.0 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

Dynamic Supply Current

Dynamic Input IDDI (D) 0.01 mA/Mbps Inputs switching, 50% duty cycle

Dynamic Output IDDO (D) 0.01 mA/Mbps Inputs switching, 50% duty cycle

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 6 of 26

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

Undervoltage Lockout UVLO

Positive VDDx Threshold VDDxUV+ 1.6 V

Negative VDDx Threshold VDDxUV− 1.5 V

VDDx Hysteresis VDDxUVH 0.1 V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%

Common-Mode Transient Immunity7 |CMH| 75 100 kV/μs VIx = VDDx, VCM = 1000 V,

transient magnitude = 800 V

|CML| 75 100 kV/μs VIx = 0 V, VCM = 1000 V,

transient magnitude = 800 V

1 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible.

2 IOx is the Channel x output current, where x = A, B, C, or D.

3 VIxH is the input side logic high.

4 VIxL is the input side logic low.

5 VI is the voltage input.

6 E0 is the ADuM240E0/ADuM241E0/ADuM242E0 models, D0 is the ADuM240D0/ADuM241D0/ADuM242D0 models, E1 is the ADuM240E1/ADuM241E1/ADuM242E1

models, and D1 is the ADuM240D1/ADuM241D1/ADuM242D1 models. See the Ordering Guide section.

7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum common-

mode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode

voltage edges.

Table 4. Total Supply Current vs. Data Throughput

1 Mbps 25 Mbps 100 Mbps

Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit

SUPPLY CURRENT

ADuM240D/ADuM240E

Supply Current Side 1 IDD1 6.6 9.8 7.4 11.2 10.7 15.9 mA

Supply Current Side 2 IDD2 2.0 3.7 3.5 5.5 8.2 11.6 mA

ADuM241D/ADuM241E

Supply Current Side 1 IDD1 5.65 10.1 6.65 10.5 10.4 14.9 mA

Supply Current Side 2 IDD2 3.9 6.65 5.2 8.0 9.4 12.8 mA

ADuM242D/ADuM242E

Supply Current Side 1 IDD1 4.3 7.7 5.6 9.0 9.1 13 mA

Supply Current Side 2 IDD2 5.0 8.4 6.2 9.6 9.8 13.7 mA

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 7 of 26

ELECTRICAL CHARACTERISTICS—2.5 V OPERATION

All typical specifications are at TA = 25°C, VDD1 = VDD2 = 2.5 V. Minimum/maximum specifications apply over the entire recommended

operation range: 2.25 V ≤ VDD1 ≤ 2.75 V, 2.25 V ≤ VDD2 ≤ 2.75 V, −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications

are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.

Table 5.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

SWITCHING SPECIFICATIONS

Pulse Width PW 6.6 ns Within PWD limit

Data Rate1 150 Mbps Within PWD limit

Propagation Delay tPHL, tPLH 5.0 7.0 14 ns 50% input to 50% output

Pulse Width Distortion PWD 0.7 3 ns |tPLH − tPHL|

Change vs. Temperature 1.5 ps/°C

Propagation Delay Skew tPSK 6.8 ns Between any two units at the same

temperature, voltage, and load

Channel Matching

Codirectional tPSKCD 0.7 3.0 ns

Opposing Direction tPSKOD 0.7 3.0 ns

Jitter 800 ps p-p See the Jitter Measurement section

190 ps rms See the Jitter Measurement section

DC SPECIFICATIONS

Input Threshold Voltage

Logic High VIH 0.7 × VDDx V

Logic Low VIL 0.3 × VDDx V

Output Voltage

Logic High VOH V

DDx − 0.1 VDDx V IOx2 = −20 μA, VIx = VIxH3

DDx − 0.4 VDDx − 0.2 V IOx2 = −2 mA, VIx = VIxH3

Logic Low VOL 0.0 0.1 V IOx2 = 20 μA, VIx = VIxL4

0.2 0.4 V IOx2 = 2 mA, VIx = VIxL4

Input Current per Channel II −10 +0.01 +10 μA 0 V ≤ VIx ≤ VDDx

VE2 Enable Input Pull-Up Current IPU −10 −3 μA VE2 = 0 V

DISABLE1 Input Pull-Down Current IPD 9 15 μA DISABLE1 = VDDx

Tristate Output Current per Channel IOZ −10 +0.01 +10 μA 0 V ≤ VOx ≤ VDDx

Quiescent Supply Current

ADuM240D/ADuM240E

DD1 (Q) 1.2 2.0 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 2.0 2.64 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 1.2 19.6 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 2.0 2.76 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

ADuM241D/ADuM241E

DD1 (Q) 1.46 2.32 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 1.75 2.47 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 9.7 16.6 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 5.67 9.67 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

ADuM242D/ADuM242E

DD1 (Q) 1.6 2.32 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 1.6 2.32 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 7.0 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 7.0 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

Dynamic Supply Current

Dynamic Input IDDI (D) 0.01 mA/Mbps Inputs switching, 50% duty cycle

Dynamic Output IDDO (D) 0.01 mA/Mbps Inputs switching, 50% duty cycle

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 8 of 26

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

Undervoltage Lockout

Positive VDDx Threshold VDDxUV+ 1.6 V

Negative VDDx Threshold VDDxUV− 1.5 V

VDDx Hysteresis VDDxUVH 0.1 V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%

Common-Mode Transient Immunity7 |CMH| 75 100 kV/μs VIx = VDDx, VCM = 1000 V,

transient magnitude = 800 V

|CML| 75 100 kV/μs VIx = 0 V, VCM = 1000 V,

transient magnitude = 800 V

1 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible.

2 IOx is the Channel x output current, where x = A, B, C, or D.

3 VIxH is the input side logic high.

4 VIxL is the input side logic low.

5 VI is the voltage input.

6 E0 is the ADuM240E0/ADuM241E0/ADuM242E0 models, D0 is the ADuM240D0/ADuM241D0/ADuM242D0 models, E1 is the ADuM240E1/ADuM241E1/ADuM242E1

models, and D1 is the ADuM240D1/ADuM241D1/ADuM242D1 models. See the Ordering Guide section.

7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum common-

mode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode

voltage edges.

Table 6. Total Supply Current vs. Data Throughput

1 Mbps 25 Mbps 100 Mbps

Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit

SUPPLY CURRENT

ADuM240D/ADuM240E

Supply Current Side 1 IDD1 6.5 9.8 7.3 11.1 10.4 15.5 mA

Supply Current Side 2 IDD2 2.0 3.6 3.3 5.2 7.3 10.2 mA

ADuM241D/ADuM241E

Supply Current Side 1 IDD1 5.6 10.0 6.4 10.4 9.7 14.5 mA

Supply Current Side 2 IDD2 3.8 6.55 4.8 7.7 8.3 11.5 mA

ADuM242D/ADuM242E

Supply Current Side 1 IDD1 4.3 7.7 5.4 8.8 8.8 12.7 mA

Supply Current Side 2 IDD2 5.0 8.4 6.1 9.5 9.5 13.4 mA

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 9 of 26

ELECTRICAL CHARACTERISTICS—1.8 V OPERATION

All typical specifications are at TA = 25°C, VDD1 = VDD2 = 1.8 V. Minimum/maximum specifications apply over the entire recommended

operation range: 1.7 V ≤ VDD1 ≤ 1.9 V, 1.7 V ≤ VDD2 ≤ 1.9 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications

are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.

Table 7.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

SWITCHING SPECIFICATIONS

Pulse Width PW 6.6 ns Within PWD limit

Data Rate1 150 Mbps Within PWD limit

Propagation Delay tPHL, tPLH 5.8 8.7 15 ns 50% input to 50% output

Pulse Width Distortion PWD 0.7 3 ns |tPLH − tPHL|

Change vs. Temperature 1.5 ps/°C

Propagation Delay Skew tPSK 7.0 ns

Between any two units at the same

temperature, voltage, and load

Channel Matching

Codirectional tPSKCD 0.7 3.0 ns

Opposing Direction tPSKOD 0.7 3.0 ns

Jitter 470 ps p-p See the Jitter Measurement section

70 ps rms See the Jitter Measurement section

DC SPECIFICATIONS

Input Threshold Voltage

Logic High VIH 0.7 × VDDx V

Logic Low VIL 0.3 × VDDx V

Output Voltage

Logic High VOH V

DDx − 0.1 VDDx V IOx2 = −20 μA, VIx = VIxH3

DDx − 0.4 VDDx − 0.2 V IOx2 = −2 mA, VIx = VIxH3

Logic Low VOL 0.0 0.1 V IOx2 = 20 μA, VIx = VIxL4

0.2 0.4 V IOx2 = 2 mA, VIx = VIxL4

Input Current per Channel II −10 +0.01 +10 μA 0 V ≤ VIx ≤ VDDx

VE2 Enable Input Pull-Up Current IPU −10 −3 μA VE2 = 0 V

DISABLE1 Input Pull-Down Current IPD 9 15 μA DISABLE1 = VDDx

Tristate Output Current per Channel IOZ −10 +0.01 +10 μA 0 V ≤ VOx ≤ VDDx

Quiescent Supply Current

ADuM240D/ADuM240E

DD1 (Q) 1.2 1.92 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 2.0 2.64 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 12.0 19.6 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 2.0 2.76 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

ADuM241D/ADuM241E

DD1 (Q) 1.4 2.28 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 1.73 2.45 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 9.6 16.5 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 5.6 9.6 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

ADuM242D/ADuM242E

DD1 (Q) 1.6 2.28 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD2 (Q) 1.6 2.28 mA VI5 = 0 (E0, D0), 1 (E1, D1)6

DD1 (Q) 7.0 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

DD2 (Q) 7.0 11.2 mA VI5 = 1 (E0, D0), 0 (E1, D1)6

Dynamic Supply Current

Dynamic Input IDDI (D) 0.01 mA/Mbps Inputs switching, 50% duty cycle

Dynamic Output IDDO (D) 0.01 mA/Mbps Inputs switching, 50% duty cycle

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 10 of 26

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

Undervoltage Lockout UVLO

Positive VDDx Threshold VDDxUV+ 1.6 V

Negative VDDx Threshold VDDxUV− 1.5 V

VDDx Hysteresis VDDxUVH 0.1 V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%

Common-Mode Transient Immunity7 |CMH| 75 100 kV/μs VIx = VDDx, VCM = 1000 V,

transient magnitude = 800 V

|CML| 75 100 kV/μs VIx = 0 V, VCM = 1000 V,

transient magnitude = 800 V

1 150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible.

2 IOx is the Channel x output current, where x = A, B, C, or D.

3 VIxH is the input side logic high.

4 VIxL is the input side logic low.

5 VI is the voltage input.

6 E0 is the ADuM240E0/ADuM241E0/ADuM242E0 models, D0 is the ADuM240D0/ADuM241D0/ADuM242D0 models, E1 is the ADuM240E1/ADuM241E1/ADuM242E1

models, and D1 is the ADuM240D1/ADuM241D1/ADuM242D1 models. See the Ordering Guide section.

7 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDDx. |CML| is the maximum common-

mode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode

voltage edges.

Table 8. Total Supply Current vs. Data Throughput

1 Mbps 25 Mbps 100 Mbps

Parameter Symbol Min Typ Max Min Typ Max Min Typ Max Unit

SUPPLY CURRENT

ADuM240D/ADuM240E

Supply Current Side 1 IDD1 6.4 9.8 7.2 11 10.2 15.2 mA

Supply Current Side 2 IDD2 1.9 3.5 3.1 5.0 6.8 10 mA

ADuM241D/ADuM240E

Supply Current Side 1 IDD1 5.5 9.1 6.3 10.0 9.6 14.0 mA

Supply Current Side 2 IDD2 3.72 6.45 4.8 7.5 8.4 11.2 mA

ADuM242D/ADuM242E

Supply Current Side 1 IDD1 4.3 7.7 5.3 8.7 8.6 12.6 mA

Supply Current Side 2 IDD2 4.9 8.3 6.0 9.4 9.3 13.3 mA

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 11 of 26

INSULATION AND SAFETY RELATED SPECIFICATIONS

For additional information, see www.analog.com/icouplersafety.

Table 9. RW-16 Wide Body [SOIC_W] Package

Parameter Symbol Value Unit Test Conditions/Comments

Rated Dielectric Insulation Voltage 5000 V rms 1-minute duration

Minimum External Air Gap (Clearance) L (I01) 7.8 mm min Measured from input terminals to output terminals,

shortest distance through air

Minimum External Tracking (Creepage) L (I02) 7.8 mm min Measured from input terminals to output terminals,

shortest distance path along body

Minimum Clearance in the Plane of the Printed

Circuit Board (PCB Clearance)

L (PCB) 8.1 mm min Measured from input terminals to output terminals,

shortest distance through air, line of sight, in the PCB

mounting plane

Minimum Internal Gap (Internal Clearance) 25.5 μm min Insulation distance through insulation

Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1

Material Group II Material Group (DIN VDE 0110, 1/89, Table 1)

Table 10. RI-16 -2 Wide Body Increased Creepage [SOIC_IC] Package

Parameter Symbol Value Unit Test Conditions/Comments

Rated Dielectric Insulation Voltage 5000 V rms 1-minute duration

Minimum External Air Gap (Clearance) L (I01) 8.3 mm min Measured from input terminals to output terminals,

shortest distance through air

Minimum External Tracking (Creepage) L (I02) 8.3 mm min Measured from input terminals to output terminals,

shortest distance path along body

Minimum Clearance in the Plane of the Printed

Circuit Board (PCB Clearance)

L (PCB) 8.3 mm min Measured from input terminals to output terminals,

shortest distance through air, line of sight, in the PCB

mounting plane

Minimum Internal Gap (Internal Clearance) 25.5 μm min Insulation distance through insulation

Tracking Resistance (Comparative Tracking Index) CTI >400 V DIN IEC 112/VDE 0303 Part 1

Material Group II Material Group (DIN VDE 0110, 1/89, Table 1)

PACKAGE CHARACTERISTICS

Table 11.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

Resistance (Input to Output)1 R

I-O 1013 Ω

Capacitance (Input to Output)1 CI-O 2.2 pF f = 1 MHz

Input Capacitance2 C

I 4.0 pF

IC Junction to Ambient Thermal Resistance θJA 45 °C/W Thermocouple located at center of package underside

1 The device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.

2 Input capacitance is from any input data pin to ground.

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 12 of 26

REGULATORY INFORMATION

See Table 17, Table 18, and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific

cross-isolation waveforms and insulation levels.

Table 12. RW-16 Wide Body [SOIC_W] Package

UL CSA VDE CQC

Recognized Under UL 1577

Component Recognition

Program1

Approved under CSA Component Acceptance

Notice 5A

Certified according to DIN V VDE V

0884-10 (VDE V 0884-10):2006-122

Certified by

CQC11-471543-2012,

GB4943.1-2011:

Single Protection, 5000 V rms

Isolation Voltage

CSA 60950-1-07+A1+A2 and IEC 60950-1,

second edition, +A1+A2:

Reinforced insulation, VIORM =

849 peak, VIOSM = 8000 V peak

Basic insulation at

760 V rms (1075 V peak)

Double Protection, 5000 V rms

Isolation Voltage

Basic insulation at 780 V rms (1103 V peak) Basic insulation, VIORM = 849 V peak,

VIOSM = 12 kV peak

Reinforced insulation at

380 V rms (537 V peak),

tropical climate, altitude

≤5000 meters

Reinforced insulation at 390 V rms

(552 V peak)

IEC 60601-1 Edition 3.1:

Basic insulation (1 means of patient protection

(1 MOPP)), 490 V rms (686 V peak)

Reinforced insulation (2 MOPP), 238 V rms

(325 V peak)

CSA 61010-1-12 and IEC 61010-1 third edition:

Basic insulation at 300 V rms mains, 780 V

secondary (1103 V peak)

Reinforced insulation at 300 V rms mains,

390 V secondary (552 V peak)

File E214100 File 205078 File 2471900-4880-0001 File CQC16001147385

1 In accordance with UL 1577, each product is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec.

2 In accordance with DIN V VDE V 0884-10, each product is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge detection limit =

5 pC). The asterisk (*) branded on the component designates DIN V VDE V 0884-10 approval.

Table 13. RI-16 -2 Wide Body Increased Creepage [SOIC_IC] Package

UL CSA VDE CQC

Recognized Under 1577

Component Recognition

Program1

Approved under CSA Component Acceptance

Notice 5A

Certified according to DIN V VDE V

0884-10 (VDE V 0884-10):2006-122

Certified by

CQC11-471543-2012,

GB4943.1-2011

Single Protection, 5000 V rms

Isolation Voltage

CSA 60950-1-07+A1+A2 and IEC 60950-1,

second edition, +A1+A2:

Reinforced insulation, VIORM =

849 peak, VIOSM = 8000 V peak

Basic insulation at

820 V rms (1159 V peak)

Double Protection, 5000 V rms

Isolation Voltage

Basic insulation at 830 V rms (1174 V peak) Basic insulation, VIORM = 849 V peak,

VIOSM = 12 kV peak

Reinforced insulation at

410 V rms (578 V peak),

tropical climate, altitude

≤5000 meters

Reinforced insulation at 415 V rms (587 V peak)

IEC 60601-1 Edition 3.1:

Basic insulation (1 means of patient protection

(1 MOPP)), 519 V rms (734 V peak)

Reinforced insulation (2 MOPP), 261 V rms

(369 V peak)

CSA 61010-1-12 and IEC 61010-1 third edition:

Basic insulation at 300 V rms mains, 830 V

secondary (1174 V peak)

Reinforced insulation at 300 V rms Mains,

390 V secondary (587 V peak)

File E214100 File 205078 File 2471900-4880-0001 File CQC17001171586

1 In accordance with UL 1577, each product is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec.

2 In accordance with DIN V VDE V 0884-10, each product is proof tested by applying an insulation test voltage ≥ 1592 V peak for 1 sec (partial discharge detection limit =

5 pC). The asterisk (*) branded on the component designates DIN V VDE V 0884-10 approval.

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 13 of 26

DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS

These isolators are suitable for reinforced electrical isolation only within the safety limit data. Protective circuits ensure the maintenance

of the safety data. The asterisk (*) marking on packages denotes DIN V VDE V 0884-10 approval.

Table 14.

Description Test Conditions/Comments Symbol Characteristic Unit

Installation Classification per DIN VDE 0110

For Rated Mains Voltage ≤ 150 V rms I to IV

For Rated Mains Voltage ≤ 300 V rms I to IV

For Rated Mains Voltage ≤ 600 V rms I to III

Climatic Classification 40/125/21

Pollution Degree per DIN VDE 0110, Table 1 2

Maximum Working Insulation Voltage VIORM 849 V peak

Input to Output Test Voltage, Method B1 VIORM × 1.875 = Vpd (m), 100% production test,

tini = tm = 1 sec, partial discharge < 5 pC

Vpd (m) 1592 V peak

Input to Output Test Voltage, Method A Vpd (m)

After Environmental Tests Subgroup 1 VIORM × 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec,

partial discharge < 5 pC

1274 V peak

After Input and/or Safety Test Subgroup 2

and Subgroup 3

VIORM × 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec,

partial discharge < 5 pC

1019 V peak

Highest Allowable Overvoltage VIOTM 7000 V peak

Surge Isolation Voltage Basic VPEAK = 12.8 kV, 1.2 μs rise time, 50 μs,

50% fall time

VIOSM 12000 V peak

Surge Isolation Voltage Reinforced VPEAK = 12.8 kV, 1.2 μs rise time, 50 μs,

50% fall time

VIOSM 8000 V peak

Safety Limiting Values Maximum value allowed in the event of a

failure (see Figure 4)

Maximum Junction Temperature TS 150 °C

Total Power Dissipation at 25°C PS 2.78 W

Insulation Resistance at TS VIO = 500 V RS >109 Ω

3.0

2.5

2.0

1.5

0.5

1.0

0020015010050

SAFE LIMITING POWER (W)

AMBI E NT T EM P E RATURE (°C)

13576-003

Figure 4. Thermal Derating Curve, Dependence of Safety Limiting Values

with Ambient Temperature per DIN V VDE V 0884-10

RECOMMENDED OPERATING CONDITIONS

Table 15.

Parameter Symbol Rating

Operating Temperature TA −40°C to +125°C

Supply Voltages VDD1, VDD2 1.7 V to 5.5 V

Input Signal Rise and Fall Times 1.0 ms

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 14 of 26

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 16.

Parameter Rating

Storage Temperature (TST) Range −65°C to +150°C

Ambient Operating Temperature

(TA) Range

−40°C to +125°C

Supply Voltages (VDD1, VDD2) −0.5 V to +7.0 V

Input Voltages (VIA, VIB, VIC, VID, VE1, VE2,

DISABLE1, DISABLE2)1

−0.5 V to VDDI + 0.5 V

Output Voltages (VOA, VOB, VOC, VOD)2 −0.5 V to VDDO + 0.5 V

Average Output Current per Pin3

Side 1 Output Current (IO1) −10 mA to +10 mA

Side 2 Output Current (IO2) −10 mA to +10 mA

Common-Mode Transients4 −150 kV/μs to +150 kV/μs

1 VDDI is the input side supply voltage.

2 VDDO is the output side supply voltage.

3 See Figure 4 for the maximum rated current values for various ambient

temperatures.

4 Refers to the common-mode transients across the insulation barrier.

Common-mode transients exceeding the absolute maximum ratings may

cause latch-up or permanent damage.

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

Table 17. Maximum Continuous Working Voltage1 RW-16

Wide Body [SOIC_W] Package

Parameter Rating Constraint

AC Voltage

Bipolar Waveform

Basic Insulation 849 V peak 50-year minimum insulation

lifetime

Reinforced

Insulation

768 V peak Lifetime limited by package

creepage maximum approved

working voltage per IEC 60950-1

Unipolar Waveform

Basic Insulation 1698 V peak 50-year minimum insulation

lifetime

Reinforced

Insulation

885 V peak Lifetime limited by package

creepage maximum approved

working voltage per IEC 60950-1

DC Voltage

Basic Insulation 1092 V peak Lifetime limited by package

creepage maximum approved

working voltage per IEC 60950-1

Reinforced

Insulation

543 V peak Lifetime limited by package

creepage maximum approved

working voltage per IEC 60950-1

1 Refers to the continuous voltage magnitude imposed across the isolation

barrier. See the Insulation Lifetime section for more details.

Table 18. Maximum Continuous Working Voltage1 RI-16-2

Wide Body Increased Creepage [SOIC_IC] Package

Parameter Rating Constraint

AC Voltage

Bipolar Waveform

Basic Insulation 849 V peak 50-year minimum insulation

lifetime

Reinforced

Insulation

819 V peak Lifetime limited by package

creepage maximum approved

working voltage per IEC 60950-1

Unipolar Waveform

Basic Insulation 1698 V peak 50-year minimum insulation

lifetime

Reinforced

Insulation

943 V peak Lifetime limited by package

creepage maximum approved

working voltage per IEC 60950-1

DC Voltage

Basic Insulation 1157 V peak Lifetime limited by package

creepage maximum approved

working voltage per IEC 60950-1

Reinforced

Insulation

579 V peak Lifetime limited by package

creepage maximum approved

working voltage per IEC 60950-1

1 Refers to the continuous voltage magnitude imposed across the isolation

barrier. See the Insulation Lifetime section for more details.

ESD CAUTION

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 15 of 26

Truth Tables

Table 19. ADuM240D/ADuM241D/ADuM242D Truth Table (Positive Logic)

VIx Input1, 2 VDISABLEx Input1, 2 VDDI State2 V

DDO State2

Default Low (D0),

VOx Output1, 2, 3

Default High (D1),

VOx Output1, 2, 3

Test Conditions/

Comments

L L or NC Powered Powered L L Normal operation

H L or NC Powered Powered H H Normal operation

X H Powered Powered L H Inputs disabled,

fail-safe output

X4 X

4 Unpowered Powered L H Fail-safe output

X4 X

4 Powered Unpowered Indeterminate Indeterminate

1 L means low, H means high, X means don’t care, and NC means not connected.

2 VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). VDISABLEx refers to the input disable signal on the same side as the VIx inputs. VDDI and

VDDO refer to the supply voltages on the input and output sides of the given channel, respectively.

3 D0 is the ADuM240D0/ADuM241D0/ADuM242D0 models, and D1 is the ADuM240D1/ADuM241D1/ADuM242D1 models. See the Ordering Guide section.

4 Input pins (VIx, DISABLEx) on the same side as an unpowered supply must be in a low state to avoid powering the device through its ESD protection circuitry.

Table 20. ADuM240E/ADuM241E/ADuM242E Truth Table (Positive Logic)

VIx Input1, 2 VEx Input1, 2 V

DDI State2 V

DDO State2

Default Low (E0),

VOx Output1, 2, 3

Default High (E1),

VOx Output1, 2, 3

Test Conditions/

Comments

L H or NC Powered Powered L L Normal operation

H H or NC Powered Powered H H Normal operation

X L Powered Powered Z Z Outputs disabled

L H or NC Unpowered Powered L H Fail-safe output

X4 L

4 Unpowered Powered Z Z Outputs disabled

X4 X

4 Powered Unpowered Indeterminate Indeterminate

1 L means low, H means high, X means don’t care, NC means not connected, and Z means high impedance.

2 VIx and VOx refer to the input and output signals of a given channel (A, B, C, or D). VEx refers to the output enable signal on the same side as the VOx outputs. VDDI and

VDDO refer to the supply voltages on the input and output sides of the given channel, respectively.

3 E0 is the ADuM240E0/ADuM241E0/ADuM242E0 models, and E1 is the ADuM240E1/ADuM241E1/ADuM242E1 models. See the Ordering Guide section.

4 Input pins (VIx, VEx) on the same side as an unpowered supply must be in a low state to avoid powering the device through its ESD protection circuitry.

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 16 of 26

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

512

611

710

8 9

ADuM240D

TOP VI EW

(No t t o Scale)

DD1

GND

DISABLE

GND

DD2

GND

NIC

GND

NOTES

1. NIC = NO I NTERNAL CO NNE C T IO N.

LEAVE THIS PIN FLOATING.

13576-004

Figure 5. ADuM240D Pin Configuration

512

611

710

8 9

DD1

GND

NIC

GND

DD2

GND

ADuM240E

TOP VIEW

(No t to Scale)

NOTES

1. NIC = NO I NTERN AL CONN ECTIO N.

LEAVE THIS PIN FLOATING.

13576-005

Figure 6. ADuM240E Pin Configuration

Table 21. Pin Function Descriptions

Pin No.1

ADuM240D ADuM240E Mnemonic Description

1 1 VDD1 Supply Voltage for Isolator Side 1.

2, 8 2, 8 GND1 Ground Reference for Isolator Side 1.

3 3 VIA Logic Input A.

4 4 VIB Logic Input B.

5 5 VIC Logic Input C.

6 6 VID Logic Input D.

7 Not applicable DISABLE1 Input Disable 1. This pin disables the isolator inputs. Outputs take on the logic state

determined by the fail-safe option shown in the Ordering Guide.

9, 15 9, 15 GND2 Ground Reference for Isolator Side 2.

10 7 NIC No Internal Connection. Leave this pin floating.

Not Applicable 10 VE2 Output Enable 2. Active high logic input. When VE2 is high or disconnected, the VOA,

VOB, VOC, and VOD outputs are enabled. When VE2 is low, the VOA, VOB, VOC, and VOD

outputs are disabled to the high-Z state.

11 11 VOD Logic Output D.

12 12 VOC Logic Output C.

13 13 VOB Logic Output B.

14 14 VOA Logic Output A.

16 16 VDD2 Supply Voltage for Isolator Side 2.

1 Reference the AN-1109 Application Note for specific layout guidelines.

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 17 of 26

512

611

710

8 9

ADuM241D

TOP VI EW

(Not to Scale)

DD1

GND

DISABLE

GND

DD2

GND

DISABLE

GND

13576-104

Figure 7. ADuM241D Pin Configuration

512

611

710

8 9

ADuM241E

TOP VIEW

(Not to Scale)

DD1

GND

DD2

GND

13576-105

Figure 8. ADuM241E Pin Configuration

Table 22. Pin Function Descriptions

Pin No.1

ADuM241D ADuM241E Mnemonic Description

1 1 VDD1 Supply Voltage for Isolator Side 1.

2, 8 2, 8 GND1 Ground Reference for Isolator Side 1.

3 3 VIA Logic Input A.

4 4 VIB Logic Input B.

5 5 VIC Logic Input C.

6 6 VOD Logic Output D.

7 Not applicable DISABLE1 Input Disable 1. This pin disables the isolator inputs. Outputs take on the logic state

determined by the fail-safe option shown in the Ordering Guide.

Not Applicable 7 VE1 Output Enable 1. Active high logic input. When VE1 is high or disconnected, the VOD

output is enabled. When VE1 is low, the VOD output is disabled to the high-Z state.

9, 15 9, 15 GND2 Ground Reference for Isolator Side 2.

10 Not applicable DISABLE2 Input Disable 2. This pin disables the isolator inputs. Outputs take on the logic state

determined by the fail-safe option shown in the Ordering Guide.

Not Applicable 10 VE2 Output Enable 2. Active high logic input. When VE2 is high or disconnected, the VOA, VOB,

and VOC outputs are enabled. When VE2 is low, the VOA, VOB, and VOC outputs are disabled

to the high-Z state.

11 11 VID Logic Input D.

12 12 VOC Logic Output C.

13 13 VOB Logic Output B.

14 14 VOA Logic Output A.

16 16 VDD2 Supply Voltage for Isolator Side 2.

1 Reference the AN-1109 Application Note for specific layout guidelines.

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 18 of 26

512

611

710

8 9

ADuM242D

TOP VI EW

(Not to Scale)

DD1

GND

DISABLE

GND

DD2

GND

DISABLE

GND

13576-106

Figure 9. ADuM242D Pin Configuration

512

611

710

8 9

ADuM242E

TOP VIEW

(Not to Scale)

DD1

GND

DD2

GND

13576-107

Figure 10. ADuM242E Pin Configuration

Table 23. Pin Function Descriptions

Pin No.1

ADuM242D ADuM242E Mnemonic Description

1 1 VDD1 Supply Voltage for Isolator Side 1.

2, 8 2, 8 GND1 Ground Reference for Isolator Side 1.

3 3 VIA Logic Input A.

4 4 VIB Logic Input B.

5 5 VOC Logic Output C.

6 6 VOD Logic Output D.

7 Not applicable DISABLE1 Input Disable 1. This pin disables the isolator inputs. Outputs take on the logic state

determined by the fail-safe option shown in the Ordering Guide.

Not Applicable 7 VE1 Output Enable 1. Active high logic input. When VE1 is high or disconnected, the VOC and VOD

outputs are enabled. When VE1 is low, the VOC and VOD outputs are disabled to the high-Z

state.

9, 15 9, 15 GND2 Ground Reference for Isolator Side 2.

10 Not applicable DISABLE2 Input Disable 2. This pin disables the isolator inputs. Outputs take on the logic state

determined by the fail-safe option shown in the Ordering Guide.

Not Applicable 10 VE2 Output Enable 2. Active high logic input. When VE2 is high or disconnected, the VOA and

VOB outputs are enabled. When VE2 is low, the VOA and VOB outputs are disabled to the

high-Z state.

11 11 VID Logic Input D.

12 12 VIC Logic Input C.

13 13 VOB Logic Output B.

14 14 VOA Logic Output A.

16 16 VDD2 Supply Voltage for Isolator Side 2.

1 Reference the AN-1109 Application Note for specific layout guidelines.

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 19 of 26

TYPICAL PERFORMANCE CHARACTERISTICS

0 20 40 60 80 100 120 140 160

DD1

SUPPLY CURRENT (mA)

DATA RATE (Mbps)

DD1

= V

DD2

= 5V

DD1

= V

DD2

= 3.3V

DD1

= V

DD2

= 2.5V

DD1

= V

DD2

= 1.8V

13576-006

Figure 11. ADuM240D/ADuM240E IDD1 Supply Current vs. Data Rate at

Various Voltages

DATA RATE (Mbps)

0 20 40 60 80 100 120 140 160

IDD2 SUPPLY CURRENT (mA)

VDD1 = VDD2 = 5V

VDD1 = VDD2 = 3. 3V

VDD1 = VDD2 = 2. 5V

VDD1 = VDD2 = 1. 8V

13576-007

Figure 12. ADuM240D/ADuM240E IDD2 Supply Current vs. Data Rate at

Various Voltages

0 20 40 60 80 100 120 140 160

IDD1 SUPP LY CURRENT (mA)

DATA RATE (Mbps)

VDD1 = VDD2 = 5V

VDD1 = VDD2 = 3.3V

VDD1 = VDD2 = 2.5V

VDD1 = VDD2 = 1.8V

13576-113

Figure 13. ADuM241D/ADuM241E IDD1 Supply Current vs. Data Rate at

Various Voltages

0 20 40 60 80 100 120 140 160

DD2

SUPP LY CURRENT (mA)

DATA RATE (Mbps)

DD1

= V

DD2

= 5V

DD1

= V

DD2

= 3.3V

DD1

= V

DD2

= 2.5V

DD1

= V

DD2

= 1.8V

13576-114

Figure 14. ADuM241D/ADuM241E IDD2 Supply Current vs. Data Rate at

Various Voltages

0 20 40 60 80 100 120 140 160

DD1

SUPP LY CURRENT (mA)

DATA RATE (Mbps)

DD1

= V

DD2

= 5V

DD1

= V

DD2

= 3.3V

DD1

= V

DD2

= 2.5V

DD1

= V

DD2

= 1.8V

13576-115

Figure 15. ADuM242D/ADuM242E IDD1 Supply Current vs. Data Rate at

Various Voltages

0 20 40 60 80 100 120 140 160

DD2

SUPP LY CURRENT ( m A)

DATA RATE (Mbps)

DD1

= V

DD2

= 5V

DD1

= V

DD2

= 3.3V

DD1

= V

DD2

= 2.5V

DD1

= V

DD2

= 1.8V

13576-116

Figure 16. ADuM242D/ADuM242E IDD2 Supply Current vs. Data Rate at

Various Voltages

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 20 of 26

–40 –20 0 20 40 60 80 100 120 140

PROPAGAT ION DE LAY,

PHL

(ns)

TEMPERATURE (°C)

DD1

= V

DD2

= 5V

DD1

= V

DD2

= 3.3V

DD1

= V

DD2

= 2.5V

DD1

= V

DD2

= 1.8V

13576-008

Figure 17. Propagation Delay, tPLH vs. Temperature at Various Voltages

–40 –20 0 20 40 60 80 100 120 140

TE M P E RATURE ( °C)

PROPAGAT ION DELAY, t

PHL

(ns)

DD1

= V

DD2

= 5V

DD1

= V

DD2

= 3.3V

DD1

= V

DD2

= 2.5V

DD1

= V

DD2

= 1.8V

13576-009

Figure 18. Propagation Delay, tPHL vs. Temperature at Various Voltages

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 21 of 26

THEORY OF OPERATION

The ADuM240D/ADuM240E/ADuM241D/ADuM241E/

ADuM242D/ADuM242E use a high frequency carrier to

transmit data across the isolation barrier using iCoupler chip

scale transformer coils separated by layers of polyimide isolation.

Using an on/off keying (OOK) technique and the differential

architecture shown in Figure 19 and Figure 20, the ADuM240D/

ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

have very low propagation delay and high speed. Internal regulators

and input/output design techniques allow logic and supply

voltages over a wide range from 1.7 V to 5.5 V, offering voltage

translation of 1.8 V, 2.5 V, 3.3 V, and 5 V logic. The architecture

is designed for high common-mode transient immunity and

high immunity to electrical noise and magnetic interference.

Radiated emissions are minimized with a spread spectrum

OOK carrier and other techniques.

Figure 19 illustrates the waveforms for models of the ADuM240D/

ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

that have the condition of the fail-safe output state equal to low,

where the carrier waveform is off when the input state is low.

If the input side is off or not operating, the low fail-safe output

state (ADuM240D0/ADuM240E0/ADuM241D0/ADuM241E0/

ADuM242D0/ADuM242E0) sets the output to low. For the

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/

ADuM242E that have a high fail-safe output state, Figure 20

illustrates the conditions where the carrier waveform is off

when the input state is high. When the input side is off or not

operating, the high fail-safe output state (ADuM240D1/

ADuM240E1/ADuM241D1/ADuM241E1/ADuM242D1/

ADuM242E1) sets the output to high. See the Ordering Guide

for the model numbers that have the fail-safe output state of low

or the fail-safe output state of high.

TRANSMITTER

GND

OUT

RECEIVER

REGULATOR REGULATOR

13576-014

Figure 19. Operational Block Diagram of a Single Channel with a Low Fail-Safe Output State

TRANSMITTER

GND

OUT

RECEIVER

REGULATOR REGULATOR

13576-015

Figure 20. Operational Block Diagram of a Single Channel with a High Fail-Safe Output State

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 22 of 26

APPLICATIONS INFORMATION

PCB LAYOUT

The ADuM240D/ADuM240E/ADuM241D/ADuM241E/

ADuM242D/ADuM242E digital isolators require no external

interface circuitry for the logic interfaces. Power supply bypassing

is strongly recommended at the input and output supply pins

(see Figure 21). Bypass capacitors are most conveniently connected

between Pin 1 and Pin 2 for VDD1 and between Pin 15 and Pin 16

for VDD2. The recommended bypass capacitor value is between

0.01 μF and 0.1 μF. The total lead length between both ends of

the capacitor and the input power supply pin must not exceed

10 mm. Bypassing between Pin 1 and Pin 8 and between Pin 9

and Pin 16 must also be considered, unless the ground pair on

each package side is connected close to the package.

DD1

GND

DISABLE

/NIC

GND

DD2

GND

DISABLE

/NIC

GND

13576-010

Figure 21. Recommended Printed Circuit Board Layout

In applications involving high common-mode transients, ensure

that board coupling across the isolation barrier is minimized.

Furthermore, design the board layout such that any coupling

that does occur equally affects all pins on a given component

side. Failure to ensure this can cause voltage differentials between

pins exceeding the Absolute Maximum Ratings of the device,

thereby leading to latch-up or permanent damage.

See the AN-1109 Application Note for board layout guidelines.

PROPAGATION DELAY RELATED PARAMETERS

Propagation delay is a parameter that describes the time

required for a logic signal to propagate through a component. The

propagation delay to a Logic 0 output may differ from the

propagation delay to a Logic 1 output.

INPUT (V

)

OUTPUT (V

)

PLH

PHL

50%

13576-011

Figure 22. Propagation Delay Parameters

Pulse width distortion is the maximum difference between these

two propagation delay values and is an indication of how

accurately the timing of the input signal is preserved.

Channel matching is the maximum amount the propagation

delay differs between channels within a single ADuM240D/

ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

component.

Propagation delay skew is the maximum amount the propagation

delay differs between multiple ADuM240D/ADuM240E/

ADuM241D/ADuM241E/ADuM242D/ADuM242E components

operating under the same conditions

JITTER MEASUREMENT

Figure 23 shows the eye diagram for the ADuM240D/ADuM240E/

ADuM241D/ADuM241E/ADuM242D/ADuM242E. The

measurement was taken using an Agilent 81110A pulse pattern

generator at 150 Mbps with pseudorandom bit sequences (PRBS)

2(n − 1), n = 14, for 5 V supplies. Jitter was measured with the

Tektronix Model 5104B oscilloscope, 1 GHz, 10 GSPS with the

DPOJET jitter and eye diagram analysis tools. The result shows a

typical measurement on the ADuM240D/ADuM240E/

ADuM241D/ADuM241E/ADuM242D/ADuM242E with

490 ps p-p jitter.

105

AGE ( V )

TIME (ns)

–5–10

13576-012

Figure 23. ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/

ADuM242E Eye Diagram

INSULATION LIFETIME

All insulation structures eventually break down when subjected

to voltage stress over a sufficiently long period. The rate of

insulation degradation is dependent on the characteristics of the

voltage waveform applied across the insulation as well as on the

materials and material interfaces.

The two types of insulation degradation of primary interest are

breakdown along surfaces exposed to the air and insulation

wear out. Surface breakdown is the phenomenon of surface

tracking, and the primary determinant of surface creepage

requirements in system level standards. Insulation wear out is the

phenomenon where charge injection or displacement currents

inside the insulation material cause long-term insulation

degradation.

Surface Tracking

Surface tracking is addressed in electrical safety standards by

setting a minimum surface creepage based on the working voltage,

the environmental conditions, and the properties of the insulation

material. Safety agencies perform characterization testing on the

surface insulation of components that allows the components to be

categorized in different material groups. Lower material group

ratings are more resistant to surface tracking and, therefore, can

provide adequate lifetime with smaller creepage. The minimum

creepage for a given working voltage and material group is in each

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 23 of 26

system level standard and is based on the total rms voltage

across the isolation, pollution degree, and material group. The

material group and creepage for the ADuM240D/ADuM240E/

ADuM241D/ADuM241E/ADuM242D/ADuM242E isolators

are presented in Table 9.

Insulation Wear Out

The lifetime of insulation caused by wear out is determined by

its thickness, material properties, and the voltage stress applied.

It is important to verify that the product lifetime is adequate at

the application working voltage. The working voltage supported

by an isolator for wear out may not be the same as the working

voltage supported for tracking. The working voltage applicable

to tracking is specified in most standards.

Testing and modeling have shown that the primary driver of long-

term degradation is displacement current in the polyimide

insulation causing incremental damage. The stress on the insula-

tion can be broken down into broad categories, such as dc

stress, which causes very little wear out because there is no

displacement current, and an ac component time varying

voltage stress, which causes wear out.

The ratings in certification documents are usually based on

60 Hz sinusoidal stress because this reflects isolation from line

voltage. However, many practical applications have combinations

of 60 Hz ac and dc across the barrier as shown in Equation 1.

Because only the ac portion of the stress causes wear out, the

equation can be rearranged to solve for the ac rms voltage, as is

shown in Equation 2. For insulation wear out with the

polyimide materials used in these products, the ac rms voltage

determines the product lifetime.

DCRMSACRMS VVV  (1)

DCRMSRMSAC VVV  (2)

where:

VRMS is the total rms working voltage.

VAC RMS is the time varying portion of the working voltage.

VDC is the dc offset of the working voltage.

Calculation and Use of Parameters Example

The following example frequently arises in power conversion

applications. Assume that the line voltage on one side of the

isolation is 240 V ac rms and a 400 V dc bus voltage is present

on the other side of the isolation barrier. The isolator material is

polyimide. To establish the critical voltages in determining the

creepage, clearance, and lifetime of a device, see Figure 24 and

the following equations.

ISOL

TION VOL

AGE

TIME

AC RM S

RMS

PEAK

13576-013

Figure 24. Critical Voltage Example

The working voltage across the barrier from Equation 1 is

DCRMSACRMS VVV 

22 400240 

RMS

VRMS = 466 V

This VRMS value is the working voltage used together with the

material group and pollution degree when looking up the

creepage required by a system standard.

To determine if the lifetime is adequate, obtain the time varying

portion of the working voltage. To obtain the ac rms voltage,

use Equation 2.

DCRMSRMSAC VVV 

22 400466 

RMSAC

VAC RMS = 240 V rms

In this case, the ac rms voltage is simply the line voltage of

240 V rms. This calculation is more relevant when the waveform is

not sinusoidal. The value is compared to the limits for working

voltage in Table 17 for the expected lifetime, less than a 60 Hz

sine wave, and it is well within the limit for a 50-year service life.

Note that the dc working voltage limit in Table 17 is set by the

creepage of the package as specified in IEC 60664-1. This value

can differ for specific system level standards.

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 24 of 26

OUTLINE DIMENSIONS

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

COMPLIANT TO JEDEC STANDARDS MS-013-AA

10.50 (0.4134)

10.10 (0.3976)

0.30 (0.0118)

0.10 (0.0039)

2.65 (0.1043)

2.35 (0.0925)

10.65 (0.4193)

10.00 (0.3937)

7.60 (0.2992)

7.40 (0.2913)

0.75(0.0295)

0.25(0.0098)

45°

1.27 (0.0500)

0.40 (0.0157)

OPLANARITY

0.10 0.33 (0.0130)

0.20 (0.0079)

0.51 (0.0201)

0.31 (0.0122)

SEATING

PLANE

8°

0°

16 9

1.27 (0.0500)

BSC

03-27-2007-B

Figure 25. 16-Lead Standard Small Outline Package [SOIC_W]

Wide Body

(RW-16)

Dimensions shown in millimeters and (inches)

16 9

COPLANARITY

0.10

1.27 BSC

12.95

12.80

12.65

7.60

7.50

7.40

2.64

2.50

2.36

1.27

0.41

2.44

2.24

0.25

0.10

10.55

10.30

10.05

0.49

0.35

8°

0°

0.33

0.23

0.76

0.25 45°

0.25 BSC

GAGE

PLANE

COMP L I ANT TO JEDE C S TANDARDS MS- 013-AC

12-13-2017-B

PKG-004586

TOP VIEW

SIDE VIEW

END VIEW

PIN 1

INDICATOR

SEATING

PLANE

Figure 26. 16-Lead Standard Small Outline Package, with Increased Creepage [SOIC_IC]

Wide Body

(RI-16-2)

Dimensions shown in millimeters

ORDERING GUIDE

Model1, 2

Temperature

Range

No. of

Inputs,

VDD1

Side

No. of

Inputs,

VDD2

Side

Withstand

Voltage

Rating (kV rms)

Fail-Safe

Output

State

Input

Disable

Output

Enable

Package

Description

Package

Option

ADuM240D1BRWZ −40°C to +125°C 4 0 5.0 High Yes No 16-Lead SOIC_W RW-16

ADuM240D1BRWZ-RL −40°C to +125°C 4 0 5.0 High Yes No 16-Lead SOIC_W RW-16

ADuM240D0BRWZ −40°C to +125°C 4 0 5.0 Low Yes No 16-Lead SOIC_W RW-16

ADuM240D0BRWZ-RL −40°C to +125°C 4 0 5.0 Low Yes No 16-Lead SOIC_W RW-16

ADuM240E1BRWZ −40°C to +125°C 4 0 5.0 High No Yes 16-Lead SOIC_W RW-16

ADuM240E1BRWZ-RL −40°C to +125°C 4 0 5.0 High No Yes 16-Lead SOIC_W RW-16

ADuM240E0BRWZ −40°C to +125°C 4 0 5.0 Low No Yes 16-Lead SOIC_W RW-16

ADuM240E0BRWZ-RL −40°C to +125°C 4 0 5.0 Low No Yes 16-Lead SOIC_W RW-16

Data Sheet ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E

Rev. D | Page 25 of 26

Model1, 2

Temperature

Range

No. of

Inputs,

VDD1

Side

No. of

Inputs,

VDD2

Side

Withstand

Voltage

Rating (kV rms)

Fail-Safe

Output

State

Input

Disable

Output

Enable

Package

Description

Package

Option

ADuM240E0WBRWZ −40°C to +125°C 4 0 5.0 Low No Yes 16-Lead SOIC_W RW-16

ADuM240E0WBRWZ-RL −40°C to +125°C 4 0 5.0 Low No Yes 16-Lead SOIC_W RW-16

ADuM240D1BRIZ −40°C to +125°C 4 0 5.0 High Yes No 16-Lead SOIC_IC RI-16-2

ADuM240D1BRIZ-RL −40°C to +125°C 4 0 5.0 High Yes No 16-Lead SOIC_IC RI-16-2

ADuM240D0BRIZ −40°C to +125°C 4 0 5.0 Low Yes No 16-Lead SOIC_IC RI-16-2

ADuM240D0BRIZ-RL −40°C to +125°C 4 0 5.0 Low Yes No 16-Lead SOIC_IC RI-16-2

ADuM240E1BRIZ −40°C to +125°C 4 0 5.0 High No Yes 16-Lead SOIC_IC RI-16-2

ADuM240E1BRIZ-RL −40°C to +125°C 4 0 5.0 High No Yes 16-Lead SOIC_IC RI-16-2

ADuM240E0BRIZ −40°C to +125°C 4 0 5.0 Low No Yes 16-Lead SOIC_IC RI-16-2

ADuM240E0BRIZ-RL −40°C to +125°C 4 0 5.0 Low No Yes 16-Lead SOIC_IC RI-16-2

ADuM241D1BRWZ −40°C to +125°C 3 1 5.0 High Yes No 16-Lead SOIC_W RW-16

ADuM241D1BRWZ-RL −40°C to +125°C 3 1 5.0 High Yes No 16-Lead SOIC_W RW-16

ADuM241D0BRWZ −40°C to +125°C 3 1 5.0 Low Yes No 16-Lead SOIC_W RW-16

ADuM241D0BRWZ-RL −40°C to +125°C 3 1 5.0 Low Yes No 16-Lead SOIC_W RW-16

ADuM241E1BRWZ −40°C to +125°C 3 1 5.0 High No Yes 16-Lead SOIC_W RW-16

ADuM241E1BRWZ-RL −40°C to +125°C 3 1 5.0 High No Yes 16-Lead SOIC_W RW-16

ADuM241E1WBRWZ −40°C to +125°C 3 1 5.0 High No Yes 16-Lead SOIC_W RW-16

ADuM241E1WBRWZ-RL −40°C to +125°C 3 1 5.0 High No Yes 16-Lead SOIC_W RW-16

ADuM241E0BRWZ −40°C to +125°C 3 1 5.0 Low No Yes 16-Lead SOIC_W RW-16

ADuM241E0BRWZ-RL −40°C to +125°C 3 1 5.0 Low No Yes 16-Lead SOIC_W RW-16

ADuM241D1BRIZ −40°C to +125°C 3 1 5.0 High Yes No 16-Lead SOIC_IC RI-16-2

ADuM241D1BRIZ-RL −40°C to +125°C 3 1 5.0 High Yes No 16-Lead SOIC_IC RI-16-2

ADuM241D0BRIZ −40°C to +125°C 3 1 5.0 Low Yes No 16-Lead SOIC_IC RI-16-2

ADuM241D0BRIZ-RL −40°C to +125°C 3 1 5.0 Low Yes No 16-Lead SOIC_IC RI-16-2

ADuM241E1BRIZ −40°C to +125°C 3 1 5.0 High No Yes 16-Lead SOIC_IC RI-16-2

ADuM241E1BRIZ-RL −40°C to +125°C 3 1 5.0 High No Yes 16-Lead SOIC_IC RI-16-2

ADuM241E0BRIZ −40°C to +125°C 3 1 5.0 Low No Yes 16-Lead SOIC_IC RI-16-2

ADuM241E0BRIZ-RL −40°C to +125°C 3 1 5.0 Low No Yes 16-Lead SOIC_IC RI-16-2

ADuM242D1BRWZ −40°C to +125°C 2 2 5.0 High Yes No 16-Lead SOIC_W RW-16

ADuM242D1BRWZ-RL −40°C to +125°C 2 2 5.0 High Yes No 16-Lead SOIC_W RW-16

ADuM242D0BRWZ −40°C to +125°C 2 2 5.0 Low Yes No 16-Lead SOIC_W RW-16

ADuM242D0BRWZ-RL −40°C to +125°C 2 2 5.0 Low Yes No 16-Lead SOIC_W RW-16

ADuM242E1BRWZ −40°C to +125°C 2 2 5.0 High No Yes 16-Lead SOIC_W RW-16

ADuM242E1BRWZ-RL −40°C to +125°C 2 2 5.0 High No Yes 16-Lead SOIC_W RW-16

ADuM242E0BRWZ −40°C to +125°C 2 2 5.0 Low No Yes 16-Lead SOIC_W RW-16

ADuM242E0BRWZ-RL −40°C to +125°C 2 2 5.0 Low No Yes 16-Lead SOIC_W RW-16

ADuM242E0WBRWZ −40°C to +125°C 2 2 5.0 Low No Yes 16-Lead SOIC_W RW-16

ADuM242E0WBRWZ-RL −40°C to +125°C 2 2 5.0 Low No Yes 16-Lead SOIC_W RW-16

ADuM242D1BRIZ −40°C to +125°C 2 2 5.0 High Yes No 16-Lead SOIC_IC RI-16-2

ADuM242D1BRIZ-RL −40°C to +125°C 2 2 5.0 High Yes No 16-Lead SOIC_IC RI-16-2

ADuM242D0BRIZ −40°C to +125°C 2 2 5.0 Low Yes No 16-Lead SOIC_IC RI-16-2

ADuM242D0BRIZ-RL −40°C to +125°C 2 2 5.0 Low Yes No 16-Lead SOIC_IC RI-16-2

ADuM242E1BRIZ −40°C to +125°C 2 2 5.0 High No Yes 16-Lead SOIC_IC RI-16-2

ADuM242E1BRIZ-RL −40°C to +125°C 2 2 5.0 High No Yes 16-Lead SOIC_IC RI-16-2

ADuM242E0BRIZ −40°C to +125°C 2 2 5.0 Low No Yes 16-Lead SOIC_IC RI-16-2

ADuM242E0BRIZ-RL −40°C to +125°C 2 2 5.0 Low No Yes 16-Lead SOIC_IC RI-16-2

1 Z = RoHS Compliant Part.

2 The ADuM240E0WBRWZ, ADuM240E0WBRWZ-RL, ADuM241E1WBRWZ, ADuM241E1WBRWZ-RL, ADuM242E0WBRWZ and ADuM242E0WBRWZ–RL are qualified for

automotive applications.

ADuM240D/ADuM240E/ADuM241D/ADuM241E/ADuM242D/ADuM242E Data Sheet

Rev. D | Page 26 of 26

AUTOMOTIVE PRODUCTS

The ADuM240E0W, ADuM241E1W, and ADuM242E0W models are available with controlled manufacturing to support the quality and

reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the

commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade

products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific

product ordering information and to obtain the specific Automotive Reliability reports for these models.

registered trademarks are the property of their respective owners.

D13576-0-11/18(D)