PCI EXPRESS™ CLOCK GENERATOR ICS841S02I
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 1 ICS841S02BGI REV. C NOVEMBER 1, 2007
PRELIMINARY
GENERAL DESCRIPTION
The ICS841S02I is a PLL-based clock generator
specifically designed for PCI_Express™Clock
Generation applications. This device generates a
100MHz HCSL clock. The device offers a HCSL
(Host Clock Signal Level) clock output from a clock
input reference of 25MHz. The input reference may be derived
from an external source or by the addition of a 25MHz crystal to
the on-chip crystal oscillator. An external reference may be applied
to the XTAL_IN pin with the XTAL_OUT pin left floating.
The device offers spread spectrum clock output for reduced EMI
applications. An I2C bus interface is used to enable or disable
spread spectrum operation as well as select either a down spread
value of -0.35% or -0.5%.
The ICS841S02I is available in both standard and lead-free
20-Lead TSSOP packages.
FEATURES
•Two 0.7V current mode differential HCSL output pairs
•Crystal oscillator interface, 25MHz
•Output frequency: 100MHz
•RMS period jitter: 3ps (maximum)
•Output skew: 35ps (maximum)
•Cycle-to-cyle jitter: 35ps (maximum)
•I2C support with readback capabilities up to 400kHz
•Spread Spectrum for electromagnetic interference (EMI)
reduction
•3.3V operating supply mode
•-40°C to 85°C ambient operating temperature
•Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
HiPerClockS™
ICS
BLOCK DIAGRAM PIN ASSIGNMENT
Divider
Network
PLL
OSC
I
2
C
Logic
SRCT[1:2]
SRCC[1:2]
Pullup
Pullup
XTAL_IN
XTAL_OUT
S DATA
SCLK
IREF
25MHz
ICS841S02I
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm
package body
G Package
Top View
VSS_SRC
VDD_SRC
SRCT2
SRCC2
SRCT1
SRCC1
VSS_SRC
VDD_SRC
VSS_SRC
IREF
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDD_SRC
SDATA
SCLK
nc
XTAL_OUT
XTAL_IN
VDD_REF
VSS_REF
VDDA
VSSA
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 2 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
TABLE 2. PIN CHARACTERISTICS
TABLE 1. PIN DESCRIPTIONS
rebmuNemaNepyTnoitpircseD
9,7,1V
CRS_SS
rewoP.stuptuoCRSdnaerocrofdnuorG
02,8,2V
CRS_DD
rewoP.stuptuoCRSdnaerocrofylppusrewoP
4,32CCRS,2TCRStuptuO.slevelecafretniLSCH.riaptuptuolaitnereffiD
6,51CC
RS,1TCRStuptuO.slevelecafretniLSCH.riaptuptuolaitnereffiD
01FERItupnI
574(rotsisernoisicerpdexifAW asedivorpdn
uorgotnipsihtmorf)
xTCRS,xCCRSedom-tnerruclaitnereffidrofdesutnerrucecnerefer
.stuptuokcolc
11V
ASS
rewoP.nipdnuorggolanA
21V
ADD
rewoP.LLProfylppusrewoP
31V
FER_SS
rewoPecafretnilatsyrcrofdnuorG
41V
FER_DD
rewoP.ecafretnilatsyrcrofylppusrewoP
61,51TUO_LATX,NI_LATXtupnI .tupniehtsiNI_LATX.ecafretnirotallicsolats
yrC
.tuptuoehtsiTUO_LATX
71cndesunU.tcennocoN
81KLCStupnIpulluP
,rotsiserpulluplanretninasahnipsihT.KLCSelbitap
mocsuBMS
.edomnwodrewopniecnadepmihgihnisitub
.slevelecafretniLTTVL/SOMCVL
91ATADS /tupnI
tuptuO pulluP
,rots
iserpulluplanretninasahnipsihT.ATADSelbitapmocsuBMS
.edomnwodrewopniecnadepmihgihnisitub
.slevelecafret
niLTTVL/SOMCVL
:ETON pulluP .seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotsrefe
r
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
ecnaticapaCtupnI 4Fp
R
PULLUP
rotsiseRpulluPtupnI 15kΩ
C
TUO
ecnaticapaCniPtuptuO35Fp
L
NI
ecnatcudnIniP 7Hn
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 3 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
To enhance the flexibility and function of the clock synthesizer,
a two-signal serial interface is provided. Through the Serial Data
Interface, various device functions, such as individual clock
output buffers, can be individually enabled or disabled. The
registers associated with the Serial Data Interface initialize to
their default setting upon power-up, and therefore, use of this
interface is optional. Clock device register changes are nor-
mally made upon system initialization, if any are required. The
interface cannot be used during system operation for power
management functions.
SERIAL DATA INTERFACE
The clock driver serial protocol accepts byte write, byte read,
block write, and block read operations from the controller. For
block write/read operation, the bytes must be accessed in se-
quential order from lowest to highest byte (most significant bit
first) with the ability to stop after any complete byte has been
transferred. For byte write and byte read operations, the sys-
tem controller can access individually indexed bytes. The off-
set of the indexed byte is encoded in the command code, as
described in Table 3A.
The block write and block read protocol is outlined in Table 3B,
while Table 3C outlines the corresponding byte write and byte
read protocol. The slave receiver address is 11010010 (D2h).
DATA PROTOCOL
TABLE 3A. COMMAND CODE DEFINITION
TIBnoitpircseD
7 .noitarepoetirwetybrodaeretyB=1,noitarepoetirwkcolbrodaerkcolB=0
5:6.ecivedsseccaot"00"ot
tes,sserddatcelespihC
0:4 ebtsumstibeseht,snoitarepoetirwkcolbrodaerkcolbroF.noitarepoetirwetybrodaeret
ybroftesffoetyB
."00000"
TABLE 3B. BLOCK READ AND BLOCK WRITE PROTOCOL
TIBetirWkcolB=noitpircseDTIBdaeRkcolB=noitpircseD
1tratS1tratS
8:2stib7-sserddaevalS8:2stib7-sserddaevalS
9etirW9eti
rW
01evalsmorfegdelwonkcA01evalsmorfegdelwonkcA
81:11stib8-edoCdnammoC81:11stib8-edoCdnammoC
91evalsmorfegdelwo
nkcA91evalsmorfegdelwonkcA
72:02stib8-tnuoCetyB02tratstaepeR
82evalsmorfegdelwonkcA72:12stib7-sserddaevalS
63:92s
tib8-1etybataD821=daeR
73evalsmorfegdelwonkcA92evalsmorfegdelwonkcA
54:83stib8-2etybataD73:03stib8-evalsmorftnu
oCetyB
64evalsmorfegdelwonkcA83egdelwonkcA
segdelwonkcAevalS/etyBataD64:93stib8-evalsmorf1etyBataD
stib8-Nety
BataD74egdelwonkcA
evalsmorfegdelwonkcA55:84stib8-evalsmorf2etyBataD
potS65egdelwonkcA
segdelwonkcA/evalSmorfs
etyBataD
stib8-evalsmorfNetyBataD
egdelwonkcAtoN
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 4 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
TABLE 3C. BYTE READ AND BYTE WRITE PROTOCOL
TIBetirWetyB=noitpircseDTIBdaeRetyB=noitpircseD
1tratS1tratS
8:2stib7-sserddaevalS8:2stib7-sserddaevalS
9etirW9etirW
01evalsmorfegdelwonkcA01evalsmorfegdelwonkcA
81:11stib8-edoCdnammoC81:11stib8-edoCdnammoC
91evalsmorfegdelwonk
cA91evalsmorfegdelwonkcA
72:02stib8-etybataD02tratstaepeR
82evalsmorfegdelwonkcA72:12stib7-sserddaevalS
92potS82dae
R
92evalsmorfegdelwonkcA
73:03stib8-evalsmorfataD
83egdelwonkcAtoN
93potS
TABLE 4A. BYTE 0:CONTROL REGISTER 0
CONTROL REGISTERS
TIBpuP@emaNnoitpircseD
70 devreseRdevreseR
61 devreseRdevreseR
51 devreseRdevreseR
41 2]C/T[CRS
elbanEtuptuO2]C/T[CRS
)Z-iH(e
lbasiD=0
elbanE=1
31 1]C/T[CRS
elbanEtuptuO1]C/T[CRS
)Z-iH(elbasiD=0
elbanE=1
21 devreseRdevreseR
10 devreseRdevreseR
00 de
vreseRdevreseR
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 5 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
TABLE 4B. BYTE 1:CONTROL REGISTER 1
TIBpuP@emaNnoitpircseD
70 devreseRdevreseR
60 devreseRdevreseR
50 devreseRdevreseR
40 devreseRdevreseR
30 devreseRdevreseR
20 devrese
RdevreseR
10 devreseRdevreseR
00 devreseRdevreseR
TABLE 4D. BYTE 3:CONTROL REGISTER 3
TIBpuP@emaNnoitpircseD
71 devreseRdevreseR
60 devreseRdevreseR
51 devreseRdevreseR
40 devreseRdevreseR
31 devreseRdevreseR
21 devrese
RdevreseR
11 devreseRdevreseR
01 devreseRdevreseR
TABLE 4F. BYTE 5:CONTROL REGISTER 5
TIBpuP@emaNnoitpircseD
70 devreseRdevreseR
60 devreseRdevreseR
50 devreseRdevreseR
40 devreseRdevreseR
30 devreseRdevreseR
20 devrese
RdevreseR
10 devreseRdevreseR
00 devreseRdevreseR
TABLE 4C. BYTE 2:CONTROL REGISTER 2
TIBpuP@emaNnoitpircseD
71 C/TCRS noitceleSmurtcepSdaerpS
%05.0-=1,%53.0-=0
61 devreseRdevreseR
51 devreseRdevreseR
40 devres
eRdevreseR
31 devreseRdevreseR
20 CRS elbanEmurtcepSdaerpSCRS
nOdaerpS=1,ffOdaerpS=0
11 devreseRdevreseR
01 devreseRdevrese
R
TABLE 4E. BYTE 4:CONTROL REGISTER 4
TIBpuP@emaNnoitpircseD
70 devreseRdevreseR
60 devreseRdevreseR
50 devreseRdevreseR
40 devreseRdevreseR
30 devreseRdevreseR
20 devrese
RdevreseR
10 devreseRdevreseR
01 devreseRdevreseR
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 6 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
TABLE 4G. BYTE 6:CONTROL REGISTER 6
TIBpuP@emaNnoitpircseD
70 LES_TSET tceleSZ-iHroN/FER
N/FER=1,Z-iH=0
60 EDOM_TSET lortnoCyrtnEedoMkcolCTSET
edoMZ-iHr
oN/FER=1,noitarepOlamroN=0
50 devreseRdevreseR
41 devreseRdevreseR
30 devreseRdevreseR
20 devreseRdevreseR
11 devreseRdevreseR
01 devreseRdevreseR
TABLE 4H. BYTE 7:CONTROL REGISTER 7
TIBpuP@emaNnoitpircseD
70 3tiBedoCnoisiveR
60 2tiBedoCnoisiveR
50 1tiBedoCnoisiveR
40 0tiBedoCnoisiveR
30 3tiBDIrodneV
20 2tiBDI
rodneV
10 1tiBDIrodneV
01 0tiBDIrodneV
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 7 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD 4.6V
Inputs, VI-0.5V to VDD_REF + 0.5 V
Outputs, VO-0.5V to V
DD_SRC + 0.5V
Package Thermal Impedance, θJA 73.2°C/W (0 lfpm)
Storage Temperature, T
STG -65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
TABLE 5A. POWER SUPPLY DC CHARACTERISTICS, VDD_REF = VDDA = VDD_SRC = 3.3V±5%, TA = -40°C TO 85°C
TABLE 5B. DC CHARACTERISTICS, VDD_REF = VDDA = VDD_SRC = 3.3V±5%, TA = -40°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
FER_DD
egatloVylppuSrewoP 531.33.3564.3V
V
ADD
egatloVylppuSgolanAV
FER_DD
52.0–3.3V
FER_DD
V
V
CRS_DD
egatloVylppuSCRS/eroC 531.33.3564.3V
I
FER_DD
tnerruCylppuSlatsyrC 8Am
I
CRS_DD
tnerruCylppuSCRS/eroC 041Am
I
ADD
tnerruCylppuSgolanA 52Am
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
SUBMSHI
egatloVhgiHtupnIKLCS,ATADS2.2V
V
SUBMSLI
egatloVwoLtupnIKLCS,ATADS 0.1V
I
HI
tnerruChgiHtupnIKLCS,ATADSV
DD
V=
NI
V564.3=5Aµ
I
LI
tnerruCwoLtupnIKLCS,ATADSV
DD
V,V564.3=
NI
V0=051-Aµ
I
HO
tnerruCtuptuO 41Am
I
ZO
tnerruCegakaeLecnadepmIhgiH 01-01Aµ
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 8 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
TABLE 6. AC CHARACTERISTICS, VDD_REF = VDDA = VDD_SRC = 3.3V±5%, TA = -40°C TO 85°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
ferfycneuqerF 52zHM
klcsycneuqerFKLCS 004zHk
1ETON;ecnareloT
ycneuqerF
LATX05mpp
lanretxE
ecnerefeR 0mpp
cdo7,2ETON;elcyCytuDCCRS/TCRS 7435%
)o(kst7,2ETON;wekSkcolCC/TCRSotC/TC
RS 53sp
t
DOIREP
3ETON;doirePegarevA 0799.93350.01sn
t)cc(tij7,2ETON;rettiJelcyC-ot-elcyCC/TCRS 53sp
t)rep(tij7,2ETON;SMR,retti
JdoireP 3sp
t
R
t/
F
4ETON;emiTllaF/esiRCCRS/TCRS 571007sp
t
MFR
5ETON;gnihctaMemiTllaF/esiR 02%
t
CD
6ETON;elcyCytuDNI_LATX 5.745.25%
Δt
R
t/
F
noitairaVemiTllaF/esiR 521sp
V
HGIH
hgiHegatloV 025008vm
V
WOL
woLegatloV 051-vm
V
XO
egatloVrevossorCtuptuOgniwSV7.0@052055Vm
V
SVO
egatloVtoohsrevOmumixaM V
HGIH
3.0+V
V
SDU
egatloVtoohsrednUmuminiM 3.0-V
V
BR
egatloVkcaBgniR 2.0V
.latsyrcdednemmocerhtiW:1ETON
VtniopgnissorctaderusaeM:2ETON
XO
.
VtniopgnissorctaderusaeM:3ETON
XO
.zHM001ta
VmorfderusaeM:4ETON
LO
VotV571.0=
HO
.V525.0=
t(*2fonoitcarfasadenimreteD:5ETON
R
t–
F
t(/)
R
t+
F
.)
nihtiwebtonlliwelcycytudkcolcFERehttub%07/03otpuselcycytudtupnihtiwylbaileretarepolliwecivedehT:6ET
ON
noitacificeps
05agnisuderusaeM:7ETON Ω.noitanimretDNGot
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 9 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
PARAMETER MEASUREMENT INFORMATION
DIFFERENTIAL MEASUREMENT POINTS FOR DUTY CYCLE/PERIOD
CYCLE-TO-CYCLE JITTER3.3V HCSL OUTPUT LOAD AC TEST CIRCUIT
DIFFERENTIAL MEASUREMENT POINTS FOR RISE/FALL T IME
RMS PERIOD JITTER OUTPUT SKEW
t
sk(o)
nSRCx
SRCx
nSRCy
SRCy
VOH
VREF
VOL
Mean Period
(First edge after trigger)
Reference Point
(Trigger Edge)
1σ contains 68.26% of all measurements
2σ contains 95.4% of all measurements
3σ contains 99.73% of all measurements
4σ contains 99.99366% of all measurements
6σ contains (100-1.973x10-7)% of all measurements
Histogram
➤
➤
➤
➤
tcycle n tcycle n+1
tjit(cc) = tcycle n – tcycle n+1
1000 Cycles
SRCT1:2
SRCC1:2
475Ω
Measurement
Point
33Ω100Ω
100Ω
33Ω
Measurement
Point
49.9Ω
49.9Ω
HCSL
GND
2pF
2pF
0V
3.3V±5%
VDD_REF,
VDD_SRC
3.3V±5%
VDDA
Clock Period (Differential)
Positive Duty
Cycle (Differential)
Negative Duty
Cycle (Differential)
Q/nQ
0.0V
Q/nQ
V
IL
= -150mV
V
IH
= +150mV
0.0V
Fall Edge RateRise Edge Rate
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 10 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
PARAMETER MEASUREMENT INFORMATION, CONTINUED
SE MEASUREMENT POINTS FOR RISE/FALL TIME MATCHING
SE MEASUREMENT POINTS FOR DELTA CROSS POINTDIFFERENTIAL MEASUREMENT POINTS FOR RINGBACK
SE MEASUREMENT POINTS FOR ABSOLUTE CROSS POINT/SWING
T
STABLE
T
STABLE
V
RB
V
RB
Q/nQ
V
IL
= -150mV
V
RB
= -100mV
V
RB
= +100mV
V
IH
= +150mV
0.0V
Q
nQ
V
CROSS_DELTA
= 140mV
nQ
Q
V
CROSS_MAX
= 550mV
V
CROSS_MIN
= 250mV
V
MAX
= 1.15V
V
MIN
= -0.30V
nQ
Q
V
CROSS
_
MEDIAN
nQ
Q
V
CROSS
_
MEDIAN
V
CROSS
_
MEDIAN
+75mV
V
CROSS
_
MEDIAN
-75mV
t
FALL
t
RISE
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 11 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
APPLICATION INFORMATION
POWER SUPPLY FILTERING T ECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter
performance, power supply isolation is required. The ICS841S02I
provides separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. VDD_SRC, VDDA and VDD_REF
should be individually connected to the power supply
plane through vias, and 0.01µF bypass capacitors should be used
for each pin. Figure 1 illustrates this for a generic VDD_SRC pin and
also shows that VDDA requires that an additional10Ω resistor
along with a 10µF bypass capacitor be connected to the VDDA pin. FIGURE 1. POWER SUPPLY FILTERING
10Ω
VDDA
10μF
.01μF
3.3V
.01μF
VDD
USING THE ON-BOARD CRYSTAL OSCILLATOR
The ICS841S02I features a fully integrated Pierce oscillator to
minimize system implementation costs. The recommended
operation of the ICS841S02I is with a 25MHz, 18pF parallel
resonant crystal. See Table 7 for complete crystal specifications.
For proper operation, a minimum of 10pF capacitance on each
crystal pin is required. The capacitor values shown in Figure 2
TABLE 7. RECOMMENDED CRYSTAL SPECIFICATIONS
retemaraPeulaV
tuClatsyrCtuCTAlatnemadnuF
ecnanoseRecnanoseRlellaraP
C(ecnaticapaCtnuhS
L
)Fp7-5
C(ecnaticapaCdaoL
O
)Fp81
)RSE(ecnatsiseRseireStnelaviuqE05-02 Ω
FIGURE 2. CRYSTAL OSCILLATOR WITH TRIM CAPACITOR
XT AL_IN
XTAL_OUT
25MHz
TBD
TBD
33pF
18pF
are typical values for the recommended crystal as show in
Table 7. The specific values may be adjusted to trim the frequency
for the individual board layouts if desired.
The crystal and optional trim capacitors should be located as
close to the ICS841S02I XTAL_IN and XTAL_OUT pins as
possible to minimize board level parasitics.
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 12 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
INPUTS:
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
HCSL OUTPUTs
All unused HCSL outputs can be left floating. We recommend
that there is no trace attached. Both sides of the differential output
pair should either be left floating or terminated.
OUTPUT DRIVER CURRENT
The ICS841S02I outputs are HCSL current drive with the cur-
rent being set with a resistor from IREF to ground. For a 50Ω pc
board trace, the drive current would typically be set with a RREF
of 475Ω which products an IREF of 2.32mA. The IREF is multiplied
by a current mirror to an output drive of 6*2.32mA or 13.92mA.
See Figure 3 for current mirror and output drive details.
FIGURE 3. HCSL CURRENT MIRROR AND OUTPUT DRIVE
IREF
RREF RL
RL
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 13 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
RECOMMENDED T ERMINATION
Figure 4A is the recommended termination for applications
which require the receiver and driver to be on a separate PCB.
All traces should be 50Ω impedance.
FIGURE 4A. RECOMMENDED TERMINATION
Figure 4B is the recommended termination for applications
which require a point to point connection and contain the driver
FIGURE 4B. RECOMMENDED TERMINATION
and receiver on the same PCB. All traces should all be 50Ω
impedance.
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 14 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS841S02I is: 1874
TABLE 8. θJAVS. AIR FLOW TABLE FOR 20 LEAD TSSOP
θθ
θθ
θJA by Velocity (Linear Feet per Minute)
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 15 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
PACKAGE OUTLINE - G SUFFIX FOR 20 LEAD TSSOP
TABLE 9. PACKAGE DIMENSIONS
LOBMYS sretemilliM
NIMXAM
N02
A--02.1
1A50.051.0
2A08.050.1
b91.003.0
c90.002.0
D04.606.6
ECISAB04.6
1E03.405.4
eCISAB56.0
L54.057.0
α°
0°8
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Reference Document: JEDEC Publication 95, MO-153
IDT™ / ICS™ PCI EXPRESS CLOCK GENERATOR 16 ICS841S02BGI REV. C NOVEMBER 1, 2007
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology, Incorporated (IDT) assumes no responsibility for either its use or for
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and
industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT
reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
TABLE 10. ORDERING INFORMATION
rebmuNredrO/traPgnikraMegakcaPgnigakcaPgnippihSerutarepmeT
IGB20S148SCIIGB20S148SCIPOSSTdaeL02ebutC°58otC°04-
T
IGB20S148SCIIGB20S148SCIPOSSTdaeL02leer&epat0052C°58otC°04-
FLIGB20S148SCILIB20S148SCIPOSST"eerF-daeL"daeL02e
butC°58otC°04-
TFLIGB20S148SCILIB20S148SCIPOSST"eerF-daeL"daeL02leer&epat0052C°58otC°04-
.tnailpmocSHoReradn
anoitarugifnoceerF-bPehterarebmuntrapehtotxiffus"FL"nahtiwderedroeratahtstraP:ETON
Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
800-345-7015
408-284-8200
Fax: 408-284-2775
For Tech Support
netcom@idt.com
480-763-2056
Corporate Headquarters
Integrated Device Technology, Inc.
6024 Silver Creek Valley Road
San Jose, CA 95138
United States
800 345 7015
+408 284 8200 (outside U.S.)
Asia Pacific and Japan
Integrated Device Technology
Singapore (1997) Pte. Ltd.
Reg. No. 199707558G
435 Orchard Road
#20-03 Wisma Atria
Singapore 238877
+65 6 887 5505
Europe
IDT Europe, Limited
321 Kingston Road
Leatherhead, Surrey
KT22 7TU
England
+44 (0) 1372 363 339
Fax: +44 (0) 1372 378851
© 2007 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks
of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be
trademarks or registered trademarks used to identify products or services of their respective owners.
Printed in USA
ICS841S02I
PCI EXPRESS™ CLOCK GENERATOR PRELIMINARY
