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FEATURES
1
2
3
4
5
6
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8
16
15
14
13
12
11
10
9
1B
1A
1Y
G
2Y
2A
2B
GND
VCC
4B
4A
4Y
G
3Y
3A
3B
D PACKAGE
(TOP VIEW)
DESCRIPTION/ORDERING INFORMATION
AM26LS32AM-EPQUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS730 – OCTOBER 2006
•Controlled Baseline •Complementary Output-Enable Inputs– One Assembly/Test Site, One Fabrication •Input Impedance . . . 12 k ΩMinSite
•Designed to Be Interchangeable With•Extended Temperature Performance of –55 °C Advanced Micro Devices AM26LS32to 125 °C•Enhanced Diminishing ManufacturingSources (DMS) Support•Enhanced Product-Change Notification•Qualification Pedigree
(1)
•Meets or Exceeds the Requirements of ANSITIA/EIA-422-B, TIA/EIA-423-B, and ITURecommendations V.10 and V.11• ± 7-V Common-Mode Range With ±200-mVSensitivity
•Input Hysteresis . . . 50 mV Typ•Operates From a Single 5-V Supply•Low-Power Schottky Circuitry•3-State Outputs(1) Component qualification in accordance with JEDEC andindustry standards to ensure reliable operation over anextended temperature range. This includes, but is not limitedto, Highly Accelerated Stress Test (HAST) or biased 85/85,temperature cycle, autoclave or unbiased HAST,electromigration, bond intermetallic life, and mold compoundlife. Such qualification testing should not be viewed asjustifying use of this component beyond specifiedperformance and environmental limits.
The AM26LS32A is a quadruple differential line receiver for balanced and unbalanced digital data transmission.The enable function is common to all four receivers and offers a choice of active-high or active-low input. The3-state outputs permit connection directly to a bus-organized system. Fail-safe design ensures that, if the inputsare open, the outputs always are high.
The AM26LS32A incorporates an additional stage of amplification to improve sensitivity. The input impedancehas been increased, resulting in less loading of the bus line. The additional stage has increased propagationdelay, however, this does not affect interchangeability in most applications.
The AM26LS32AM is characterized for operation over the full military temperature range of –55 °C to 125 °C.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
–55 °C to 125 °C SOIC – D Tape and reel AM26LS32AMDREP 26LS32EP
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available atwww.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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12
2
13
6
75
10
911
14
15 13
G
G
1A
1B
2A
2B
3A
3B
4A
4B
1Y
2Y
3Y
4Y
AM26LS32AM-EP
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS730 – OCTOBER 2006
FUNCTION TABLE
(1)
(each receiver)
ENABLESDIFFERENTIAL OUTPUTA – B YG G
H X HV
ID
≥V
IT+
X L HH X ?V
IT–
≤V
ID
≤V
IT+
X L ?H X LV
ID
≤V
IT–
X L LX L H ZH X HOpen
X L H
(1) H = high level, L = low level, ? = indeterminate, X = irrelevant,Z = high impedance (off)
LOGIC DIAGRAM (POSITIVE LOGIC)
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EQUIVALENT OF EACH
DIFFERENTIAL INPUT
VCC
Input
EQUIVALENT OF EACH ENABLE INPUT
Output
85 Ω
NOM
TYPICAL OF ALL OUTPUTS
8.3 kΩ
NOM
Enable
20 kΩ
NOM
960 Ω
NOM
960 Ω
NOM
100 kΩ
A Input Only
VCC
100 kΩ
B Input Only
VCC
Absolute Maximum Ratings
(1)
AM26LS32AM-EPQUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS730 – OCTOBER 2006
SCHEMATICS OF INPUTS AND OUTPUTS
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage
(2)
7 VAny differential input ±25 VV
I
Input voltage
Other inputs 7V
ID
Differential input voltage
(3)
±25 VContinuous total power dissipation See Dissipation Rating Tableθ
JA
Package thermal impedance
(4)
D package 111.6 °C/WT
stg
Storage temperature range
(5)
–65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltage values, except differential voltages, are with respect to the network ground terminal.(3) Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals.(4) The package thermal impedance is calculated in accordance with JESD 51-7.(5) Long-term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction ofoverall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging.
DISSIPATION RATING TABLE
T
A
≤25 °C DERATING FACTOR T
A
= 70 °C T
A
= 125 °CPACKAGE
POWER RATING ABOVE T
A
= 25 °C POWER RATING POWER RATING
D 1075 mW 8.9 mW/ °C 672 mW 179 mW
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Recommended Operating Conditions
Electrical Characteristics
AM26LS32AM-EP
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS730 – OCTOBER 2006
MIN NOM MAX UNIT
V
CC
Supply voltage 4.5 5 5.5 VV
IH
High-level input voltage 2 VV
IL
Low-level input voltage 0.8 VV
IC
Common-mode input voltage ±7 VI
OH
High-level output current –440 µAI
OL
Low-level output current 8 mAT
A
Operating free-air temperature –55 125 °C
over recommended ranges of V
CC
, V
IC
, and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
Positive-going
V
IT+
V
O
= V
OH
min, I
OH
= –440 µA 0.2 Vinput threshhold voltageNegative-going
V
IT–
V
O
= 0.45 V, I
OL
= 8 mA –0.2
(2)
Vinput threshhold voltageHysteresis voltageV
hys
50 mV(V
IT+
– V
IT–
)V
IK
Enable-input clamp voltage V
CC
= MIN, I
I
= –18 mA –1.5 VV
OH
High-level output voltage V
CC
= MIN, V
ID
= 1 V, V
I(G)
= 0.8 V, I
OH
= –440 µA 2.5 VI
OL
= 4 mA 0.4V
CC
= MIN, V
ID
= –1 V,V
OL
Low-level output voltage VV
I(G)
= 0.8 V
I
OL
= 8 mA 0.45Off-state V
O
= 2.4 V 20I
OZ
(high-impedance state) V
CC
= MAX µAV
O
= 0.4 V –20output current
V
I
= 15 V, Other input at –10 V to 15 V 1.2I
I
Line input current mAV
I
= –15 V, Other input at –15 V to 10 V –1.7I
I(EN)
Enable input current V
I
= 5.5 V 100 µAI
IH
High-level enable current V
I
= 2.7 V 20 µAI
IL
Low-level enable current V
I
= 0.4 V –0.36 mAr
I
Input resistance V
IC
= –15 V to 15 V, One input to ac ground 12 15 k ΩI
OS
Short-circuit output current
(3)
V
CC
= MAX –15 –85 mAI
CC
Supply current V
CC
= MAX, All outputs disabled 52 70 mA
(1) All typical values are at V
CC
= 5 V, T
A
= 25 °C, and V
IC
= 0.(2) The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet forthreshold levels only.(3) Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
4
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Switching Characteristics
AM26LS32AM-EPQUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS730 – OCTOBER 2006
V
CC
= 5 V, T
A
= 25 °C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay time, low-to-high-level output 20 35C
L
= 15 pF, See Figure 1 nst
PHL
Propagation delay time, high-to-low-level output 22 35t
PZH
Output enable time to high level 17 22C
L
= 15 pF, See Figure 1 nst
PZL
Output enable time to low level 20 25t
PHZ
Output disable time from high level 21 30C
L
= 5 pF, See Figure 1 nst
PLZ
Output disable time from low level 30 40
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PARAMETER MEASUREMENT INFORMATION
S1 Open
S2 Closed
5 kΩ
S1
RL = 2 kΩ
VCC
From Output
Under Test
CL
(see Note A) See Note B
S2
tPHL
VOH
VOL
2.5 V
−2.5 V
tPLH
S1 and S2 Closed
VOLTAGE WAVEFORMS FOR tPLH, tPHL
TEST CIRCUIT
10%
90%
10%
90%
0
3 V
10%
10%
90% 90%
1.3 V 1.3 V
1.3 V 1.3 V
3 V
0
≤5 ns
10%
90%
10%
90%
0
3 V
10%
10%
90% 90%
1.3 V 1.3 V
1.3 V 1.3 V
3 V
0
Enable G
Enable G
tPZH
1.3 V
Output VOH
0.5 V
≈1.4 V
tPHZ S1 Closed
S2 Closed
tPZL
1.3 V
S1 Closed
S2 Open
S1 Closed
S2 Closed
VOL
0.5 V
tPLZ
VOLTAGE WAVEFORMS FOR tPHZ, tPZH VOLTAGE WAVEFORMS FOR tPLZ, tPZL
Test
Point
Output
See Note CSee Note C
Input
Output
Enable G
Enable G
≤5 ns ≤5 ns ≤5 ns
≈1.4 V
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with G high; G is tested with G low.
0 0
1.3 V 1.3 V
AM26LS32AM-EP
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS730 – OCTOBER 2006
Figure 1. Test Circuit and Voltage Waveforms
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TYPICAL CHARACTERISTICS
2
1
00 −10 −20 −30
− High-Level Output Voltage − V
3
4
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT(1)
5
−40 −50
VCC = 5.25 V
VCC = 5 V
VCC = 4.75 V
IOH − High-Level Output Current − mA
VOH
VID = 0.2 V
TA = 25°C
VCC = 5.5 V
VCC = 4.5 V
2
00 10 20 30 40 50 60
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
5
70 80
4
3
1
− High-Level Output Voltage − V
VOH
TA − Free-Air Temperature − °C
VCC = 5 V
VID = 0.2 mV
IOH = −440 µA
0.3
0.2
0.1
00 10 20 30 40 50
0.4
0.5
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
60 70 80
− Low-Level Output Voltage − VVOL
TA − Free-Air Temperature − °C
VCC = 5 V
VID = −0.2 V
IOL = 8 mA
AM26LS32AM-EPQUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS730 – OCTOBER 2006
Figure 3.(1) V
CC
= 5.5 V and V
CC
= 4.5 V applies toM-suffix devices only.
Figure 2.
Figure 4. Figure 5.
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OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Enable G Voltage − V
3
2
0 0.5 1 1.5
4
5
2 2.5 3
1
0
− Output Voltage − VVO
VID = 0.2 V
TA = 25°C
Load = 8 kΩ to GND VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
4.5
3.5
2.5
1.5
0.5
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Enable G Voltage − V
− Output Voltage − VVO
2
00 0.5 1 1.5 2
3
4
2.5 3
1
TA = 70°C
TA = 25°C
TA = 0°C
3.5
2.5
1.5
0.5
5
4.5 VCC = 5 V
VID = 0.2 V
Load = 8 kΩ to GND
Enable G Voltage − V
− Output Voltage − VVO
3
2
1
00 0.5 1
4
5
6
1.5 2 2.5 3
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
VID = −0.2 V
Load = 1 kΩ to VCC
TA = 25°C
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Enable G Voltage − V
− Output Voltage − VVO
3
2
1
00 0.5 1
4
5
6
1.5 2 2.5 3
VCC = 5 V
VID = −0.2 V
Load = 1 kΩ to VCC
TA = 0°C
TA = 25°C
TA = 70°C
AM26LS32AM-EP
QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS730 – OCTOBER 2006
TYPICAL CHARACTERISTICS (continued)
Figure 6. Figure 7.
Figure 8. Figure 9.
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2.5
2
1
0.5
0
4.5
1.5
−200 −150 −100 −50 0
3.5
3
4
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
5
50 100 150 200
VID − Differential Input Voltage − mV
− Output Voltage − V
VO
VCC = 5 V
IO = 0
TA = 25°C
VIT− VIT+
VIC =
−7 V VIC =
0VIC =
7 V
VIT−
VIT+
VIT− VIT+
0
−1
−3
−4
−25 −20 −15 −5 0 5 10
− Input Current − mA
1
3
INPUT CURRENT
vs
INPUT VOLTAGE
4
2015
−2
2
II
VI − Input Voltage − V
The Unshaded Area
Shows Requirements of
Paragraph 4.2.1 of ANSI
Standards EIA/TIA-422-B and
EIA/TIA-423-B.
−10 25
VCC = 5 V
VCC = 0
AM26LS32AM-EPQUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS730 – OCTOBER 2006
TYPICAL CHARACTERISTICS (continued)
Figure 10.
Figure 11.
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PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
AM26LS32AMDREP ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
V62/07603-01XE ACTIVE SOIC D 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF AM26LS32AM-EP :
•Catalog: AM26LS32AM
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 1
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