W83176R-400/W83176G-400
CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA
Publication Release Date: May, 2006
- 3 - Revision 0.6
5. PIN DESCRIPTION
BUFFER TYPE SYMBOL DESCRIPTION
IN Input
OUT Output
INtp120k Latched input at power up, internal 120kΩ pull up.
* Internal 120kΩ pull-up
# Low Active
5.1 Clock Outputs
PIN PIN NAME TYPE DESCRIPTION
2,3 SRCT_IN
SRCC_IN IN SRC Differential clock input
6,9,20,23, DIFT (1,2,5,6) OUT True Clocks of differential pair outputs
7,10,19,22 DIFC (1,2,5,6) OUT Complement Clocks of differential pair outputs
8,21 OE (1,6)* IN
DIFT/C (1, 6) output control, 0=Tri-state, 1=Enable output,
This is internal 120K pull up.
13 SCLK * IN
Serial clock of I2C 2-wire control interface
Internal pull-up resistor 120K to VDD
14 SDATA * I/O
Serial data of I2C 2-wire control interface
Internal pull-up resistor 120K to VDD
15 PD#* IN
ctive low to power down the device into low power state
is stopped VCO and all output buffers, This is internal
120K pull up.
16 SRC_STOP#* IN
Active low to stop differential output buffers, This is internal
120K pull up.
17 HIGH_BW#* INtp120k Latched input at power up to selecting PLL Band Width
0=HIGH, 1=LOW, This is internal 120K pull up.
26 IREF OUT
Deciding the reference current for the Differential clock
pairs. The pin was connected to the precision resistor tied
to ground to decide the appropriate current; 475 ohm is the
standard value for 0.7V differential clock output.
5.2 Power Pins
PIN PIN NAME DESCRIPTION
4,25,27 GND Ground
1,5,11,18,24 VDD Power Supply 3.3V
28 VDDA Analog power supply, 3.3V