1
MRF148AMOTOROLA RF DEVICE DATA
The RF MOSFET Line
   
N–Channel Enhancement–Mode
Designed for power amplifier applications in industrial, commercial and
amateur radio equipment to 175 MHz.
Superior High Order IMD
Specified 50 Volts, 30 MHz Characteristics
Output Power = 30 Watts
Power Gain = 18 dB (Typ)
Efficiency = 40% (Typ)
IMD(d3) (30 W PEP) — –35 dB (Typ)
IMD(d11) (30 W PEP) — –60 dB (Typ)
100% Tested For Load Mismatch At All Phase Angles With
30:1 VSWR
Lower Reverse Transfer Capacitance (3.0 pF Typical)
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Source Voltage VDSS 120 Vdc
Drain–Gate Voltage VDGO 120 Vdc
Gate–Source Voltage VGS ±40 Vdc
Drain Current — Continuous ID6.0 Adc
Total Device Dissipation @ TC = 25°C
Derate above 25°CPD115
0.66 Watts
W/°C
Storage Temperature Range Tstg 65 to +150 °C
Operating Junction Temperature TJ200 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction to Case RθJC 1.52 °C/W
NOTE – CAUTION – MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
Order this document
by MRF148A/D

SEMICONDUCTOR TECHNICAL DATA

30 W, to 175 MHz
N–CHANNEL MOS
LINEAR RF POWER
FET
CASE 211–07, STYLE 2
Motorola, Inc. 1998
(Replaces MRF148/D)
D
G
S
MRF148A
2MOTOROLA RF DEVICE DATA
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage (VGS = 0, ID = 10 mA) V(BR)DSS 125 Vdc
Zero Gate Voltage Drain Current (VDS = 50 V, VGS = 0) IDSS 1.0 mAdc
Gate–Body Leakage Current (VGS = 20 V, VDS = 0) IGSS 100 nAdc
ON CHARACTERISTICS
Gate Threshold Voltage (VDS = 10 V, ID = 10 mA) VGS(th) 1.0 2.5 5.0 Vdc
Drain–Source On–V oltage (VGS = 10 V, ID = 2.5 A) VDS(on) 1.0 3.0 5.0 Vdc
Forward T ransconductance (VDS = 10 V, ID = 2.5 A) gfs 0.8 1.2 mhos
DYNAMIC CHARACTERISTICS
Input Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Ciss 62 pF
Output Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Coss 35 pF
Reverse Transfer Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Crss 3.0 pF
FUNCTIONAL TESTS (SSB)
Common Source Amplifier Power Gain (30 MHz)
(VDD = 50 V, Pout = 30 W (PEP), IDQ = 100 mA) (175 MHz) Gps
18
15
dB
Drain Efficiency (30 W PEP)
(VDD = 50 V, f = 30 MHz, IDQ = 100 mA) (30 W CW) η
40
50
%
Intermodulation Distortion
(VDD = 50 V, Pout = 30 W (PEP),
f = 30; 30.001 MHz, IDQ = 100 mA) IMD(d3)
IMD(d11)
–35
–60
dB
Load Mismatch
(VDD = 50 V, Pout = 30 W (PEP), f = 30; 30.001 MHz,
IDQ = 100 mA, VSWR 30:1 at all Phase Angles)
ψNo Degradation in Output Power
CLASS A PERFORMANCE
Intermodulation Distortion (1) and Power Gain
(VDD = 50 V, Pout = 10 W (PEP), f1 = 30 MHz,
f2 = 30.001 MHz, IDQ = 1.0 A)
GPS
IMD(d3)
IMD(d913)
20
–50
–70
dB
NOTE:
1. To MIL–STD–1311 Version A, Test Method 2204B, Two Tone, Reference Each Tone.
Figure 1. 2.0 to 50 MHz Broadband Test Circuit
C1, C2, C3, C4, C5, C6 — 0.1 µF Ceramic Chip or Equivalent
C7 — 10 µF, 100 V Electrolytic
C8 — 100 pF Dipped Mica
L1 — VK200 20/4B Ferrite Choke or Equivalent (3.0 µH)
L2 — Ferrite Bead(s), 2.0 µH
R1, R2 — 200 , 1/2 W Carbon
R3 — 4.7 , 1/2 W Carbon
R4 — 470 , 1.0 W Carbon
T1 — 4:1 Impedance T ransformer
T2 — 1:2 Impedance T ransformer
RF
OUTPUT
RF
INPUT
BIAS
0–10 V 50 V
+
C1
+
C4 C5 C6 C7
C2
C3
R1
R3
T1
T2
DUT
L1 L2
R4
C8 R2
+
3
MRF148AMOTOROLA RF DEVICE DATA
Figure 2. Power Gain versus Frequency Figure 3. Output Power versus Input Power
Figure 4. IMD versus Pout Figure 5. Common Source Unity Gain Frequency
versus Drain Current
Figure 6. 150 MHz Test Circuit
C1 — 91 pF Unelco Type MCM 01/010
C2, C4 — 0.1 µF Erie Red Cap
C3 — Allen Bradley 680 pF Feed Thru
C5 — 1.0 µF, 50 Vdc Electrolytic
C6 — 15 pF Unelco Type J101
C7 — 24 pF Unelco Type MCM 01/010
L1 — 2 T urns #18 AWG, 5/16 ID
L2 — 4 T urns #18 AWG, 5/16 ID
R1 — 1.0 Ohm, 1/4 W Carbon
R2 — 2000 Ohm, 1/4 W Carbon
RFC1 — VK200 21/4B
T1 — 4:1 T ransformer, 1.75 Subminiature
T1 — Coaxial Cable T1 — 4:1 Impedance Ratio
T1 — T ransformer, Line
T1 — Impedance = 25
+ BIAS + 50 Vdc
RF OUTPUT
RF INPUT
C3 C2
R2
R1
C1
T1
DUT
L2 C4
RFC1
L1 C6
C7
50
12.5
C5
POWER GAIN (dB)
f, FREQUENCY (MHz)
25
20
15
10
5
02 5 10 20 20050 100
VDD = 50 V
IDQ = 100 mA
Pout = 30 W (PEP)
P
out , OUTPUT POWER (WATTS)
Pin, INPUT POWER (WATTS)
60
40
0
00 0.5 1 1.5 2 2.5
20
60
40
20
150 MHz30 MHz
VDD = 50 V
40 V
VDD = 50 V
40 V
IDQ = 100 mA
IDQ = 100 mA
IMD, INTERMODULA TION DISTOR TION (dB)
Pout, OUTPUT POWER (W ATTS PEP)
–30
–40
–50
–30
–40
–50010203040
d
5
d
3
d
3
d
5
V
DD = 50 V, IDQ = 100 mA, TONE SEPARATION 1 kHz
150 MHz30 MHz
2000
1000
001234
I
D
, DRAIN CURRENT (AMPS)
VDS = 15 V
fT, UNITY GAIN FREQUENCY (MHz)
VDS = 30 V
0–6 V +
MRF148A
4MOTOROLA RF DEVICE DATA
Figure 7. Gate Voltage versus Drain Current Figure 8. DC Safe Operating Area (SOA)
Figure 9. Impedance Coordinates — 50 Ohm
Characteristic Impedance
2
1
00246810
V
GS, GATE–SOURCE VOLTAGE (VOLTS)
13579
V
DS = 10 V
gfs = 1.2 mho
IDS, DRAIN CURRENT (AMPS)
10
7
3
2
5
1
0.7
0.5
0.3
0.2
0.10.2 0.4 VDS, DRAIN–SOURCE VOLTAGE (VOL TS)
TC = 25
°
C
ID, DRAIN CURRENT (AMPS)
0.7 1 2 4 7 10 20 40 70 100 200
150
50
30
7.0
4.0 f = 2.0 MHz
175
f = 2.0 MHz
ZOL*
Zin VDD = 50 V
IDQ = 100 mA
Pout = 30 W PEP
Gate Shunted By 100
15
175
ZOL* = Conjugate of the optimum load impedance
ZOL* = into which the device output operates at a
ZOL* = given output power, voltage and frequency.
5
MRF148AMOTOROLA RF DEVICE DATA
RF POWER MOSFET CONSIDERATIONS
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between the terminals. The metal oxide gate structure
determines the capacitors from gate–to–drain (Cgd), and
gate–to–source (Cgs). The PN junction formed during the
fabrication of the RF MOSFET results in a junction capaci-
tance from drain–to–source (Cds).
These capacitances are characterized as input (Ciss),
output (Coss) and reverse transfer (Crss) capacitances on data
sheets. The relationships between the inter–terminal capaci-
tances and those given on data sheets are shown below . The
Ciss can be specified in two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero
volts at the gate. In the latter case the numbers are lower.
However, neither method represents the actual operat-
ing conditions in RF applications.
Cgd
GATE
SOURCE
Cgs
DRAIN
Cds Ciss = Cgd + Cgs
Coss = Cgd + Cds
Crss = Cgd
LINEARITY AND GAIN CHARACTERISTICS
In addition to the typical IMD and power gain data
presented, Figure 5 may give the designer additional informa-
tion on the capabilities of this device. The graph represents the
small signal unity current gain frequency at a given drain
current level. This is equivalent to fT for bipolar transistors.
Since this test is performed at a fast sweep speed, heating of
the device does not occur. Thus, in normal use, the higher
temperatures may degrade these characteristics to some
extent.
DRAIN CHARACTERISTICS
One figure of merit for a FET is its static resistance in the
full–on condition. This on–resistance, VDS(on), occurs in the
linear region of the output characteristic and is specified under
specific test conditions for gate–source voltage and drain
current. For MOSFETs, VDS(on) has a positive temperature
coefficient and constitutes an important design consideration
at high temperatures, because it contributes to the power
dissipation within the device.
GATE CHARACTERISTICS
The gate of the RF MOSFET is a polysilicon material, and
is electrically isolated from the source by a layer of oxide. The
input resistance is very high — on the order of 109 ohms —
resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage
slightly in excess of the gate–to–source threshold voltage,
VGS(th).
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are
essentially capacitors. Circuits that leave the gate open–cir-
cuited or floating should be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on the
input capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal
monolithic zener diode from gate–to–source. If gate protection
is required, an external zener diode is recommended.
EQUIVALENT TRANSISTOR PARAMETER TERMINOLOGY
Collector Drain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Emitter Source. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Base Gate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V(BR)CES V(BR)DSS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCBO VDGO
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ICID
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ICES IDSS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IEBO IGSS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VBE(on) VGS(th)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCE(sat) VDS(on)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cib Ciss
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cob Coss
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
hfe gfs
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RCE(sat) = VCE(sat)
ICrDS(on) = VDS(on)
ID
MRF148A
6MOTOROLA RF DEVICE DATA
PACKAGE DIMENSIONS
CASE 211–07
ISSUE N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
A
UM
M
Q
RB
1
4
32
D
K
E
SEATING
PLANE
C
J
H
S
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.960 0.990 24.39 25.14
B0.370 0.390 9.40 9.90
C0.229 0.281 5.82 7.13
D0.215 0.235 5.47 5.96
E0.085 0.105 2.16 2.66
H0.150 0.108 3.81 4.57
J0.004 0.006 0.11 0.15
K0.395 0.405 10.04 10.28
M40 50 40 50
Q0.113 0.130 2.88 3.30
R0.245 0.255 6.23 6.47
S0.790 0.810 20.07 20.57
U0.720 0.730 18.29 18.54
____
STYLE 2:
PIN 1. SOURCE
2. GATE
3. SOURCE
4. DRAIN
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MRF148A/D