W742S82A 4BIT MICROCONTROLLER, 16Kx16ROM, 2Kx4RAM DTMF, 160-DOT LCD, 3-OPS Table of Contents1. GENERAL DESCRIPTION ......................................................................................................... 2 2. FEATURES ................................................................................................................................. 2 3. PIN CONFIGURATION ............................................................................................................... 4 4. PIN DESCRIPTION..................................................................................................................... 5 5. BLOCK DIAGRAM ...................................................................................................................... 6 6. ABSOLUTE MAXIMUM RATINGS ............................................................................................. 7 7. DC CHARACTERISTICS ............................................................................................................ 7 7.1 DC CHARACTERISTICS: VDD-VSS=3.0V .................................................................... 7 7.2 DC CHARACTERISTICS: VDD-VSS=3.6V .................................................................. 10 8. AC CHARACTERISTICS .......................................................................................................... 11 9. APPLICATIONS INFORMATION.............................................................................................. 12 10. 9.1 Operating Voltage ......................................................................................................... 12 9.2 FSK Signal Detection and FSK Demodulation ............................................................. 12 9.2.1 FSK Signal Detection ....................................................................................................12 9.2.2 FSK demodulation.........................................................................................................12 REVISION HISTORY ................................................................................................................ 13 -1- Publication Release Date: June 1, 2005 Revision A1 W742S82A 1. GENERAL DESCRIPTION The W742S82A is a high-performance 4-bit microcontroller (C) that provides an LCD driver. The device contains a 4-bit ALU, two 8-bit timers, two dividers (for two oscillators) in dual-clock operation, a 40 x 4 LCD driver, six 4-bit I/O ports (including 1 output port for LED driving), and one channel DTMF generator. There are also five interrupt sources and 16-levels subroutine nesting for interrupt applications. The W742S82A operates on very low current and has two power reduction modes, that is the dual-clock slow operation and STOP mode, which help to minimize power dissipation. 2. FEATURES y Operating voltage: - 2.2V-5.5V (Ffast1:3.60MHz mode) y - 3.2V-5.5V (Ffast2:7.20MHz mode) Dual-clock operation mode (Connect to 32768 Hz crystal only) - Fslow(sub) oscillator : 32768Hz OSC - Ffast1 clock: PLL ( Phase Lock Loop ) outputs 3.60MHz enable y - Ffast2 clock: PLL ( Phase Lock Loop ) outputs 7.20MHz enable Memory - 16384 x 16 bits program ROM (including 64K x 4 bit look-up table) - 2048 x 4 bits data RAM (including 16 nibbles x 16 pages working registers) y - 40 x 4 LCD data RAM 24 input/output pins - Port for input only: 1 ports/4 pins (RC) - Input/output ports: 3 ports/12 pins (RA, RB & RD). RA,RB can be configured with or without internal pull-up resistors with ram mapping registers in input mode. - High sink current output port for LED driving: 1 port /4 pins (RE) y - Port for output only: 1 port/ 4 pins (RF) Power-down mode - Hold function: no operation (main-oscillator and sub-oscillator still operate) - Stop function: no operation (main-oscillator and sub-oscillator are stopped) y - Slow operation mode: system is operated by the sub-oscillator (FOSC=Fs and Fm is stopped) Five types of interrupts - Four internal interrupts (Divider0, Divider1, Timer0, Timer1) y - One external interrupts (RC Port) * LCD driver output - 40 segments x 4 commons - 1/4 duty 1/3 bias driving mode -2- W742S82A y MFP output pin - Output is software selectable as modulating or non-modulating frequency y - Works as frequency output specified by Timer 1 DTMF output pin (PLL should be enabled) - Output is one channel Dual Tone Multi-Frequency signal for dialing - Either in Ffast1 or Ffast2 clock mode. - Three OpAmps(Operational Amplifiers) y - Three general purpose with internal circuit for application. Two built-in 14-bit frequency dividers - Divider0: the clock source is the output of the main-oscillator y - Divider1: the clock source is the output of the sub-oscillator (dual-clock mode) or the Fosc/128 (single-clock mode) Two built-in 8-bit programmable countdown timers - Timer 0: one of two internal clock frequencies (FOSC/4 or FOSC/1024) can be selected y y y - Timer 1: with auto-reload function and one of three internal clock frequencies (FOSC, FOSC/64 or Fs) can be selected by MR1 register; and the specified frequency can be delivered to MFP pin Built-in 18/15-bit watchdog timer selectable for system reset; enable the watch dog timer or not is determined by code option Powerful instruction set 16-levels subroutine (include interrupt) nesting -3- Publication Release Date: June 1, 2005 Revision A1 W742S82A 3. PIN CONFIGURATION D R R R R M T N N A A A A F M N C C 3 2 1 0 P F C T E S T / X R E N I S C N X O U T V X X V N F F C O P P 3 O P N 3 O P O 3 O P P 2 O P N 2 O C P O P N M 1 C 0 C O M 1 C C O V O M D M N 2 D 3 C 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 64 64 63 62 61 60 59 58 57 56 55 54 53 52 51 RB0 RB1 RB2 RB3 RC2 RC3 RD0 RD1 RD2 RD3 RE0 RE1 RE2 RE3 RF0 RF1 RF2 RF3 NC NC 81 82 83 84 85 50 49 48 47 46 86 87 88 89 90 45 44 43 42 41 91 92 93 94 95 40 39 38 37 36 96 35 97 98 99 100 34 33 32 31 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 N N S C C E G 0 S E G 1 S E G 2 S E G 3 S E G 4 S E G 5 S E G 6 S E G 7 S E G 8 S E G 9 S E G 1 0 S E G 1 1 S E G 1 2 S E G 1 3 -4- S E G 1 4 S E G 1 5 S E G 1 6 S E G 1 7 S E G 1 8 S E G 1 9 S E G 2 0 S E G 2 1 S E G 2 2 S N N N V E C C C S G S 2 3 NC NC NC NC SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 W742S82A 4. PIN DESCRIPTION SYMBOL I/O FUNCTION XIN I Input pin for oscillator. Connected to 32.768 KHz crystal only. XOUT O Output pin for oscillator with internal oscillation capacitor. Connected to 32.768 KHz crystal only. VXXF I Regulator for PLL circuit. Connected capacitor (10 uF) to VSS. VF I Low pass filter for PLL circuit. Connected capacitor 0.022uF to VSS. RA0-RA3 I/O Input/Output port with internal pull-up resistors. Input/output mode specified by port mode 1 register (PM1). Internal pull-up resistors are controlled by RAM mapping registers. RB0-RB3 I/O Input/Output port with internal pull-up resistor. Input/output mode specified by port mode 2 register (PM2). Internal pull-up resistors are controlled by RAM mapping registers. RC2-RC3 I RD0-RD3 I/O Input/Output port. Input/output mode specified by port mode 5 register (PM5). RE0-RE3 O Output port only. With high sink current capacity for the LED application. RF0-RF3 O Output port only. MFP O Output pin only. This pin can output modulating or non-modulating frequency, or Timer 1 specified frequency. It can be selected by bit 0 of BUZCR (BUZCR.0). DTMF O This pin can output dual tone multi frequency signal for dialing. RES I System reset pin with pull-high resistor. SEG0SEG39 O LCD segment output pins. COM0COM3 O LCD common signal output pins. The LCD alternating frequency can be selected by code option. OPP1~3 I OpAmp1~3 positive input pins OPN2~3 I OpAmp1~3 negative input pins OPO3 O OpAmp1~3 output pins TEST I For IC testing. Connected to Vss in normal usage. VDD I Positive power supply (+). VSS I Negative power supply (-). 4-bit port for input only. Each pin has an independent interrupt capability. -5- Publication Release Date: June 1, 2005 Revision A1 W742S82A 5. BLOCK DIAGRAM SEG 0~SEG 39 C O M 0~C O M 3 LCD RAM (2 0 4 8 * 4 ) ACC ROM (1 6 3 8 4 *1 6 (lo o k _ u p ta b le 6 4 K *4 ) PORT R A 0 -3 PORT R B 0 -3 PORT R C 2 -3 PORT R D 0 -3 PORT R E 0 -3 PORT R F 0 -3 DTMF G e n e ra to r DTMF ALU + 1 (+ 2 ) C e n tra l C o n tro l U n it PC STACK (1 6 L e v e ls ) IE F HEF PEF HCF EVF SEF PSR0 SCR PR PM0 MR0 MR1 PM1 DTMF DTCR . . . SEL MUX T im e r 1 (8 B it) T im e r 0 (8 B it) M o d u la tio n F re q u e n c y D iv id e r 1 (1 2 /1 4 B it) MFP VDD VSS RES W a tc h D o g (4 B it) D iv id e r 0 (1 4 B it) VDD + _ RE3 T im in g G e n e ra to r PLL RC1 1 .1 5 V + + RC0 V SS OPP1 OPN2 OPP2 OPP3 -6- OPN3 OPO3 XOUT X IN W742S82A 6. ABSOLUTE MAXIMUM RATINGS PARAMETER RATING UNIT Supply Voltage to Ground Potential -0.3 to +7.0 V Applied Input/Output Voltage -0.3 to +7.0 V 120 mW 0 to +70 C -55 to +150 C Power Dissipation Ambient Operating Temperature Storage Temperature Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. 7. DC CHARACTERISTICS 7.1 DC CHARACTERISTICS: VDD-VSS=3.0V (VDD-VSS = 3.0 V, Fm = 3.60MHz, Fs = 32.768 KHz, Ta = 25 C, LCD on; unless otherwise specified) PARAMETER SYM. CONDITIONS MIN. TYP. MAX. VDD1 Slow mode and normal mode operation(3.60Mhz) 2.2 - 5.5 VDD2 Slow mode and normal mode operation(7.20Mhz) 3.2 - 5.5 IOP1 No load All OpAmps disabled In dual-clock normal operation(3.60Mhz). - 0.7 1.0 mA IOP2 No load All OpAmps disabled In dual-clock normal operation(7.20Mhz). - 1.1 1.5 mA - 45 65 A - 70 80 A Op. Voltage Op. Current (Crystal type) Op. Current (Crystal type) Op. Current (Crystal type) Op. Current (Crystal type) IOP3 IOP4 No load All OpAmps disabled In dual-clock Fslow operation and Ffast is stopped No load All OpAmps enabled In dual-clock Fslow operation and Ffast is stopped -7- UNIT V Publication Release Date: June 1, 2005 Revision A1 W742S82A DC CHARACTERISTICS: VDD-VSS=3.0V, continued. PARAMETER MIN. TYP. MAX. UNIT IHM1 Hold mode No load All OpAmps disabled In dual-clock normal operation - 310 450 A IHM3 Hold mode No load All OpAmps disabled In dual-clock Fslow operation and Ffast is stopped - 45 55 A IHM4 Hold mode No load All OpAmps enabled In dual-clock Fslow operation and Ffast is stopped - 70 80 A ISM1 Stop mode No load All OpAmps disabled LVR enabled LCD driver should be turned off - 12 15 A Stop Current (Crystal type) ISM2 Stop mode No load All OpAmps disabled LVR disabled LCD driver should be turned off - - 1 A Input Low Voltage VIL - VSS - 0.3VDD V Input High Voltage VIH - 0.7V - VDD V MFP Output Low Voltage VML IOL = 3.5mA - - 0.4 V MFP Output High Voltage VMH IOH = 3.5mA 2.4 - - V Port RA, RB, RD and RF Output Low Voltage VABL IOL = 2.0mA - - 0.4 V Port RA, RB, RD and RF Output high Voltage VABH IOH = 2.0mA 2.4 - - V LCD Supply Current ILCD All Seg. ON - - 6 A Port RE Sink Current IEL VOL = 0.9V 9 - - mA Port RE Source Current IEH VOH = 2.4V 0.4 1.2 - mA DTMF Output DC level VTDC RL=5K, VDD=2.5 to 3.8V 1.1 - 2.8 V Hold Current (Crystal type) Hold Current (Crystal type) Hold Current (Crystal type) Stop Current (Crystal type) SYM. CONDITIONS DD -8- W742S82A DC CHARACTERISTICS: VDD-VSS=3.0V, continued. PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT DTMF Distortion THD RL=5K, VDD=2.5 to 3.8V - -30 -23 dB DTMF Output Voltage VTO Low group, RL=5K 130 150 170 mVrms Col/Row 1 2 3 dB Pre-emphasis Pull-up Resistor RC Port RC 100 350 1000 K Pull-up Resistor RA Port RA 100 350 1000 K Pull-up Resistor RB Port RB 100 350 1000 K - 100 350 1000 K - - 1 A RES Pull-up Resistor OPAMPs OP3 RRES Input Leakage Current IIN Input Resistance RIN 10 - - M Input Offset Voltage VOS - - 25 mV Maximum Capacitive Load CL - - 20 pF Minimum Resistive Load RL 1000 - - K VssVIN VDD -9- Publication Release Date: June 1, 2005 Revision A1 W742S82A 7.2 DC CHARACTERISTICS: VDD-VSS=3.6V (VDD-VSS = 3.6 V, Ffast = 3.60MHz, Fslow = 32.768 KHz, Ta = 25 C, LCD on; Power-on reset circuit active, unless otherwise specified) PARAMETER Op. Current (Crystal type) Op. Current (Crystal type) Op. Current (Crystal type) Op. Current (Crystal type) Hold Current (Crystal type) Hold Current (Crystal type) Hold Current (Crystal type) SYM. CONDITIONS MIN. TYP. MAX. UNIT IOP1 No load (Ext-V) All OpAmps disabled In dual-clock normal operation. - 0.8 1.0 mA IOP2 No load All OpAmps disabled In dual-clock normal operation(7.20Mhz). - 1.3 1.8 mA IOP3 No load (Ext-V) All OpAmps disabled In dual-clock Fslow operation and Ffast is stopped - 45 65 A IOP4 No load (Ext-V) All OpAmps enabled In dual-clock Fslow operation and Ffast is stopped - 80 85 A IHM1 Hold mode No load (Ext-V) All OpAmps disabled In dual-clock normal operation - 360 450 A IHM3 Hold mode No load (Ext-V) All OpAmps disabled In dual-clock Fslow operation and Ffast is stopped - 55 65 A IHM4 Hold mode No load (Ext-V) All OpAmps enabled In dual-clock Fslow operation and Ffast is stopped - 80 85 A - 10 - W742S82A DC CHARACTERISTICS:VDD-VSS=3.6V, continued. PARAMETER MIN. TYP. MAX. UNIT ISM1 Stop mode No load All OpAmps disabled LVR enabled LCD driver should be turned off - 12 15 A ISM2 Stop mode No load All OpAmps disabled LVR disabled LCD driver should be turned off - - 1 A MIN. TYP. MAX. UNIT PLL type - 3.6/7.2 - MHz TI One machine cycle - 4/FOSC - S Reset Active Width TRAW FOSC=32.768 KHz 1 - - S Interrupt Active Width TIAW FOSC=32.768 KHz 1 - - S Stop Current (Crystal type) Stop Current (Crystal type) SYM. CONDITIONS 8. AC CHARACTERISTICS PARAMETER Op. Frequency Instruction cycle time SYM. FOSC CONDITIONS - 11 - Publication Release Date: June 1, 2005 Revision A1 W742S82A 9. APPLICATIONS INFORMATION 9.1 Operating Voltage The chip can be operated from 2.2V-5.5V(Ffast1:3.60Mhz). If users have much consideration for low power operation, lower voltage supply system can be a better choice. 9.2 FSK Signal Detection and FSK Demodulation 9.2.1 FSK Signal Detection Figure 9-1 is a typical application circuit for FSK signal detection and FSK demodulation. For purpose of signal detection, user should enable both OP2 and OP3, output low to control and sense the signal by RC.n. 9.2.2 FSK demodulation For purpose of FSK demodulation, user should enable both OP2 and OP3, output high to control, and sense the FSK signal by RC.n. and demodulate FSK by software. Figure 9-1 Application Circuit for FSK Signal Detection and FSK demodulation - 12 - W742S82A 10. REVISION HISTORY VERSION DATE PAGE DESCRITION A1 Jun 1, 2005 - Initial Issued Important Notice Winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Further more, Winbond products are not intended for applications wherein failure of Winbond products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales. Headquarters Winbond Electronics Corporation America Winbond Electronics (Shanghai) Ltd. No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5665577 http://www.winbond.com.tw/ 2727 North First Street, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-5441798 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Taipei Office Winbond Electronics Corporation Japan Winbond Electronics (H.K.) Ltd. 9F, No.480, Rueiguang Rd., Neihu Chiu, Taipei, 114, Taiwan, R.O.C. TEL: 886-2-8177-7168 FAX: 886-2-8751-3579 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners. - 13 - Publication Release Date: June 1, 2005 Revision A1