ANALOG Complete 12-Bit 5 MSPS DEVICES Monolithic A/D Converter AD871 1.1 Scope. This specification covers the detail requirements for a complete monolithic 12-bit, 5 Msps A/D converter with an on-chip, high performance track-and-hold amplifier (THA) and voltage reference. 1.2 Part Number. The complete part number per Table 1 of this specification is as follows: Device Part Number -1 AD871SD/883B 2 AD871SE/883B 1.2.3 Case Outline. See Appendix 1 of General Specification ADI-M-1000: package outline: (X) Package Description D = D-28 28-Pin Side Brazed Ceramic DIP E E-44A 44-Pin LCC 1.3 Absolute Maximum Ratings. (T, = +25C unless otherwise noted) AVpp to AGND .. 0... etn eee e en neenes -0.5 V to +6.5 V AVgg tO AGND 2.0.0.0 e ccc cence eee ete e vent eneney -6.5 V to +0.5 V DVpp> DRVpp to DGND .... 0.0 cee cece ce cece een e eee eee eens -0,5 Vto +6.5V AGND toDGND 2.0... i ce tent n cnet nee nnes -1Vto+1V AVpp 10 DVpp 66. eect eee nee ent n eee eben eens -6.5 V to +6.5 V Clock Input, OEN toDGND 3.2.0... cece eee ~0.5 V to DVpp + 0.5 V Digital Outputs to DGND ... 2... ce tent e ene 0.5 V to DVpp + 0.3 V REF IN to AVpp ..- 6... ee een teen ete ee eeeenes AVsz to 0 V REF IN to AVgp 0... ce ttn een ee een teen tneeteees 0V tc AVpp Vinas Vins REF IN toAGND .... 2.0. enn eens 6.5 V to +6.5 V Storage Temperature Range ..... 0.0... ccc cece ee nee ne neeen 65C to +150C Lead Temperature Range (Soldering 10 sec)... 2... 0. ec ee ee teenies +300C 1.5 Thermal Characteristics. Thermal Resistance: 0;, = 25C/W for D-28 8s, = 60C/W for D-28 Bjc = 42C/W for E-44A Oy, = 70C/W for E-44A REV. A ANALOG-TO-DIGITAL CONVERTERS 6-51 ANALOG-TO-DIGITAL CONVERTERS aAD871SPECIFICATIONS Table 1. Design |Sub [Sub Limit Group |Group Test Symbol |Device|@ +25C/|1 2,3 |Test Condition Units Resolution RES -1 12 12 12 Bits Differential Nonlinearity! DNL -1 12 12 12 All Codes Histogram Bits Zero Error Bror -1 0.75 0.75 +% FSR max Gain Error Ag -1 1.25 1.25 +% FSR max Zero Error Drift TCBpog |-1 0.30 |External 2.5 V Reference |+% FSR max Gain Error Drift TCA;wr |-1 1.75 |Internal 2.5 V Reference |+% FSR max Gain Error Drift TCAgxr |-1 0.5 External 2.5 V Reference |+% FSR max Power Supply Rejection PSR -1 0.125 0.125 |0.125 |See Note 2 +% FSR max Analog Input Range Vin -1 1 1 1 +V max Input Resistance Rw -1 50 kQ Input Capacitance Cw -1 10 pF Internal Reference Output Voltage Veer -1 2.46 2.46 |2.46 V min 2.54 2.54 12.54 V max Power Dissipation PD -1 13 13 1.3 Watts max Power Supply Current Iavpp |1 88 88 88 mA max lavss 150 150 | 150 Ipvpp 21 21 21 Iprvpp 2 2 2 Signal-to-Noise and Distortion Ratio SKN+D)}-1 62 62 62 fin = 1 MHz; fs = 5 MHz|dB min -2 60 60 60 Total Harmonic Distortion THD -1 63 -63 1-63 |fpy = 1 MHz; fy = 5 MHz/dB max -2 60 -60 |-60 Logic Input High Voltage Vin -1 2.0 2.0 2.0 V min Logic Input Low Voltage Vir -1 0.8 0.8 0.8 V max Logic Input High Current (CLK, OEN?)| I, 1 10 10 10 +pA max Logic Input Low Current (CLK, OEN*) [Ii ~1 10 10 10 +pA max Logic Output High Voltage (MSB-Bit 12, OTR) Vou -1 2.4 2.4 2.4 Tsource = 500 pA V min Logic Output Low Voltage (MSB-Bit 12, OTR) Voi -1 0.4 0.4 0.4 Ig~wx = 1.6 mA V min Leakage* I, -1 10 10 10 Three-State +pA max Clock Period tc -1 200 200 = /200 ns min Output Delay top -1 10 10 10 ns min Pipeline Delay tpp -1 3 Clock Cycles max Clock Pulse Width High tow -1 95 ns min Clock Pulse Width Low te -1 95 ns min Clock Duty Cycle Deyc -1 40 % min 60 % max NOTES Minimum resolution for which no missing codes is guaranteed. ?Test conditions for PSR: 4.75 V = AVpp < 5.25 V, -5.25 V = AVogg = 4.75 V, 4.75 V = DVpp < 5.25 V. 3E-44A package only. 6-52 ANALOG-TO-DIGITAL CONVERTERS REV. AAD871 3.2.1 Functional Block Diagram and Terminal Assignments. AVon AGND Ags OVop DGND O O O REF GND OUTPUT OTR *MSB MSB_BIT 12 (sa) ENABLE *ONLY AVAILABLE ON 44-PIN SURFACE MOUNT PACKAGE. D Package E Package ~ z 8 "ne ls Z| ner ono / SEEEEY PEE . AVss [3 26) REF OUT we Le 2] <A ee oD ano [5 | 24] AGND sono [o] [| nc DGND [e [2s] DGND pano | 10 Apsr4 [26] acno Ovo [7| AD871 [z2] PVon prono [ri Tor mew [is] nc BIT 12 (LSB) [a] (Not wo Serie) [21] CLK DRVop [12] SCALE} [as DRGND BIT 11 [e] [20] oT OEN 13] ey V0 BIT 10 j10 le] MSE we [14] 32) OF Yoo BITs hia] arr ne [rs] [or] cux BIT 12 (LSB) is8} [=] oT? ere [ra] 47] ers ons fr] = BIT7 [i3| ve] BIT4 5 ars [1a] 35] errs \ Lele ole fel fes] fe] eeenreowonn 5 & ESS & ES BIT 1 (SB) rs] ve fa NC = NO CONNECT VIN Net te est J wc, X YX YuxXery YX Figure 1. Timing Diagram REV. A ANALOG-TO-DIGITAL CONVERTERS 6-53 ANALOG-TO-DIGITAL CONVERTERS aAD871 3.2.4 Microcircuit Technology Group. This microcircuit is covered by technology group (93). 4.2.1 Life Test/Burn-In Circuit. Steady state life test is per MIL-STD-883 Method 1005. Burn-in is per MIL-STD-883 Method 1015 test condition (B). #-0 -5V | 7Vrma, | fe pF 60Hz MR-280 47 nF 7 ska AD871 gw +? Vwa REF IN Vw REF GND T 10pF AVgg REF OUT AYoo AVss AGND AGND T > CE doe DGND DGND ne Gy DY, PVop +5V O-@ > _10-4nF: NC [eo] BIT 12 CLK O-SV, tkHz oT z a I 47uF T MR-280 0 NC [2] BIT 11 OTR V NC 410] BIT 10 MSB ne |11 [BITS arr2|ia] Nc my z a ne |12/BIT8 BIT 3} 17] NC nc [13] BIT 7 BIT 418 | NC we [14] BIT 6 BIT 5] 15] NC Oty __ = mg TS oak aS none NC NC a NC a Vv 4 PC -PRl ese] elf- 8 a e ok owe ne [7 [nc Z Z 22332 3 3 z we [se] ne tT wR-2e0| NC [e| ne = AVoo [sa} Vv fe] acwo we[s7] no {r9| D@ND AGND se} [13] prawn NC EI nc Vv [ia| ORVop AD871 DRGND [4h ne [1a] oN DV [82 # Vv ne [14] ne DRVpp [sep ne [15] ne cux| 31 O-BV, thHtz ne [16] err 12 ote | 30] Ne ne [re BIT11 E e ss [22] ne EEE 5 5 5 Oe wc NC NC NC NC NC NC NC NC NC = NO CONNECT 6-54 ANALOG-TO-DIGITAL CONVERTERS REV. A