PF588-05 E0C6251 4-bit Single Chip Microcomputer ge oltan V o Lowerati ts p c O odu Pr Core CPU Architecture SVD Circuit R/F Converter for Temperature Measuring High Quality Display LCD Driver DESCRIPTION The E0C6251 is a single-chip microcomputer made up of the 4-bit core CPU E0C6200A, ROM, RAM, LCD driver, input ports, output ports, I/O ports, clock timer and A/D converter (R/F conversion type). Because of its low-voltage operation and low power consumption, this series is ideal for a wide range of applications, and is especially suitable for battery-driven systems. FEATURES CMOS LSI 4-bit parallel processing Clock ..................................................... 32.768kHz (Typ.) (Crystal or CR oscillation) Instruction set ........................................ 100 instructions Instruction execution time ..................... 153sec, 214sec, 366sec (depending on instruction) ROM capacity ....................................... 1,024 x 12 bits RAM capacity ........................................ 80 x 4 bits Input port ............................................... 4 bits (pull-down resistors are available by mask option) Output port ............................................ 4 bits (common, BZ, BZ, FOUT and LAMP ports are available by mask option) I/O port .................................................. 4 bits Large capacity output port .................... 2 bits Buzzer output port ................................ 2 bits Clock output port ................................... 1 bit A/D converter ........................................ R/F (resistance/frequency) conversion type, 1ch. LCD driver ............................................. 26 segments x 2/3/4 commons (Power regulator built-in. DC output available. Selected duty by software setting) R/F converter circuit ..............................Temperature measurement is possible with the R/F converter in which a external thermistor. Range of temperature measurement and accuracy of temperature measurement changed by thermistor. Built-in supply voltage detection (SVD) circuit .......................................... 1ch. Timer ..................................................... Clock timer : 1ch. Interrupts ............................................... External : Input interrupt 1 line Internal : Timer interrupt 1 line R/F converter interrupt 1 line Supply voltage ...................................... 1.5V (0.9 to 2.0V min. 1.0V: Measurement temperature mode) 3.0V (1.8 to 3.5V) Current consumption ............................ HALT mode : 1.0A (Typ.) : 2.5A (Typ.) OPERATING mode : 2.5A (Typ.) : 5.0A (Typ.) Package ................................................ QFP6-60pin (ceramic), QFP6-64pin (plastic) Die form LINE UP Model Operating voltage Clock E0C62L51 0.9V to 2.0V 32.768kHz (Crystal or CR oscillation) E0C6251 1.8V to 3.5V 32.768kHz (Crystal or CR oscillation) SEIKO EPSON CORPORATION 1 E0C6251 ROM 1,024 words x 12 bits RESET OSC1 OSC2 BLOCK DIAGRAM OSC System Reset Control Core CPU E0C6200A RAM 80 words x 4 bits COM0~3 SEG0~25 Interrupt Generator LCD Driver Input Port Test Port K00~03 I/O Port P00~03 Output Port R00~03 TEST VDD VL1~3 CA~CC VS1 VSS Power Controller SVD Timer Fout & Buzzer A/D Converter FOUT / BUZZER BUZZER ADOUT RS TH CS PIN CONFIGURATION QFP6-60pin (ceramic) 45 31 46 30 E0C6251 INDEX 60 16 1 QFP6-64pin (plastic) 15 48 33 32 49 E0C6251 INDEX 17 64 1 2 16 No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Pin name COM3 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 TEST No. 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Pin name SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 VDD VS1 No. 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 Pin name P00 P01 P02 P03 RESET K00 K01 K02 K03 R00 R01 R02 R03 CS RS No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin name COM2 COM3 N.C. SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 No. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Pin name TEST SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 VDD VS1 No. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin name No. Pin name P00 49 CS P01 50 RS P02 51 TH P03 52 ADOUT RESET 53 VDD K00 54 OSC1 K01 55 OSC2 K02 56 VSS K03 57 CA R00 58 CB R01 59 CC R02 60 VL1 R03 61 VL2 N.C. 62 VL3 N.C. 63 COM0 N.C. 64 COM1 N.C. = No Connection No. 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Pin name TH ADOUT VDD OSC1 OSC2 VSS CA CB CC VL1 VL2 VL3 COM0 COM1 COM2 E0C6251 PIN DESCRIPTION Pin name VDD VSS VS1 VL1 VL2 VL3 CA-CC OSC1 OSC2 K00-K03 P00-P03 R00-R03 SEG0-25 COM0-3 CS RS TH ADOUT RESET TEST Pin No. QFP6-60pin QFP6-64pin 29, 48 31, 53 51 56 30 32 55 60 56 61 57 62 52-54 57-59 49 54 50 55 36-39 38-41 31-34 33-36 40-43 42-45 2-14, 16-28 4-16, 18-30 58-60, 1 63, 64, 1, 2 44 49 45 50 46 51 47 52 35 37 15 17 In/Out I I O O O O - I O I I/O O O O I O O O I I Function Power source (+) terminal Power source (-) terminal Oscillation and internal logic system regulated voltage output terminal LCD system regulated voltage output terminal (approx. -1.05 V) LCD system booster output terminal (VL1 x 2) LCD system booster output terminal (VL1 x 3) Booster capacitor connecting terminal Crystal or CR oscillation input terminal Crystal or CR oscillation output terminal Input terminal I/O terminal Output terminal LCD segment output terminal (Convertible to DC output by mask option) LCD common output terminal A/D converter CR oscillation input terminal A/D converter CR oscillation output terminal A/D converter CR oscillation output terminal A/D converter oscillation frequency output terminal Initial reset input terminal Test input terminal ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Symbol Rating VSS Supply voltage VI Input voltage (1) VIOSC Input voltage (2) Topr Operating temperature Tstg Storage temperature Tsol Soldering temperature / Time PD Permissible dissipation *1 1: In case of plastic package (QFP6-64pin). (VDD=0V) Unit V V V C C - mW Value -5.0 to 0.5 VSS - 0.3 to 0.5 VSS - 0.3 to 0.5 -20 to 70 -65 to 150 260C, 10sec (lead section) 250 Recommended Operating Conditions E0C6251 Condition Supply voltage Oscillation frequency Booster capacitor (1) Booster capacitor (2) Capacitor between VDD and VL1 Capacitor between VDD and VL2 Capacitor between VDD and VL3 Capacitor between VDD and VS1 Symbol Remark VSS VDD=0V fOSC1 Crystal oscillation fOSC2 CR oscillation, R=420k C1 C2 C3 C4 C5 C6 Min. -3.5 0.1 0.1 0.1 0.1 0.1 0.1 Typ. -3.0 32.768 65 (Ta=-20 to 70C) Max. Unit -1.8 V kHz 80 kHz F F F F F F E0C62L51 (Ta=-20 to 70C) Symbol Remark Min. Typ. Max. Unit VSS VDD=0V *3 -2.0 -1.5 -1.1 V VDD=0V, With software control *1 -2.0 -1.5 -0.9 *2 V Oscillation frequency fOSC1 Crystal oscillation 32.768 kHz fOSC2 CR oscillation, R=420k 65 80 kHz Booster capacitor (1) C1 0.1 F Booster capacitor (2) C2 0.1 F Capacitor between VDD and VL1 C3 0.1 F Capacitor between VDD and VL2 C4 0.1 F Capacitor between VDD and VL3 C5 0.1 F Capacitor between VDD and VS1 C6 0.1 F 1: When the heavy load protection mode is set by software and the SVD circuit is turned off. 2: The voltage which can be displayed on the LCD panel will differ according to the characteristics of the LCD panel. 3: When there is no software control during CR oscillation or crystal oscillation. Condition Supply voltage 3 E0C6251 DC Characteristics E0C6251 (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25C, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Characteristic Symbol Condition Min. Typ. Max. Unit High level input voltage (1) VIH1 K00-K03, P00-P03 0.2*VSS 0 V High level input voltage (2) VIH2 RESET, TEST 0.15*VSS 0 V Low level input voltage (1) VIL1 K00-K03, P00-P03 VSS 0.8*VSS V Low level input voltage (2) VIL2 RESET, TEST VSS 0.85*VSS V High level input current (1) IIH1 VIH1=0V, No pull down resistor K00-K03, P00-P03 0 0.5 A High level input current (2) IIH2 VIH2=0V, With pull down resistor K00-K03 5 16 A High level input current (3) IIH3 VIH3=0V, With pull down resistor P00-P03 30 100 A RESET, TEST Low level input current IIL VIL=VSS K00-K03, P00-P03 -0.5 0 A RESET, TEST High level output current (1) IOH1 VOH1=0.1*VSS R02, R03, P00-P03 -1.0 mA High level output current (2) IOH2 VOH2=0.1*VSS R00, R01 -1.0 mA (built-in protection resistance) High level output current (3) IOH3 VOH3=-1.0V ADOUT -100 -10 A Low level output current (1) IOL1 VOL1=0.9*VSS R02, R03, P00-P03 3.0 mA Low level output current (2) IOL2 VOL2=0.9*VSS R00, R01 3.0 mA (built-in protection resistance) Low level output current (3) IOL3 VOL3=-2.0V ADOUT 10 100 A Common output current IOH4 VOH4=-0.05V COM0-COM3 -3 A IOL4 VOL4=VL3+0.05V 3 A Segment output current IOH5 VOH5=-0.05V SEG0-SEG25 -3 A (during LCD output) IOL5 VOL5=VL3+0.05V 3 A Segment output current IOH6 VOH6=0.1*VSS SEG0-SEG25 -300 A (during DC output) IOL6 VOL6=0.9*VSS 300 A E0C62L51 (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=32.768kHz, Ta=25C, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) Characteristic Symbol Condition Min. Typ. Max. Unit High level input voltage (1) VIH1 K00-K03, P00-P03 0.2*VSS 0 V High level input voltage (2) VIH2 RESET, TEST 0.15*VSS 0 V Low level input voltage (1) VIL1 K00-K03, P00-P03 VSS 0.8*VSS V Low level input voltage (2) VIL2 RESET, TEST VSS 0.85*VSS V High level input current (1) IIH1 VIH1=0V, No pull down resistor K00-K03, P00-P03 0 0.5 A High level input current (2) IIH2 VIH2=0V, With pull down resistor K00-K03 2.0 16 A High level input current (3) IIH3 VIH3=0V, With pull down resistor P00-P03 9.0 100 A RESET, TEST Low level input current IIL VIL=VSS K00-K03, P00-P03 -0.5 0 A RESET, TEST High level output current (1) IOH1 VOH1=0.1*VSS R02, R03, P00-P03 -200 A High level output current (2) IOH2 VOH2=0.1*VSS R00, R01 -200 A (built-in protection resistance) High level output current (3) IOH3 ADOUT -100 -10 A VOH3=-1.0V Low level output current (1) R02, R03, P00-P03 700 A IOL1 VOL1=0.9*VSS Low level output current (2) R00, R01 700 A IOL2 VOL2=0.9*VSS (built-in protection resistance) Low level output current (3) ADOUT 10 100 A IOL3 VOL3=-2.0V Common output current COM0-COM3 -3 A IOH4 VOH4=-0.05V 3 A IOL4 VOL4=VL3+0.05V Segment output current SEG0-SEG25 -3 A IOH5 VOH5=-0.05V (during LCD output) 3 A IOL5 VOL5=VL3+0.05V Segment output current SEG0-SEG25 -100 A IOH6 VOH6=0.1*VSS (during DC output) 130 A IOL6 VOL6=0.9*VSS 4 E0C6251 Analog Circuit Characteristics and Current Consumption E0C6251 (Normal Mode) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) (During A/D conversion: RS=49.8k, TH=50k, CS=2,200pF) Characteristic Symbol Condition Min. Typ. Max. Unit Internal voltage VL1 Connect 1M load resistor between VDD and VL1 -1.15 -1.05 -0.95 V (without panel load) VL2 Connect 1M load resistor between VDD and VL2 2*VL1 2*VL1 V (without panel load) -0.1 x0.9 VL3 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 V (without panel load) -0.1 x0.9 SVD voltage VSVD -2.55 -2.40 -2.25 V SVD circuit response time tSVD 100 S Current consumption IOP During HALT 1.0 2.5 A During execution *1 Without panel load 2.5 5.0 A During A/D conversion (HALT) 30 40 A 1: The SVD circuit is turned off. E0C6251 (Heavy Load Protection Mode) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) (During A/D conversion: RS=49.8k, TH=50k, CS=2,200pF) Characteristic Symbol Condition Min. Typ. Max. Unit Internal voltage VL1 Connect 1M load resistor between VDD and VL1 -1.15 -1.05 -0.95 V (without panel load) VL2 Connect 1M load resistor between VDD and VL2 2*VL1 2*VL1 V (without panel load) -0.1 x0.85 VL3 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 V (without panel load) -0.1 x0.85 SVD voltage VSVD -2.55 -2.40 -2.25 V SVD circuit response time tSVD 100 S Current consumption IOP During HALT 2.0 5.5 A During execution *1 Without panel load 5.5 10.0 A During A/D conversion (HALT) 31 41.5 A 1: The SVD circuit is turned off. E0C62L51 (Normal Mode) (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) (During A/D conversion: RS=49.8k, TH=50k, CS=2,200pF) Characteristic Symbol Condition Min. Typ. Max. Unit Internal voltage VL1 Connect 1M load resistor between VDD and VL1 -1.15 -1.05 -0.95 V (without panel load) VL2 Connect 1M load resistor between VDD and VL2 2*VL1 2*VL1 V (without panel load) -0.1 x0.9 VL3 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 V (without panel load) -0.1 x0.9 SVD voltage VSVD -1.30 -1.20 -1.10 V SVD circuit response time tSVD 100 S Current consumption IOP During HALT 1.0 2.5 A During execution *1 Without panel load 2.5 5.0 A During A/D conversion (HALT) 30 40 A 1: The SVD circuit is turned off. E0C62L51 (Heavy Load Protection Mode) (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=32.768kHz, Ta=25C, CG=25pF, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) (During A/D conversion: RS=49.8k, TH=50k, CS=2,200pF) Characteristic Symbol Condition Min. Typ. Max. Unit Internal voltage VL1 Connect 1M load resistor between VDD and VL1 -1.15 -1.05 -0.95 V (without panel load) VL2 Connect 1M load resistor between VDD and VL2 2*VL1 2*VL1 V (without panel load) -0.1 x0.85 VL3 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 V (without panel load) -0.1 x0.85 SVD voltage VSVD -1.30 -1.20 -1.10 V SVD circuit response time tSVD 100 S Current consumption IOP During HALT 2.0 5.5 A During execution *1 Without panel load 5.5 10.0 A During A/D conversion (HALT) 31 41.5 A 1: The SVD circuit is turned off. 5 E0C6251 E0C6251 (CR, Normal Mode) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=65kHz, RCR=420k, Ta=25C, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) (During A/D conversion: RS=49.8k, TH=50k, CS=2,200pF) Characteristic Symbol Condition Min. Typ. Max. Unit Internal voltage VL1 Connect 1M load resistor between VDD and VL1 -1.15 -1.05 -0.95 V (without panel load) VL2 Connect 1M load resistor between VDD and VL2 2*VL1 2*VL1 V (without panel load) -0.1 x0.9 VL3 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 V (without panel load) -0.1 x0.9 SVD voltage VSVD -2.55 -2.40 -2.25 V SVD circuit response time tSVD 100 S Current consumption IOP During HALT 8.0 15.0 A During execution *1 Without panel load 15.0 20.0 A During A/D conversion (HALT) 37 52.5 A 1: The SVD circuit is turned off. E0C6251 (CR, Heavy Load Protection Mode) (Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=65kHz, RCR=420k, Ta=25C, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) (During A/D conversion: RS=49.8k, TH=50k, CS=2,200pF) Characteristic Symbol Condition Min. Typ. Unit Max. Internal voltage VL1 Connect 1M load resistor between VDD and VL1 -1.15 -1.05 -0.95 V (without panel load) VL2 Connect 1M load resistor between VDD and VL2 2*VL1 2*VL1 V (without panel load) -0.1 x0.85 VL3 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 V (without panel load) -0.1 x0.85 SVD voltage VSVD -2.55 -2.40 -2.25 V SVD circuit response time tSVD 100 S Current consumption IOP During HALT 16.0 30.0 A During execution *1 Without panel load 30.0 40.0 A During A/D conversion (HALT) 45 57.5 A 1: The SVD circuit is turned off. E0C62L51 (CR, Normal Mode) (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=65kHz, RCR=420k, Ta=25C, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) (During A/D conversion: RS=49.8k, TH=50k, CS=2,200pF) Characteristic Symbol Condition Min. Typ. Max. Unit Internal voltage VL1 Connect 1M load resistor between VDD and VL1 -1.15 -1.05 -0.95 V (without panel load) VL2 Connect 1M load resistor between VDD and VL2 2*VL1 2*VL1 V (without panel load) -0.1 x0.9 VL3 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 V (without panel load) -0.1 x0.9 SVD voltage VSVD -1.30 -1.20 -1.10 V SVD circuit response time tSVD 100 S Current consumption IOP During HALT 8.0 15.0 A During execution *1 Without panel load 15.0 20.0 A During A/D conversion (HALT) 37 52.5 A 1: The SVD circuit is turned off. E0C62L51 (CR, Heavy Load Protection Mode) (Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=65kHz, RCR=420k, Ta=25C, VS1/VL1-VL3 are internal voltage, C1-C6=0.1F) (During A/D conversion: RS=49.8k, TH=50k, CS=2,200pF) Characteristic Symbol Condition Min. Typ. Max. Unit Internal voltage VL1 Connect 1M load resistor between VDD and VL1 -1.15 -1.05 -0.95 V (without panel load) VL2 Connect 1M load resistor between VDD and VL2 2*VL1 2*VL1 V (without panel load) -0.1 x0.85 VL3 Connect 1M load resistor between VDD and VL3 3*VL1 3*VL1 V (without panel load) -0.1 x0.85 SVD voltage VSVD -1.30 -1.20 -1.10 V SVD circuit response time tSVD 100 S Current consumption IOP During HALT 16.0 30.0 A During execution *1 Without panel load 30.0 40.0 A During A/D conversion (HALT) 45 57.5 A 1: The SVD circuit is turned off. 6 E0C6251 Oscillation Characteristics The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the following characteristics as reference values. E0C6251 (Crystal oscillation circuit) (Unless otherwise specified: VDD=0V, VSS=-3.0V, Crystal: C-002R (CI=35k), CG=25pF, CD=built-in, Ta=25C) Condition Unit Characteristic Symbol Min. Typ. Max. V tsta5sec (VSS) Oscillation start voltage Vsta -1.8 V (VSS) tstp10sec Oscillation stop voltage Vstp -1.8 pF Including the parasitic capacity inside the IC Built-in capacitance (drain) CD 20 f/V ppm VSS=-1.8 to -3.5V Frequency/voltage deviation 5 f/IC ppm Frequency/IC deviation -10 10 f/CG CG=5 to 25pF ppm Frequency adjustment range 40 CG=5pF V (VSS) Harmonic oscillation start voltage Vhho -3.5 Between OSC1 and VDD, VSS Rleak M Permitted leak resistance 200 E0C62L51 (Crystal oscillation circuit) (Unless otherwise specified: VDD=0V, VSS=-1.5V, Crystal: C-002R (CI=35k), CG=25pF, CD=built-in, Ta=25C) Min. Typ. Max. Condition Characteristic Symbol Unit -1.1 tsta5sec (VSS) Oscillation start voltage Vsta V tstp10sec (VSS) -1.1(-0.9)*1 Oscillation stop voltage Vstp V 20 Including the parasitic capacity inside the IC Built-in capacitance (drain) CD pF 5 VSS=-1.1 to -2.0V (-0.9) *1 f/V Frequency/voltage deviation ppm 10 f/IC Frequency/IC deviation -10 ppm f/CG CG=5 to 25pF Frequency adjustment range 40 ppm -2.0 (VSS) CG=5pF Harmonic oscillation start voltage Vhho V Permitted leak resistance Between OSC1 and VDD, VSS 200 M Rleak 1: Items enclosed in parentheses ( ) are those used when operating at heavy load protection mode. E0C6251 (CR oscillation circuit) Characteristic Oscillation frequency dispersion Oscillation start voltage Oscillation start time Oscillation stop voltage Symbol fOSC Vsta tsta VSS=-1.8 to -3.5V Vstp (Unless otherwise specified: VDD=0V, VSS=-3.0V, RCR=420k, Ta=25C) Min. Typ. Max. Unit Condition -20 65kHz 20 % -1.8 V (VSS) 3 mS -1.8 V (VSS) E0C62L51 (CR oscillation circuit) Characteristic Oscillation frequency dispersion Oscillation start voltage Oscillation start time Oscillation stop voltage Symbol fOSC Vsta tsta VSS=-1.1 to -2.0V Vstp (Unless otherwise specified: VDD=0V, VSS=-1.5V, RCR=420k, Ta=25C) Min. Typ. Max. Unit Condition -20 65kHz 20 % -1.1 V (VSS) 3 mS -1.1 (VSS) V 7 E0C6251 BASIC EXTERNAL CONNECTION DIAGRAM COM3 COM0 K00 SEG25 SEG0 LCD PANEL CA C1 CB C2 CC I K03 VL1 P00 VL2 C3 C4 C5 VL3 I/O VDD E0C6251 /62L51 P03 CG OSC1 X'tal OSC2 C6 VS1 R00 O RESET 1.5V or 3.0V R02 R03 R01 CS TH RS X'tal CG Cp TEST Vss C1~C6 Cp TH R1 CAD Piezo Buzzer R1 TH CAD Coil Crystal oscillator Trimmer capacitor Capacitor Capacitor Thermistor Resistor Capacitor 32.768kHz CI(Max.)=35k 5~25pF 0.1F 3.3F 50k 49.8k 2,200pF Note: The above table is simply an example, and is not guaranteed to work. PACKAGE DIMENSIONS Plastic QFP6-64pin 17.60.4 16.80.4 140.2 140.1 45 31 48 46 49 140.1 140.2 32 17.60.4 30 INDEX 33 INDEX 60 16 64 15 17 1 0.350.1 16 0.150.05 0 10 0.2 0.85 1.8 0.1 2.70.1 0.8 0.1 2.70.1 0.8 3.05max 1 3.1max 16.80.4 Ceramic QFP6-60pin 0.350.1 0.150.05 0 10 0.60.15 1.4 Unit: mm 8 E0C6251 NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. (c) Seiko Epson Corporation 1999 All right reserved. SEIKO EPSON CORPORATION ELECTRONIC DEVICES MARKETING DIVISION IC Marketing & Engineering Group ED International Marketing Department I (Europe & U.S.A.) 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone : 042-587-5812 FAX : 042-587-5564 ED International Marketing Department II (Asia) 421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone : 042-587-5814 FAX : 042-587-5110