SEIKO EPSON CORPORATION 1
PF588-05
E0C6251
4-bit Single Chip Microcomputer
Low Voltage
Operation
Products
● Core CPU Architecture
● SVD Circuit
● R/F Converter for Temperature Measuring
● High Quality Display LCD Driver
■DESCRIPTION
The E0C6251 is a single-chip microcomputer made up of the 4-bit core CPU E0C6200A, ROM, RAM, LCD
driver, input ports, output ports, I/O ports, clock timer and A/D converter (R/F conversion type). Because of its
low-voltage operation and low power consumption, this series is ideal for a wide range of applications, and is
especially suitable for battery-driven systems.
■FEATURES
● CMOS LSI 4-bit parallel processing
● Clock .....................................................32.768kHz (Typ.) (Crystal or CR oscillation)
● Instruction set........................................100 instructions
● Instruction execution time .....................153µsec, 214µsec, 366µsec (depending on instruction)
● ROM capacity .......................................1,024 × 12 bits
● RAM capacity........................................80 × 4 bits
● Input port...............................................4 bits (pull-down resistors are available by mask option)
● Output port ............................................4 bits (common, BZ, BZ, FOUT and LAMP ports are available by
mask option)
● I/O port ..................................................4 bits
● Large capacity output port ....................2 bits
● Buzzer output port ................................2 bits
● Clock output port...................................1 bit
● A/D converter ........................................R/F (resistance/frequency) conversion type, 1ch.
● LCD driver.............................................26 segments × 2/3/4 commons (Power regulator built-in. DC output
available. Selected duty by software setting)
● R/F converter circuit..............................Temperature measurement is possible with the R/F converter in
which a external thermistor. Range of temperature measurement
and accuracy of temperature measurement changed by thermistor.
● Built-in supply voltage detection
(SVD) circuit..........................................1ch.
● Timer.....................................................Clock timer : 1ch.
● Interrupts...............................................External : Input interrupt 1 line
Internal : Timer interrupt 1 line
R/F converter interrupt 1 line
● Supply voltage ......................................1.5V (0.9 to 2.0V min. 1.0V: Measurement temperature mode)
3.0V (1.8 to 3.5V)
● Current consumption ............................HALT mode : 1.0µA (Typ.)
: 2.5µA (Typ.)
OPERATING mode : 2.5µA (Typ.)
: 5.0µA (Typ.)
● Package ................................................QFP6-60pin (ceramic), QFP6-64pin (plastic)
Die form
■LINE UP
Model Operating voltage
0.9V to 2.0V
1.8V to 3.5V
E0C62L51
E0C6251
Clock
32.768kHz (Crystal or CR oscillation)
32.768kHz (Crystal or CR oscillation)
2
E0C6251
■BLOCK DIAGRAM
■PIN CONFIGURATION
QFP6-60pin
(ceramic)
COM0~3
V
K00~03
P00~03
R00~03
DD
OSC1
OSC2
RESET
SEG0~25 TEST
V
L1~3
CA~CC
V
S1
V
SS
Power
Controller
LCD Driver
RAM
80 words x 4 bits
ROM
1,024 words x 12 bits
OSC
System Reset
Control
Fout & Buzzer
Interrupt
Generator
Input Port
Test Port
I/O Port
Output Port
Timer
A/D Converter
Core CPU E0C6200A
SVD
FOUT / BUZZER
BUZZER
ADOUT
RS
TH
CS
QFP6-64pin
(plastic)
3145
16
30
INDEX
151
60
46
E0C6251
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
COM3
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
TEST
No. Pin name 16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
V
DD
V
S1
No. Pin name 31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
P00
P01
P02
P03
RESET
K00
K01
K02
K03
R00
R01
R02
R03
CS
RS
No. Pin name 46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
TH
ADOUT
V
DD
OSC1
OSC2
V
SS
CA
CB
CC
V
L1
V
L2
V
L3
COM0
COM1
COM2
No. Pin name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
COM2
COM3
N.C.
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
No. Pin name 17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
TEST
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
V
DD
V
S1
No. Pin name 33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
P00
P01
P02
P03
RESET
K00
K01
K02
K03
R00
R01
R02
R03
N.C.
N.C.
N.C.
N.C. = No Connection
No. Pin name 49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
CS
RS
TH
ADOUT
V
DD
OSC1
OSC2
V
SS
CA
CB
CC
V
L1
V
L2
V
L3
COM0
COM1
No. Pin name
3348
17
32
INDEX
64
49
E0C6251
161
3
E0C6251
■PIN DESCRIPTION
V
DD
V
SS
V
S1
V
L1
V
L2
V
L3
CA–CC
OSC1
OSC2
K00–K03
P00–P03
R00–R03
SEG0–25
COM0–3
CS
RS
TH
ADOUT
RESET
TEST
Pin name
I
I
O
O
O
O
–
I
O
I
I/O
O
O
O
I
O
O
O
I
I
In/Out
Power source (+) terminal
Power source (-) terminal
Oscillation and internal logic system regulated voltage output terminal
LCD system regulated voltage output terminal (approx. -1.05 V)
LCD system booster output terminal (V
L1
x 2)
LCD system booster output terminal (V
L1
x 3)
Booster capacitor connecting terminal
Crystal or CR oscillation input terminal
Crystal or CR oscillation output terminal
Input terminal
I/O terminal
Output terminal
LCD segment output terminal (Convertible to DC output by mask option)
LCD common output terminal
A/D converter CR oscillation input terminal
A/D converter CR oscillation output terminal
A/D converter CR oscillation output terminal
A/D converter oscillation frequency output terminal
Initial reset input terminal
Test input terminal
QFP6-60pin
29, 48
51
30
55
56
57
52–54
49
50
36–39
31–34
40–43
2–14, 16–28
58–60, 1
44
45
46
47
35
15
QFP6-64pin
31, 53
56
32
60
61
62
57–59
54
55
38–41
33–36
42–45
4–16, 18–30
63, 64, 1, 2
49
50
51
52
37
17
Pin No. Function
■ELECTRICAL CHARACTERISTICS
●Absolute Maximum Ratings
Rating
Supply voltage
Input voltage (1)
Input voltage (2)
Operating temperature
Storage temperature
Soldering temperature / Time
Permissible dissipation *
1
∗1: In case of plastic package (QFP6-64pin).
Symbol
V
SS
V
I
V
IOSC
Topr
Tstg
Tsol
P
D
Value
-5.0 to 0.5
V
SS
- 0.3 to 0.5
V
SS
- 0.3 to 0.5
-20 to 70
-65 to 150
260°C, 10sec (lead section)
250
Unit
V
V
V
°C
°C
–
mW
(V
DD
=0V)
●Recommended Operating Conditions
E0C6251 Condition
Supply voltage
Oscillation frequency
Booster capacitor (1)
Booster capacitor (2)
Capacitor between VDD and VL1
Capacitor between VDD and VL2
Capacitor between VDD and VL3
Capacitor between VDD and VS1
Symbol
VSS
fOSC1
fOSC2
C1
C2
C3
C4
C5
C6
Remark
VDD=0V
Crystal oscillation
CR oscillation, R=420kΩ
Unit
V
kHz
kHz
µF
µF
µF
µF
µF
µF
(Ta=-20 to 70°C)
Max.
-1.8
80
Typ.
-3.0
32.768
65
Min.
-3.5
0.1
0.1
0.1
0.1
0.1
0.1
E0C62L51
Condition
Supply voltage
Oscillation frequency
Booster capacitor (1)
Booster capacitor (2)
Capacitor between VDD and VL1
Capacitor between VDD and VL2
Capacitor between VDD and VL3
Capacitor between VDD and VS1
∗1:
∗2:
∗3:
When the heavy load protection mode is set by software and the SVD circuit is turned off.
The voltage which can be displayed on the LCD panel will differ according to the characteristics of the LCD panel.
When there is no software control during CR oscillation or crystal oscillation.
Symbol
VSS
fOSC1
fOSC2
C1
C2
C3
C4
C5
C6
Remark
VDD=0V *3
VDD=0V, With software control *1
Crystal oscillation
CR oscillation, R=420kΩ
Unit
V
V
kHz
kHz
µF
µF
µF
µF
µF
µF
(Ta=-20 to 70°C)
Max.
-1.1
-0.9 *2
80
Typ.
-1.5
-1.5
32.768
65
Min.
-2.0
-2.0
0.1
0.1
0.1
0.1
0.1
0.1
4
E0C6251
●DC Characteristics
E0C6251
Unit
V
V
V
V
µA
µA
µA
µA
mA
mA
µA
mA
mA
µA
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25°C, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
Max.
0
0
0.8•VSS
0.85•VSS
0.5
16
100
0
-1.0
-1.0
-10
100
-3
-3
-300
Typ.Min.
0.2•VSS
0.15•VSS
VSS
VSS
0
5
30
-0.5
-100
3.0
3.0
10
3
3
300
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
High level output current (3)
Low level output current (1)
Low level output current (2)
Low level output current (3)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
Symbol
VIH1
VIH2
VIL1
VIL2
IIH1
IIH2
IIH3
IIL
IOH1
IOH2
IOH3
IOL1
IOL2
IOL3
IOH4
IOL4
IOH5
IOL5
IOH6
IOL6
VIH1=0V, No pull down resistor
VIH2=0V, With pull down resistor
VIH3=0V, With pull down resistor
VIL=VSS
VOH1=0.1•VSS
VOH2=0.1•VSS
(built-in protection resistance)
VOH3=-1.0V
VOL1=0.9•VSS
VOL2=0.9•VSS
(built-in protection resistance)
VOL3=-2.0V
VOH4=-0.05V
VOL4=VL3+0.05V
VOH5=-0.05V
VOL5=VL3+0.05V
VOH6=0.1•VSS
VOL6=0.9•VSS
Condition K00–K03, P00–P03
RESET, TEST
K00–K03, P00–P03
RESET, TEST
K00–K03, P00–P03
K00–K03
P00–P03
RESET, TEST
K00–K03, P00–P03
RESET, TEST
R02, R03, P00–P03
R00, R01
ADOUT
R02, R03, P00–P03
R00, R01
ADOUT
COM0–COM3
SEG0–SEG25
SEG0–SEG25
E0C62L51
Unit
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=32.768kHz, Ta=25°C, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
Max.
0
0
0.8•VSS
0.85•VSS
0.5
16
100
0
-200
-200
-10
100
-3
-3
-100
Typ.Min.
0.2•VSS
0.15•VSS
VSS
VSS
0
2.0
9.0
-0.5
-100
700
700
10
3
3
130
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
High level output current (3)
Low level output current (1)
Low level output current (2)
Low level output current (3)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
Symbol
VIH1
VIH2
VIL1
VIL2
IIH1
IIH2
IIH3
IIL
IOH1
IOH2
IOH3
IOL1
IOL2
IOL3
IOH4
IOL4
IOH5
IOL5
IOH6
IOL6
VIH1=0V, No pull down resistor
VIH2=0V, With pull down resistor
VIH3=0V, With pull down resistor
VIL=VSS
VOH1=0.1•VSS
VOH2=0.1•VSS
(built-in protection resistance)
VOH3=-1.0V
VOL1=0.9•VSS
VOL2=0.9•VSS
(built-in protection resistance)
VOL3=-2.0V
VOH4=-0.05V
VOL4=VL3+0.05V
VOH5=-0.05V
VOL5=VL3+0.05V
VOH6=0.1•VSS
VOL6=0.9•VSS
Condition K00–K03, P00–P03
RESET, TEST
K00–K03, P00–P03
RESET, TEST
K00–K03, P00–P03
K00–K03
P00–P03
RESET, TEST
K00–K03, P00–P03
RESET, TEST
R02, R03, P00–P03
R00, R01
ADOUT
R02, R03, P00–P03
R00, R01
ADOUT
COM0–COM3
SEG0–SEG25
SEG0–SEG25
5
E0C6251
●Analog Circuit Characteristics and Current Consumption
E0C6251 (Normal Mode)
∗1: The SVD circuit is turned off.
Unit
V
V
V
V
µS
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
(During A/D conversion: RS=49.8kΩ, TH=50kΩ, CS=2,200pF)
Max.
-0.95
2•VL1
×0.9
3•VL1
×0.9
-2.25
100
2.5
5.0
40
Typ.
-1.05
-2.40
1.0
2.5
30
Min.
-1.15
2•VL1
-0.1
3•VL1
-0.1
-2.55
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
IOP
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
During HALT
During execution *1
During A/D conversion (HALT) Without panel load
E0C6251 (Heavy Load Protection Mode)
∗1: The SVD circuit is turned off.
Unit
V
V
V
V
µS
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
(During A/D conversion: RS=49.8kΩ, TH=50kΩ, CS=2,200pF)
Max.
-0.95
2•VL1
×0.85
3•VL1
×0.85
-2.25
100
5.5
10.0
41.5
Typ.
-1.05
-2.40
2.0
5.5
31
Min.
-1.15
2•VL1
-0.1
3•VL1
-0.1
-2.55
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
IOP
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
During HALT
During execution *1
During A/D conversion (HALT) Without panel load
E0C62L51 (Normal Mode)
∗1: The SVD circuit is turned off.
Unit
V
V
V
V
µS
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
(During A/D conversion: RS=49.8kΩ, TH=50kΩ, CS=2,200pF)
Max.
-0.95
2•VL1
×0.9
3•VL1
×0.9
-1.10
100
2.5
5.0
40
Typ.
-1.05
-1.20
1.0
2.5
30
Min.
-1.15
2•VL1
-0.1
3•VL1
-0.1
-1.30
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
IOP
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
During HALT
During execution *1
During A/D conversion (HALT) Without panel load
E0C62L51 (Heavy Load Protection Mode)
∗1: The SVD circuit is turned off.
Unit
V
V
V
V
µS
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
(During A/D conversion: RS=49.8kΩ, TH=50kΩ, CS=2,200pF)
Max.
-0.95
2•VL1
×0.85
3•VL1
×0.85
-1.10
100
5.5
10.0
41.5
Typ.
-1.05
-1.20
2.0
5.5
31
Min.
-1.15
2•VL1
-0.1
3•VL1
-0.1
-1.30
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
IOP
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
During HALT
During execution *1
During A/D conversion (HALT) Without panel load
6
E0C6251
E0C6251 (CR, Normal Mode)
∗1: The SVD circuit is turned off.
Unit
V
V
V
V
µS
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=65kHz, RCR=420kΩ, Ta=25°C, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
(During A/D conversion: RS=49.8kΩ, TH=50kΩ, CS=2,200pF)
Max.
-0.95
2•VL1
×0.9
3•VL1
×0.9
-2.25
100
15.0
20.0
52.5
Typ.
-1.05
-2.40
8.0
15.0
37
Min.
-1.15
2•VL1
-0.1
3•VL1
-0.1
-2.55
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
IOP
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
During HALT
During execution *1
During A/D conversion (HALT) Without panel load
E0C6251 (CR, Heavy Load Protection Mode)
∗1: The SVD circuit is turned off.
Unit
V
V
V
V
µS
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=65kHz, RCR=420kΩ, Ta=25°C, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
(During A/D conversion: RS=49.8kΩ, TH=50kΩ, CS=2,200pF)
Max.
-0.95
2•VL1
×0.85
3•VL1
×0.85
-2.25
100
30.0
40.0
57.5
Typ.
-1.05
-2.40
16.0
30.0
45
Min.
-1.15
2•VL1
-0.1
3•VL1
-0.1
-2.55
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
IOP
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
During HALT
During execution *1
During A/D conversion (HALT) Without panel load
E0C62L51 (CR, Normal Mode)
∗1: The SVD circuit is turned off.
Unit
V
V
V
V
µS
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=65kHz, RCR=420kΩ, Ta=25°C, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
(During A/D conversion: RS=49.8kΩ, TH=50kΩ, CS=2,200pF)
Max.
-0.95
2•VL1
×0.9
3•VL1
×0.9
-1.10
100
15.0
20.0
52.5
Typ.
-1.05
-1.20
8.0
15.0
37
Min.
-1.15
2•VL1
-0.1
3•VL1
-0.1
-1.30
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
IOP
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
During HALT
During execution *1
During A/D conversion (HALT) Without panel load
E0C62L51 (CR, Heavy Load Protection Mode)
∗1: The SVD circuit is turned off.
Unit
V
V
V
V
µS
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC=65kHz, RCR=420kΩ, Ta=25°C, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
(During A/D conversion: RS=49.8kΩ, TH=50kΩ, CS=2,200pF)
Max.
-0.95
2•VL1
×0.85
3•VL1
×0.85
-1.10
100
30.0
40.0
57.5
Typ.
-1.05
-1.20
16.0
30.0
45
Min.
-1.15
2•VL1
-0.1
3•VL1
-0.1
-1.30
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Current consumption
Symbol
VL1
VL2
VL3
VSVD
tSVD
IOP
Condition
Connect 1MΩ load resistor between VDD and VL1
(without panel load)
Connect 1MΩ load resistor between VDD and VL2
(without panel load)
Connect 1MΩ load resistor between VDD and VL3
(without panel load)
During HALT
During execution *1
During A/D conversion (HALT) Without panel load
7
E0C6251
●Oscillation Characteristics
The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the follow-
ing characteristics as reference values.
E0C6251 (Crystal oscillation circuit)
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
Max.
5
10
-3.5
Typ.
20
Min.
-1.8
-1.8
-10
40
200
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Condition
t
sta≤5sec
t
stp≤10sec
Including the parasitic capacity inside the IC
V
SS
=-1.8 to -3.5V
C
G
=5 to 25pF
C
G
=5pF
Between OSC1 and V
DD
, V
SS
(V
SS
)
(V
SS
)
(V
SS
)
E0C62L51 (Crystal oscillation circuit)
∗1: Items enclosed in parentheses ( ) are those used when operating at heavy load protection mode.
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
Max.
5
10
-2.0
Typ.
20
Min.
-1.1
-1.1(-0.9)*
1
-10
40
200
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Condition
t
sta≤5sec
t
stp≤10sec
Including the parasitic capacity inside the IC
V
SS
=-1.1 to -2.0V (-0.9) *
1
C
G
=5 to 25pF
C
G
=5pF
Between OSC1 and V
DD
, V
SS
(V
SS
)
(V
SS
)
(V
SS
)
E0C6251 (CR oscillation circuit)
Unit
%
V
mS
V
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, R
CR
=420kΩ, Ta=25°C)
Max.
20
Typ.
65kHz
3
Min.
-20
-1.8
-1.8
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
f
OSC
Vsta
t
sta
Vstp
Condition
V
SS
=-1.8 to -3.5V (V
SS
)
(V
SS
)
E0C62L51 (CR oscillation circuit)
Unit
%
V
mS
V
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, R
CR
=420kΩ, Ta=25°C)
Max.
20
Typ.
65kHz
3
Min.
-20
-1.1
-1.1
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
f
OSC
Vsta
t
sta
Vstp
Condition
V
SS
=-1.1 to -2.0V (V
SS
)
(V
SS
)
8
E0C6251
CA
CB
CC
V
V
V
V
OSC1
OSC2
V
RESET
C1
C2
C3
C4
C5
C
C6
X'tal
L1
L2
L3
DD
S1 1.5V
or
3.0V
Piezo
Buzzer
R01
K00
K03
I
I/O
O
SEG0
SEG25
COM0
COM3
LCD PANEL
E0C6251
/62L51
Coil
G
Cp
RS
TH
CS
CAD
R1 TH
R00
R02
R03
P00
P03
TEST
Vss
X'tal
CG
C1~C6
Cp
TH
R1
CAD
Crystal oscillator
Trimmer capacitor
Capacitor
Capacitor
Thermistor
Resistor
Capacitor
32.768kHz CI(Max.)=35kΩ
5~25pF
0.1µF
3.3µF
50kΩ
49.8kΩ
2,200pF
■BASIC EXTERNAL CONNECTION DIAGRAM
Note: The above table is simply an example, and is not guaranteed to work.
■PACKAGE DIMENSIONS
Ceramic QFP6-60pin Plastic QFP6-64pin
Unit: mm
14±0.2
17.6±0.4
3145
14±0.2
17.6±0.4
16
30
INDEX
0.35±0.1
151
60
46
2.7±0.1
0.1
3.1max
1.8
0.85±0.2
0°
10°
0.15±0.05
0.8
14±0.1
16.8±0.4
3348
14±0.1
16.8±0.4
17
32
INDEX
0.35±0.1
161
64
49
2.7±0.1
0.1
3.05max
1.4
0.6±0.15
0°
10°
0.15±0.05
0.8
E0C6251
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko
Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of
any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that
this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual
property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this
material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the
subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an
export license from the Ministry of International Trade and Industry or other approval from another government agency.
© Seiko Epson Corporation 1999 All right reserved.
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
ED International Marketing Department I (Europe & U.S.A.)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5812 FAX : 042-587-5564
ED International Marketing Department II (Asia)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5814 FAX : 042-587-5110
