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DEMO MANUAL DC2063A
Description
LTC2875
±60V Fault Protected 3.3V or 5V
High Speed CAN Transceiver
Demonstration circuit 2063A is a robust high speed, low
power, ISO 11898-2 compliant CAN transceiver featuring
the LT C
®
2875. The demo circuit operates on 3.3V or 5V
supplies and features ±60V overvoltage fault protection on
the data transmission lines during all modes of operation.
The demo circuit contains all the components necessary
to demonstrate the features of the LTC2875 in a CAN
network, including a terminated SMB jack for TXD data
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
performance summary
operating principles
input, jumper selectable CAN bus termination (supporting
either single or split termination configurations), and a
jumper selectable variable slew rate control.
Design files for this circuit board are available at
http://www.linear.com/demo/DC2063A
Specifications are at TA = 25°C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Input Supply Range 3.3V VCC Range 3.0 3.3 3.6 V
5V VCC Range 4.5 5.0 5.5 V
fMAX Maximum Data Rate JP3 in ‘MAX’ position 4 Mbps
Interface I/O: CANH, CANL –60 60 V
Bus Differential Voltage (CANH-CANL) JP2 in ‘SINGLE’ or ‘SPLIT’ position 10 V
The LTC2875 is enabled by pulling the RS pin low. The
slew rate of the transmitter can be controlled by pulling RS
low with a resistor ≤ 200kΩ, with the slew rate decreasing
with increasing resistor value. The DC2063A provides two
jumper positions to enable the LTC2875. With a jumper
in the JP3:MAX position, the RS pin is grounded and the
LTC2875 operates at its maximum slew rate. With a jumper
in the JP3:ADJ position, the transmitter slew rate can be
varied from its minimum to maximum using 200vari-
able resistor RV1. When no jumper is placed on JP3, the
RS pin in the LTC2875 is pulled up by an internal 250
resistor, putting the chip in the shut-down state.
The data input signal can be applied to the LTC2875 TXD pin
through either the TXD turret or the SMB jack J1. To apply
the TXD signal through the SMB jack J1, place a jumper
on the JP1:SMB position. The SMB input is terminated to
GND by a 50Ω resistor. To apply the TXD signal through the
TXD turret, place a jumper on the JP1:TURRET position.
The TXD turret input contains a 100Ω series resistor but is
not terminated. Jumpers may be applied to both JP1:SMB
and JP1:TURRET to enable applying a signal from a pulse
generator through the SMB jack J1 and monitoring the
signal with a scope probe on the TXD turret.
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DEMO MANUAL DC2063A
Quick start proceDure
operating principles
Demonstration circuit 2063A is easy to set up and evaluate
the performance of the LTC2875.
1. Verify the jumpers are in the following default positions:
JP1:SMB ON; JP1:TURRET OFF
JP2: SPLIT
JP3:MAX ON; JP3:ADJ OFF
2. With power off, connect the input power supply to VCC
and GND turrets.
3. Turn on the power at the input.
When TXD is low, the LTC2875 drives the dominant state
onto the CANH and CANL bus lines, with CANH pulled high
and CANL pulled low. When TXD is high, the LTC2875 is
in the recessive state, with both CANH and CANL drivers
in the high impedance state, and the differential voltage on
the CAN bus lines is returned to near zero by the termina-
tion resistors. The TXD pin is pulled high by an internal
500kΩ resistor when it is left floating.
The CAN bus must be terminated at both ends by resis-
tors matched to the impedance of the bus cable, typically
120Ω, while all other nodes on the CAN bus must be
unterminated. The DC2063A provides three jumper select-
able termination configurations: split termination, single
termination, and no termination. The split termination
is selected by placing two jumpers on JP2 in the SPLIT
(vertical) configuration. This provides 120Ω termination
consisting of two series 60Ω resistors with the LTC2875
SPLIT pin and a 4.7nF decoupling capacitor biasing the
termination center point. This configuration lowers the
EME of the transmitted signal by reducing common mode
voltage fluctuations. The single termination is selected by
placing two jumpers on JP2 in the SINGLE (horizontal)
configuration. This provides 120Ω termination consisting
of two series 60Ω resistors with no biasing of the center
point. No termination may be selected by removing both
jumpers from JP2.
The LTC2875 receiver senses the differential voltage on
the CAN bus lines and produces a digital output on the
RXD pin. When a dominant state is sensed on the bus
lines, the RXD output will pull low. When a recessive state
is sensed on the bus lines, the RXD output will pull high.
When the LTC2875 is in the shutdown state, the RXD pin
is pulled high by an internal 500resistor. The LTC2875
RXD pin is connected directly to the DC2063A RXD turret.
NOTE: Make sure the input voltage does not exceed 6V.
4. Connect a function generator to SMB jack J1 and set
to square wave with a low of 0V, high = VCC. Set fre-
quency to 100kHz (200kbps). Enable output of function
generator.
5. Connect oscilloscope to pin RXD and observe 100kHz
waveform. This demonstration shows that data applied
to TXD is transmitted to the CAN bus, looped back
through the receiver, and outputted on RXD.
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DEMO MANUAL DC2063A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
parts list
ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER
Required Circuit Components
1 1 U1 IC, CAN Transceiver LINEAR LTC2875IDD
Hardware/Components (For Demo Board Only)
2 1 C1 Capacitor, 2.2µF, 10%, 0603, 10V, X7R Murata/GRM188R71A225KE15D
3 1 C2 Capacitor, 4700pF 20% 0603, 100V, X7R AVX/06031C472MAT2A
4 1 C3 Capacitor, Tantalum, 6.8µF, 10%, 3216, 16V AVX/TAJA685K016RNJ
5 2 E1, E2 Turret Mill Max/2308-2-00-80-00-00-07-0
6 2 E3, E4 Turret Mill Max/2501-2-00-80-00-00-07-0
7 1 J1 Connector, SMB Male Jack, Straight, 50Ω Amphenol/142138
8 1 J2 Terminal Block, 3 Position, Side Entry 3.5mm TE Connectivity/284391-3
9 3 JP1-3 Header, 2 x 2 0.1" Samtec/TSW-102-07-G-D
10 1 R1 Resistor, 49.9Ω, 1%, 1210 Panasonic/ERJ-14NF49R9U
11 1 R2 Resistor, 100Ω, 5%, 1206 AAC/CR10-101JM
12 2 R3, R4 Resistor 60.4Ω, 1%, 1210 Vishay/CRCW121060R4FKEA
13 1 RV1 Trimmer, 200kΩ, 1-Turn Panasonic/EVM-3VSX50B25
14 4 Standoff, Snap-on Keystone/8833
schematic Diagram
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DEMO MANUAL DC2063A
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2014
LT 1014 • PRINTED IN USA
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This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT
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in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety
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If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date
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