LM211, LM311 Single Comparators The ability to operate from a single power supply of 5.0 V to 30 V or $15 V split supplies, as commonly used with operational amplifiers, makes the LM211/LM311 a truly versatile comparator. Moreover, the inputs of the device can be isolated from system ground while the output can drive loads referenced either to ground, the VCC or the VEE supply. This flexibility makes it possible to drive DTL, RTL, TTL, or MOS logic. The output can also switch voltages to 50 V at currents to 50 mA, therefore, the LM211/LM311 can be used to drive relays, lamps or solenoids. http://onsemi.com MARKING DIAGRAMS 8 Features LM311AN AWL YYWWG PDIP-8 N SUFFIX CASE 626 * These Devices are Pb-Free and are RoHS Compliant 8 1 1 VCC 3.0k VCC RL 5.0k 5 2 6 + Inputs 3 2 + 8 7 Inputs 3 Output - 1 7 Inputs 3 2 Output 1 4 1 x A WL, L YY, Y WW, W G G Single Supply 7 Inputs - 1 1 VCC 8 + Output 3 + 8 - 1 7 VEE PIN CONNECTIONS VEE Input polarity is reversed when GND pin is used as an output. Input polarity is reversed when GND pin is used as an output. Ground-Referred Load = 2 or 3 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package = Pb-Free Package Output RL 4 RL LMx11 ALYW G 4 VCC 2 SOIC-8 D SUFFIX CASE 751 8 RL - VEE 4 VEE Split Power Supply with Offset Balance 8 8 Load Referred to Negative Supply GND 1 2 Inputs 3 VEE + - 4 8 VCC 7 Output 6 Balance/Strobe 5 Balance VCC (Top View) 2 VCC 2 Inputs + 3 - Inputs 8 7 RL Output 3 8 + 7 Output - 4 VEE RL 1 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. 6 TTL Strobe 1 4 1.0k VEE Load Referred to Positive Supply Strobe Capability Figure 1. Typical Comparator Design Configurations (c) Semiconductor Components Industries, LLC, 2012 August, 2012 - Rev. 6 1 Publication Order Number: LM211/D LM211, LM311 ORDERING INFORMATION Device Shipping Package LM211DG 98 Units / Rail LM211DR2G 2500 Units / Tape & Reel SOIC-8 (Pb-Free) LM311DG 98 Units / Rail LM311DR2G 2500 Units / Tape & Reel LM311NG PDIP-8 (Pb-Free) 50 Units / Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MAXIMUM RATINGS (TA = +25C, unless otherwise noted.) Rating Total Supply Voltage Symbol LM211 LM311 Unit VCC +VEE 36 36 Vdc Output to Negative Supply Voltage VO -VEE 50 40 Vdc Ground to Negative Supply Voltage VEE 30 30 Vdc Input Differential Voltage VID 30 30 Vdc Input Voltage (Note 2) Vin 15 15 Vdc Voltage at Strobe Pin - VCC to VCC-5 VCC to VCC-5 Vdc Power Dissipation and Thermal Characteristics Plastic DIP Derate Above TA = +25C Operating Ambient Temperature Range Operating Junction Temperature Storage Temperature Range PD RqJA 625 5.0 mW mW/C TA -25 to +85 0 to +70 C TJ(max) +150 +150 C Tstg -65 to +150 -65 to +150 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 2 LM211, LM311 ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, TA = 25C, unless otherwise noted) Note 1 LM211 Characteristic Symbol LM311 Min Typ Max Min Typ Max - - 0.7 - 3.0 4.0 - - 2.0 - 7.5 10 Unit Input Offset Voltage (Note 3) RS 50 kW, TA = +25C RS 50 kW, Tlow TA Thigh* VIO mV Input Offset Current (Note 3) TA = +25C Tlow TA Thigh* IIO - - 1.7 - 10 20 - - 1.7 - 50 70 nA Input Bias Current TA = +25C Tlow TA Thigh* IIB - - 45 - 100 150 - - 45 - 250 300 nA Voltage Gain AV 40 200 - 40 200 - V/mV - 200 - - 200 - ns - - 0.75 - 1.5 - - - - 0.75 - 1.5 - - 0.23 - 0.4 - - - - 0.23 - 0.4 - 3.0 - - 3.0 - mA - - - 0.2 - 0.1 10 - 0.5 - - - - 0.2 - - 50 - nA nA mA VICR -14.5 -14.7 to 13.8 +13.0 -14.5 -14.7 to 13.8 +13.0 V Positive Supply Current ICC - +2.4 +6.0 - +2.4 +7.5 mA Negative Supply Current IEE - -1.3 -5.0 - -1.3 -5.0 mA Response Time (Note 4) Saturation Voltage VID -5.0 mV, IO = 50 mA, TA = 25C VID -10 mV, IO = 50 mA, TA = 25C VCC 4.5 V, VEE = 0, Tlow TA Thigh* VID 66.0 mV, Isink 8.0 mA VID 610 mV, Isink 8.0 mA VOL Strobe "On" Current (Note 5) V IS Output Leakage Current VID 5.0 mV, VO= 35 V, TA = 25C, Istrobe= 3.0 mA VID 10 mV, VO= 35 V, TA = 25C, Istrobe= 3.0 mA VID 5.0 mV, VO= 35 V, Tlow TA Thigh* Input Voltage Range (Tlow TA Thigh*) * LM211: Tlow = -25C, Thigh = +85C LM311: Tlow = 0C, Thigh = +70C 1. Offset voltage, offset current and bias current specifications apply for a supply voltage range from a single 5.0 V supply up to 15 V supplies. 2. This rating applies for 15 V supplies. The positive input voltage limit is 30 V above the negative supply. The negative input voltage limit is equal to the negative supply voltage or 30 V below the positive supply, whichever is less. 3. The offset voltages and offset currents given are the maximum values required to drive the output within a volt of either supply with a 1.0 mA load. Thus, these parameters define an error band and take into account the "worst case" effects of voltage gain and input impedance. 4. The response time specified is for a 100 mV input step with 5.0 mV overdrive. 5. Do not short the strobe pin to ground; it should be current driven at 3.0 mA to 5.0 mA. 8 VCC Balance Balance/Strobe 5 1.3k 300 6 300 1.3k 800 800 3.0k 100 3.7k 5.0k 3.7k 7 200 300 250 Output 900 600 800 1.3k 2 1 Inputs 3 730 1.3k 340 GND 5.4k 4 VEE Figure 2. Circuit Schematic http://onsemi.com 3 LM211, LM311 5.0 VCC = +15 V VEE = -15 V I IO , INPUT OFFSET CURRENT (nA) I IB , INPUT BIAS CURRENT (nA) 140 120 Pins 5 & 6 Tied to VCC 100 Normal 80 40 0 -55 -25 0 25 50 75 100 VCC = +15 V VEE = -15 V 4.0 Pins 5 & 6 Tied to VCC 3.0 2.0 1.0 Normal 0 -55 125 -25 0 25 50 75 TA, TEMPERATURE (C) TA, TEMPERATURE (C) Figure 3. Input Bias Current versus Temperature Figure 4. Input Offset Current versus Temperature 100 125 100 125 VCC = +15 V VEE = -15 V TA = +25C VCC COMMON MODE LIMITS (V) 120 100 80 60 40 20 Vin ,INPUT VOLTAGE (mV) 5.0 4.0 3.0 2.0 1.0 0 -12 -8.0 -4.0 0 4.0 8.0 12 -1.0 -1.5 0.4 0.2 VEE -55 16 -25 0 25 50 75 TA, TEMPERATURE (C) Figure 5. Input Bias Current versus Differential Input Voltage Figure 6. Common Mode Limits versus Temperature 5.0 mV +5.0V 20 mV Vin 500W VO * ) 2.0 mV VCC = +15 V VEE = -15 V TA = +25C 100 50 0 0 Referred to Supply Voltages -0.5 DIFFERENTIAL INPUT VOLTAGE (V) VO , OUTPUT VOLTAGE (V) VO , OUTPUT VOLTAGE (V) 0 -16 0.1 0.2 0.3 0.4 tTLH, RESPONSE TIME (ms) 0.5 Vin ,INPUT VOLTAGE (mV) I IB , INPUT BIAS CURRENT (nA) 140 0.6 Figure 7. Response Time for Various Input Overdrives +5.0V 5.0 4.0 3.0 2.0 1.0 0 2.0 mV Vin 500W * ) VO 20 mV VCC = +15 V VEE = -15 V TA = +25C 0 -50 -100 http://onsemi.com 4 5.0 mV 0 0.1 0.2 0.3 0.4 tTHL, RESPONSE TIME (ms) 0.5 Figure 8. Response Time for Various Input Overdrives 0.6 20 mV VO , OUTPUT VOLTAGE (V) 15 10 5.0 0 -5.0 -10 -15 VCC 5.0 mV Vin * ) VO 2.0k Vin ,INPUT VOLTAGE (mV) Vin ,INPUT VOLTAGE (mV) VO , OUTPUT VOLTAGE (V) LM211, LM311 VEE 2.0 mV 0 -50 VCC = +15 V VEE = -15 V TA = +25C -100 0 1.0 2.0 tTLH, RESPONSE TIME (ms) VCC 15 10 5.0 0 -5.0 -10 -15 5.0 mV 20 mV VCC = +15 V VEE = -15 V TA = +25C 100 50 0 0 1.0 tTHL, RESPONSE TIME (ms) 125 0.75 Power Dissipation 0.60 75 0.45 Short Circuit Current 50 0.30 25 0.15 5.0 0.60 TA = -55C 0.45 0.30 TA = +25C TA = +125C 0.15 0 0 15 10 0.75 0 8.0 16 VO, OUTPUT VOLTAGE (V) 32 40 48 56 Figure 12. Output Saturation Voltage versus Output Current 3.6 100 TA = +25C VCC = +15 V VEE = -15 V POWER SUPPLY CURRENT (mA) OUTPUT LEAKAGE CURRENT (mA) 24 IO, OUTPUT CURRENT (mA) Figure 11. Output Short Circuit Current Characteristics and Power Dissipation 10 1.0 Output VO = +50 V (LM211 only) 0.1 0.01 25 2.0 0.90 PD , POWER DISSIPATION (W) V , SATURATION VOLTAGE (V) OL OUTPUT SHORT CIRCUIT CURRENT (mA) 0.90 TA = +25C 0 VO 2.0k Figure 10. Response Time for Various Input Overdrives 150 0 * ) VEE Figure 9. Response Time for Various Input Overdrives 100 Vin 2.0 mV 3.0 Positive Supply - Output Low 2.4 1.8 Positive and Negative Power Supply - Output H igh 1.2 0.6 0 45 65 85 105 125 0 5.0 10 15 20 25 TA, TEMPERATURE (C) VCC-VEE, POWER SUPPLY VOLTAGE (V) Figure 13. Output Leakage Current versus Temperature Figure 14. Power Supply Current versus Supply Voltage http://onsemi.com 5 30 LM211, LM311 SUPPLY CURRENT (mA) 3.0 VCC = +15 V VEE = -15 V 2.6 Postive Supply - Output Low 2.2 1.8 Positive and Negative Supply - Output High 1.4 1.0 -55 -25 0 25 50 75 TA, TEMPERATURE (C) 100 125 Figure 15. Power Supply Current versus Temperature APPLICATIONS INFORMATION +15 V +15 V 3.0 k 4.7 k 3.0 k 82 33 k 5.0 k C1 0.1 mF 8 2 Input + R1 C2 4.7 k 0.002 6 mF 8 Input 5 LM311 1 R2 3 Output 7 100 R2 4 3.0 k GND GND + 2 Output 7 4 0.1 mF Output to CMOS Logic Output Balance/Strobe 2N2222 or Q1 Equivalent 1.0k VEE TTL Strobe VEE = -15 V Figure 18. Zero-Crossing Detector Driving CMOS Logic VCC2 LM311 10 k VCC 1 VCC + Inputs + LM311 5 LM311 VCC1 VEE VCC = +15 V Inputs - Figure 17. Conventional Technique for Adding Hysteresis VEE Input C1 -15 V 510 k Figure 16. Improved Method of Adding Hysteresis Without Applying Positive Feedback to the Inputs 5.0 k 6 1.0 M -15 V Balance 3 R1 C2 100 0.1 mF Balance Adjust 5.0 k 0.1 mF *D1 *Zener Diode D1 protects the comparator from inductive kickback and voltage transients on the VCC2 supply line. Figure 19. Relay Driver with Strobe Capability http://onsemi.com 6 LM211, LM311 TECHNIQUES FOR AVOIDING OSCILLATIONS IN COMPARATOR APPLICATIONS When a high speed comparator such as the LM211 is used with high speed input signals and low source impedances, the output response will normally be fast and stable, providing the power supplies have been bypassed (with 0.1 mF disc capacitors), and that the output signal is routed well away from the inputs (Pins 2 and 3) and also away from Pins 5 and 6. However, when the input signal is a voltage ramp or a slow sine wave, or if the signal source impedance is high (1.0 kW to 100 kW), the comparator may burst into oscillation near the crossing-point. This is due to the high gain and wide bandwidth of comparators like the LM211 series. To avoid oscillation or instability in such a usage, several precautions are recommended, as shown in Figure 16. The trim pins (Pins 5 and 6) act as unwanted auxiliary inputs. If these pins are not connected to a trim-pot, they should be shorted together. If they are connected to a trim-pot, a 0.01 mF capacitor (C1) between Pins 5 and 6 will minimize the susceptibility to AC coupling. A smaller capacitor is used if Pin 5 is used for positive feedback as in Figure 16. For the fastest response time, tie both balance pins to VCC. Certain sources will produce a cleaner comparator output waveform if a 100 pF to 1000 pF capacitor (C2) is connected directly across the input pins. When the signal source is applied through a resistive network, R1, it is usually advantageous to choose R2 of the same value, both for DC and for dynamic (AC) considerations. Carbon, tin-oxide, and metal-film resistors have all been used with good results in comparator input circuitry, but inductive wirewound resistors should be avoided. When comparator circuits use input resistors (e.g., summing resistors), their value and placement are particularly important. In all cases the body of the resistor should be close to the device or socket. In other words, there should be a very short lead length or printed-circuit foil run between comparator and resistor to radiate or pick up signals. The same applies to capacitors, pots, etc. For example, if R1 = 10 kW, as little as 5 inches of lead between the resistors and the input pins can result in oscillations that are very hard to dampen. Twisting these input leads tightly is the best alternative to placing resistors close to the comparator. Since feedback to almost any pin of a comparator can result in oscillation, the printed-circuit layout should be engineered thoughtfully. Preferably there should be a groundplane under the LM211 circuitry (e.g., one side of a double layer printed circuit board). Ground, positive supply or negative supply foil should extend between the output and the inputs to act as a guard. The foil connections for the inputs should be as small and compact as possible, and should be essentially surrounded by ground foil on all sides to guard against capacitive coupling from any fast high-level signals (such as the output). If Pins 5 and 6 are not used, they should be shorted together. If they are connected to a trim-pot, the trim-pot should be located no more than a few inches away from the LM211, and a 0.01 mF capacitor should be installed across Pins 5 and 6. If this capacitor cannot be used, a shielding printed-circuit foil may be advisable between Pins 6 and 7. The power supply bypass capacitors should be located within a couple inches of the LM211. A standard procedure is to add hysteresis to a comparator to prevent oscillation, and to avoid excessive noise on the output. In the circuit of Figure 17, the feedback resistor of 510 kW from the output to the positive input will cause about 3.0 mV of hysteresis. However, if R2 is larger than 100 W, such as 50 kW, it would not be practical to simply increase the value of the positive feedback resistor proportionally above 510 kW to maintain the same amount of hysteresis. When both inputs of the LM211 are connected to active signals, or if a high-impedance signal is driving the positive input of the LM211 so that positive feedback would be disruptive, the circuit of Figure 16 is ideal. The positive feedback is applied to Pin 5 (one of the offset adjustment pins). This will be sufficient to cause 1.0 mV to 2.0 mV hysteresis and sharp transitions with input triangle waves from a few Hz to hundreds of kHz. The positive-feedback signal across the 82 W resistor swings 240 mV below the positive supply. This signal is centered around the nominal voltage at Pin 5, so this feedback does not add to the offset voltage of the comparator. As much as 8.0 mV of offset voltage can be trimmed out, using the 5.0 kW pot and 3.0 kW resistor as shown. http://onsemi.com 7 LM211, LM311 PACKAGE DIMENSIONS PDIP-8 N SUFFIX CASE 626-05 ISSUE M D A D1 E 8 5 E1 1 4 NOTE 5 F c E2 END VIEW TOP VIEW NOTE 3 e/2 A L A1 C SEATING PLANE E3 e 8X SIDE VIEW b 0.010 M C A END VIEW http://onsemi.com 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. DIMENSION E IS MEASURED WITH THE LEADS RESTRAINED PARALLEL AT WIDTH E2. 4. DIMENSION E1 DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A A1 b C D D1 E E1 E2 E3 e L INCHES NOM MAX ---- 0.210 ---- ---- 0.018 0.022 0.010 0.014 0.365 0.400 ---- ---- 0.310 0.325 0.250 0.280 0.300 BSC ---- ---- 0.430 0.100 BSC 0.115 0.130 0.150 MIN ---- 0.015 0.014 0.008 0.355 0.005 0.300 0.240 MILLIMETERS MIN NOM MAX ---- ---- 5.33 0.38 ---- ---- 0.35 0.46 0.56 0.20 0.25 0.36 9.02 9.27 10.02 0.13 ---- ---- 7.62 7.87 8.26 6.10 6.35 7.11 7.62 BSC ---- ---- 10.92 2.54 BSC 2.92 3.30 3.81 LM211, LM311 PACKAGE DIMENSIONS SOIC-8 D SUFFIX CASE 751-07 ISSUE AK -X- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. A 8 5 S B 0.25 (0.010) M Y M 1 4 -Y- K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE -Z- 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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