1. General description
The CBTD3384 provides ten bits of high-speed TTL-compatible bus switching. The low
ON resistance of the switch allows connections to be made with minimal propagation
delay.
The CBTD3384 device is organized as two 5-bi t bus switches with two separate output
enable (1OE, 2OE) inputs. When nOE is LOW , the switch is on and port A is connected to
the B port. When nOE is HIGH, each switch is disabled.
The CBTD3384 is characterized for operation from 40 C to +85 C.
2. Features and benefits
Designed to be used in 5 V to 3.3 V level shifting applications with internal diode
5 switch connection between two ports
TTL-compatible control input levels
Multiple package options
Latch-up protection exceeds 100 mA per JESD78
ESD protection:
HBM JESD22-A114E exceeds 2000 V
CDM JESD22-C101C exceeds 1000 V
3. Ordering information
[1] Also known as QSOP24 package
CBTD3384
10-bit level shifting bus switch with 5-bit output enables
Rev. 8 — 12 December 2012 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
CBTD3384D 40 C to +85 C SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
CBTD3384DB 40 C to +85 C SSOP24 plastic shrink small outline package; 24 leads;
body width 5.3 mm SOT340-1
CBTD3384DK 40 C to +85 C SSOP24[1] plastic shrink small outline package; 24 leads;
body width 3.9 mm; lead pitch 0.635 mm SOT556-1
CBTD3384PW 40 C to +85 C TSSOP24 plastic thin shrink small outline package; 24 leads;
body width 4.4 mm SOT355-1
CBTD3384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 8 — 12 December 2012 2 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
4. Functional diagram
5. Pinning information
5.1 Pinning
Fig 1. Logic diag ra m
001aak877
1A1
1A5
1B1
1B5
1OE
3
11
1
10
2
2A1
2A5
2B1
2B5
2OE
14
22
13
23
15
Fig 2. Pin configuration for SO24 (SOT137-1) Fig 3. Pin configuration for SSOP24 (SOT340-1) and
TSSOP24 (SOT355-1)
CBTD3384
1OE VCC
1B1 2B5
1A1 2A5
1A2 2A4
1B2 2B4
1B3 2B3
1A3 2A3
1A4 2A2
1B4 2B2
1B5 2B1
1A5 2A1
GND 2OE
001aan060
1
2
3
4
5
6
7
8
9
10
11
12
14
13
16
15
18
17
20
19
22
21
24
23
CBTD3384
1OE VCC
1B1 2B5
1A1 2A5
1A2 2A4
1B2 2B4
1B3 2B3
1A3 2A3
1A4 2A2
1B4 2B2
1B5 2B1
1A5 2A1
GND 2OE
001aan061
1
2
3
4
5
6
7
8
9
10
11
12
14
13
16
15
18
17
20
19
22
21
24
23
CBTD3384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 8 — 12 December 2012 3 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
Fig 4. Pin configuration fo r SSOP24 (SOT556-1)
CBTD3384
1OE VCC
1B1 2B5
1A1 2A5
1A2 2A4
1B2 2B4
1B3 2B3
1A3 2A3
1A4 2A2
1B4 2B2
1B5 2B1
1A5 2A1
GND 2OE
001aan062
1
2
3
4
5
6
7
8
9
10
11
12
14
13
16
15
18
17
20
19
22
21
24
23
Table 2. Pin de scription
Symbol Pin Description
1OE, 2OE 1, 13 output enable input (active LOW)
1A1 to 1A5 3, 4, 7, 8, 11 data input/output (A port)
2A1 to 2A5 14, 17, 18, 21, 22 data input/output (A port)
1B1 to 1B5 2, 5, 6, 9, 10 data input/output (B port)
2B1 to 2B5 15, 16, 19, 20, 23 data input/output (B port)
GND 12 ground (0 V)
VCC 24 positive supply voltage
Table 3. Fun ction selection[1]
Input Input/output
1OE 2OE 1An, 1Bn 2An, 2Bn
L L 1An = 1Bn 2An = 2Bn
L H 1An = 1Bn Z
HLZ2An = 2Bn
HHZZ
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Product data sheet Rev. 8 — 12 December 2012 4 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
7. Limiting values
[1] S tresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under Section 8. is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability.
[2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
8. Recommended operating conditions
9. Static characteristics
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Tamb =
40
C to +85
C, unless otherwise specified.
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
VIinput voltage [2] 0.5 +7.0 V
IOoutput current VO<0V - 128 mA
IIK input clamping current VI/O =0V 50 - mA
Tstg storage temperature 65 +150 C
Table 5. Operating con ditions
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 4.5 - 5.5 V
VIH HIGH-level input voltage 2.0 - - V
VIL LOW-level input voltage - - 0.8 V
Tamb ambient temperature operating in free air 40 - +85 C
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Tamb = 40 C to +85 CUnit
Min Typ[1] Max
VIK input clamping voltage VCC =4.5V; I
I=18 mA - - 1.2 V
IIinput leakage current VCC =5.5V; V
I= GND or 5.5 V - - 1A
ICC supply current VCC =5.5V; I
O=0mA;
VI=V
CC or GND --1.5mA
ICC additional supply current per input pin; VCC = 5.5 V; one inpu t
at 3.4 V, other inputs at VCC or GND [2] --2.5mA
Vpass pass voltage see Figure 5 to Figure 9 ---V
CIinput capacitance control pins; VI= 3 V or 0 V - 3.2 - pF
Cio(off) off-state input/output
capacitance port off; VI= 3 V or 0 V; nOE =V
CC -6.0-pF
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Product data sheet Rev. 8 — 12 December 2012 5 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
[1] All typical values are at VCC =5V, T
amb =25C.
[2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
[3] Measured by the voltage drop between the nAn and the nBn terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nAn or nBn) terminals.
9.1 Typical pass voltage graphs
RON ON resistance VCC =4.5V; V
I=0V; I
I=64mA [3] -57
VCC =4.5V; V
I=0V; I
I=30mA [3] -57
VCC =4.5V; V
I=2.4V; I
I=15 mA [3] -1750
Table 6. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Tamb = 40 C to +85 CUnit
Min Typ[1] Max
(1) ISW = 100 A
(2) ISW = 6 mA
(3) ISW =12 mA
(4) ISW = 24 mA
(1) ISW = 100 A
(2) ISW = 6 mA
(3) ISW =12 mA
(4) ISW = 24 mA
Fig 5. Pass voltage versus supply voltage;
Tamb =85C (typical) Fig 6. Pass vo ltage versus supply voltage;
Tamb =70C (typical)
001aak834
VCC (V)
4.4 5.65.24.8
2.8
2.4
3.2
3.6
Vpass
(V)
2.0
(4)
(3)
(1)
(2)
001aak835
VCC (V)
4.4 5.65.24.8
2.8
2.4
3.2
3.6
Vpass
(V)
2.0
(4)
(1)
(2)
(3)
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Product data sheet Rev. 8 — 12 December 2012 6 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
(1) ISW = 100 A
(2) ISW = 6 mA
(3) ISW =12 mA
(4) ISW = 24 mA
(1) ISW = 100 A
(2) ISW = 6 mA
(3) ISW =12 mA
(4) ISW = 24 mA
Fig 7. Pass voltage versus supply voltage;
Tamb =25C (typical) Fig 8. Pass vo ltage versus supply voltage;
Tamb =0C (typical)
001aak836
VCC (V)
4.4 5.65.24.8
2.8
2.4
3.2
3.6
Vpass
(V)
2.0
(4)
(1)
(2)
(3)
001aak837
VCC (V)
4.4 5.65.24.8
2.8
2.4
3.2
3.6
Vpass
(V)
2.0
(4)
(1)
(3)
(2)
(1) ISW = 100 A
(2) ISW = 6 mA
(3) ISW =12 mA
(4) ISW = 24 mA
Fig 9. Pass voltage versus supply voltage; Tamb =40 C (typical)
001aak838
VCC (V)
4.4 5.65.24.8
2.8
2.4
3.2
3.6
Vpass
(V)
2.0
(1)
(3)
(2)
(4)
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Product data sheet Rev. 8 — 12 December 2012 7 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
10. Dynamic characteristics
[1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
11. Waveforms
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 12.
Symbol Parameter Conditions Tamb = 40 C to +85 CUnit
Min Typ Max
tpd propagation delay nAn, nBn to nBn, nAn; see Figure 10 [1][2]
VCC = 5.0 V 0.5 V - - 0.25 ns
ten enable time nOE to nAn or nBn; see Figure 11 [2]
VCC = 5.0 V 0.5 V 1.2 4.3 7.0 ns
tdis disable time nOE to nAn or nBn; see Figure 11 [2]
VCC = 5.0 V 0.5 V 1.7 3.0 5.3 ns
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 10. The data input (nAn, nBn) to output (nBn, nAn) propagation delay times
001aan063
nAn, nBn,
input
nBn, nAn,
output
GND
VI
VOH
VOL
VM
tPHL tPLH
VM
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Product data sheet Rev. 8 — 12 December 2012 8 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
Measurement points are given in Table 8.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 11. Enable and disable times
001aak298
t
PLZ
t
PHZ
outputs
disabled outputs
enabled
V
Y
V
X
outputs
enabled
output
LOW to OFF
OFF to LOW
output
HIGH to OFF
OFF to HIGH
nOE input
V
I
3.5 V
V
M
V
M
V
OL
V
OH
GND
GND
t
PZL
t
PZH
V
M
V
M
Table 8. Measur ement points
Supply voltage Input Output
VCC VIVMVMVXVY
VCC = 5.0 V 0.5 V GND to 3.0 V 1.5 V 1.5 V VOL + 0.3 V VOH 0.3 V
CBTD3384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 8 — 12 December 2012 9 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
12. Test information
Test data is given in Table 9.
All input pulses are supplied by generators having the following characteristics: PRR 10 MHz; Zo=50.
The outputs are measured one at a time with one transition per measurement.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Z o of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 12. Test circuit for measuring switching times
Table 9. Test data
Supply voltage Input Load VEXT
VItr, tfCLRLtPLH, tPHL tPLZ, tPZL tPHZ, tPZH
VCC = 5.0 V 0.5 V GND to 3.0 V 2.5 ns 50 p F 500 open 7.0 V open
CBTD3384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 8 — 12 December 2012 10 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
13. Package outline
Fig 13. Package outline SOT137-1 (SO24)
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZ
ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65 0.3
0.1 2.45
2.25 0.49
0.36 0.32
0.23 15.6
15.2 7.6
7.4 1.27 10.65
10.00 1.1
1.0 0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT137-1
X
12
24
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
c
L
vMA
13
(A )
3
A
y
0.25
075E05 MS-013
pin 1 index
0.1 0.012
0.004 0.096
0.089 0.019
0.014 0.013
0.009 0.61
0.60 0.30
0.29 0.05
1.4
0.055
0.419
0.394 0.043
0.039 0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
e
1
0 5 10 mm
scale
SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
99-12-27
03-02-19
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Product data sheet Rev. 8 — 12 December 2012 11 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
Fig 14. Package outline SOT340-1 (SSOP24)
UNIT A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.38
0.25 0.20
0.09 8.4
8.0 5.4
5.2 0.65 1.25
7.9
7.6 0.9
0.7 0.8
0.4 8
0
o
o
0.13 0.10.2
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
1.03
0.63
SOT340-1 MO-150 99-12-27
03-02-19
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
112
24 13
0.25
y
pin 1 index
0 2.5 5 mm
scale
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1
A
max.
2
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Product data sheet Rev. 8 — 12 December 2012 12 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
Fig 15. Package outline SOT556-1 (SSOP24)
UNIT A1A2A3HELp
bpcD
(1) E(1) Z(1)
eL ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.25
0.10 1.55
1.40 0.25 0.31
0.20 0.25
0.18 8.8
8.6 4.0
3.8 0.635 1
6.2
5.8 0.89
0.41 1.05
0.66 8
0
o
o
8
0
o
o
0.180.25 0.1
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
Note
1. Plastic or metal protrusions of 0.2 mm (0.008 inch) maximum per side are not included.
SOT556-1 99-12-27
03-02-18
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
112
24 13
θ
A
A1
A2
Lp
detail X
L
(A )
3
MO-137
0 2.5 5 mm
scale
SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 mm SOT556-1
A
max.
1.73
inches 0.0098
0.0040 0.061
0.055 0.01 0.012
0.008 0.0098
0.0075 0.344
0.337 0.157
0.150 0.025 0.041
0.244
0.228 0.035
0.016 0.040
0.026
0.0070.01 0.004
0.068
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Product data sheet Rev. 8 — 12 December 2012 13 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
Fig 16. Package outline SOT355-1 (TSSOP24)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 7.9
7.7 4.5
4.3 0.65 6.6
6.2 0.4
0.3 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT355-1 MO-153 99-12-27
03-02-19
0.25 0.5
0.2
wM
bp
Z
e
112
24 13
pin 1 index
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
D
y
0 2.5 5 mm
scale
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1
A
max.
1.1
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Product data sheet Rev. 8 — 12 December 2012 14 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
14. Abbreviations
15. Revision history
Table 10. Abbreviations
Acronym Description
CDM Cha rged Device Model
ESD ElectroStatic Discharge
HBM Human Body Model
PRR Pulse Rate Repetition
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
CBTD3384 v.8 20121212 Product data sheet - CBT3384 v.7
Modifications: •Table 1: changed +125 °C into +85 °C (errata).
CBTD3384 v.7 20121119 Product data sheet - CBT3384 v.6
Modifications: •Table 1: changed +85 °C into +125 °C (errata).
CBTD3384 v.6 20111121 Product data sheet - CBTD3384 v.5
Modifications: •Legal pages updated.
CBTD3384 v.5 20101119 Product data sheet - CBTD3384 v.4
CBTD3384 v.4 20011220 Product specification CBTD3384 v.3
CBTD3384 v.3 20000830 Product specification - CBTD3384 v.2
CBTD3384 v.2 20000830 Product specification - -
CBTD3384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 8 — 12 December 2012 15 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device (s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Se miconductors takes no
responsibility for the content in this document if provided by an inf ormation
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be lia ble for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semi conductors’ aggregat e and cumulative liabil ity towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semicondu ctors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where f ailure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconducto rs products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or cust omer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default ,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third part y
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
CBTD3384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 8 — 12 December 2012 16 of 17
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qualif ied nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standard s, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (t ranslated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
16.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors CBTD3384
10-bit level shifting bus switch with 5-bit output enables
© NXP B.V. 2012. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 12 December 2012
Document identifier: CBTD3384
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 3
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Recommended operating conditions. . . . . . . . 4
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
9.1 Typical pass voltage graphs . . . . . . . . . . . . . . . 5
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
12 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 9
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
17 Contact information. . . . . . . . . . . . . . . . . . . . . 16
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17