AT88SC0104C, AT88SC0204C, AT88SC0404C,
AT88SC0808C, AT88SC1616C, AT88SC3216C,
AT88SC6416C, AT88SC12816C, AT88SC25616C
Atmel CryptoMemory Full Specification
DATASHEET
Features
A Family of Nine Devices with User Memories from 1-Kbit to 256-Kbit
EEPROM User Memory
4, 8, or 16 Zones
Self-timed Write Cycles
Single-byte or Multiple-byte Page Write Modes
Programmable Access Rights for Each Zone
2-Kbit Configuration Memory
37-byte OTP Area for User-Defined Codes
160-byte Area for User-Defined Keys and Passwords
High Security Features
64-bit Mutual Authentication Protocol (Under License of ELVA)
Encrypted Checksum
Stream Encryption
Four Key Sets for Authentication and Encryption
Eight Sets of Two 24-bit Passwords
Anti-tearing Function
Voltage and Frequency Monitor
Embedded Application Features
Low Voltage Operation: 2.7V to 5.5V
Secure Nonvolatile Storage for Sensitive System or User Information
2-Wire Serial Interface
1MHz Compatibility for Fast Operation
Standard 8-lead Plastic Packages
Same Pinout as 2-Wire Serial EEPROMs
Smart Card Features
ISO 7816 Class A (5V) or Class B (3V) Operation
Synchronous 2-Wire Serial Interface for Faster Device Initialization*
ISO 7816-3 Asynchronous T = 0 Protocol (Gemplus® Patent)*
Multiple Zones, Key Sets, and Passwords for Multi-application Use
Programmable 8-byte Answer-To-Reset (ATR) Register
ISO 7816-2 Compliant Modules
High Reliability
Endurance: 100,000 Cycles
Data Retention: 10 Years
ESD Protection: 4,000V
* Note: Modules available with either 2-wire or T = 0 modes.
Atmel-5211F-CryptoMem-Full-Specification-Datasheet_032015
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Table of Contents
1. Pin Configuration and Package Information .................................................... 5
1.1 Pin Configuration ................................................................................................ 5
1.2 Package Information ........................................................................................... 5
2. Description ....................................................................................................... 5
2.1 Embedded Applications ...................................................................................... 5
2.2 Smart Card Applications ..................................................................................... 6
2.3 Scope and Purpose of This Document ............................................................... 6
3. Pin Description ................................................................................................ 7
3.1 Supply Voltage (VCC) .......................................................................................... 7
3.2 Clock (SCL/CLK)................................................................................................. 7
3.3 Serial Data (SDA/IO) ........................................................................................... 7
3.4 Reset (RST) ........................................................................................................ 7
4. Detailed Description ........................................................................................ 8
4.1 User Memory ...................................................................................................... 8
4.2 Control Logic ..................................................................................................... 13
4.3 Configuration Memory ....................................................................................... 13
5. Communication Security Modes .................................................................... 17
5.1 Security Operations .......................................................................................... 17
5.1.1 Password Verification ............................................................................. 17
5.1.2 Mutual Authentication ............................................................................. 18
5.1.3 Data Encryption ...................................................................................... 19
5.1.4 Encrypted Checksum ............................................................................. 19
5.2 Data Protection Features .................................................................................. 20
5.2.1 Modify Forbidden ................................................................................... 20
5.2.2 Program Only ......................................................................................... 20
5.2.3 Write Lock .............................................................................................. 20
5.2.4 Anti-tearing (Power Loss Protection) ...................................................... 20
5.3 Configuration Memory Values ........................................................................... 21
5.3.1 Default Values ........................................................................................ 21
5.3.2 Answer To Reset (ATR) ......................................................................... 21
5.3.3 Fab Code ............................................................................................... 21
5.3.4 Memory Test Zone (MTZ) ...................................................................... 21
5.3.5 Card Manufacturer Code ........................................................................ 21
5.3.6 Lot History Code .................................................................................... 21
5.3.7 Issuer Code ............................................................................................ 21
5.3.8 Device Configuration Register (DCR) .................................................... 22
5.3.9 Access Registers ................................................................................... 22
5.3.10 Password/Key Registers ........................................................................ 24
5.3.11 Identification Number ............................................................................. 24
5.3.12 Cryptograms (C0 – C3) ........................................................................... 24
5.3.13 Session Keys (S0 – S3) ........................................................................... 24
5.3.14 Secret Seeds (G0-G3) ............................................................................. 25
5.3.15 Password Sets ....................................................................................... 25
5.3.16 Secure Code .......................................................................................... 25
5.3.17 Password Attempts Counters (PAC) ...................................................... 25
5.3.18 Authentication Attempts Counters (AAC) ............................................... 25
5.4 Security Fuses .................................................................................................. 25
6. Protocol Selection.......................................................................................... 27
6.1 Synchronous Mode for Embedded Applications ............................................... 27
6.2 Asynchronous Mode for Smart Card Applications ............................................ 27
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7. Synchronous Protocol ................................................................................... 29
7.1 Start-up Sequence ............................................................................................ 29
7.2 Command Set ................................................................................................... 30
7.3 Command Format ............................................................................................. 31
7.4 Acknowledge Polling ......................................................................................... 32
7.5 Device Addressing ............................................................................................ 33
7.6 Command Descriptions ..................................................................................... 33
7.6.1 Write User Zone: $B0 ............................................................................. 33
7.6.2 Read User Zone: $B2 ............................................................................ 34
7.6.3 System WRITE: $B4 .............................................................................. 35
7.6.4 System Read: $B6 ................................................................................. 37
7.6.5 Verify Crypto: $B8 .................................................................................. 39
Verify Password: $BA ....................................................................................... 41
8. Initialization Example ..................................................................................... 42
8.1 Write Data to User Zones ................................................................................. 42
8.2 Unlock the Configuration Memory ..................................................................... 42
8.3 Write Data to the Configuration Memory ........................................................... 42
8.4 Set Security Fuses ............................................................................................ 42
9. Asynchronous T=0 Protocol .......................................................................... 45
9.1 Character Format .............................................................................................. 45
9.2 Command format .............................................................................................. 45
9.3 PPS Support ..................................................................................................... 46
9.4 Command Set ................................................................................................... 48
9.4.1 Status Words .......................................................................................... 49
9.4.2 Example: Write EEPROM Command ..................................................... 50
9.4.3 Write User Zone: $B0 ............................................................................. 51
9.4.4 Read User Zone: $B2 ............................................................................ 52
9.4.5 System Write: $B4 ................................................................................. 53
9.4.6 Send Checksum ..................................................................................... 54
9.4.7 System READ: $B6 ................................................................................ 55
9.4.8 Verify Crypto: $B8 .................................................................................. 57
9.4.9 Verify Password: $BA ............................................................................ 59
10. Initialization Example ..................................................................................... 60
10.1 Write Data to User Zones ................................................................................. 60
10.2 Unlock the Configuration Memory ..................................................................... 60
10.3 Write Data to the Configuration Memory ........................................................... 60
10.4 Set Security Fuses ............................................................................................ 60
11. Absolute Maximum Ratings* ......................................................................... 63
11.1 DC and AC Characteristics ............................................................................... 63
11.2 Timing Diagrams for Synchronous Communications ........................................ 65
12. DC Tamper Detection Limits ......................................................................... 67
12.1 High Voltage and Low Voltage Limit ................................................................. 67
12.2 Minimum Clock Pulse ....................................................................................... 67
12.3 Maximum Clock Frequency .............................................................................. 67
12.4 Power On Reset (POR) Delay .......................................................................... 67
12.5 Noise Suppression ............................................................................................ 67
13. Ordering Information...................................................................................... 68
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14. Package Marking Information ........................................................................ 69
14.1 AT88SC0104C .................................................................................................. 69
14.2 AT88SC0204C .................................................................................................. 70
14.3 AT88SC0404C .................................................................................................. 71
14.4 AT88SC0808C .................................................................................................. 72
14.5 AT88SC1616C .................................................................................................. 73
14.6 AT88SC3216C .................................................................................................. 74
14.7 AT88SC6416C .................................................................................................. 75
14.8 AT88SC12816C ................................................................................................ 76
14.9 AT88SC25616C ................................................................................................ 77
15. Revision History ............................................................................................. 78
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1. Pin Configuration and Package Information
1.1 Pin Configuration
Table 1-1. Package Pin Assignments
Pad
Description
ISO Module
TWI Module
SOIC, PDIP
VCC
Supply Voltage
C1
C1
8
GND
Ground
C5
C5
4
SCL/CLK
Serial Clock Input
C3
C3
6
SDA/IO
Serial Data Input/Output
C7
C7
5
RST
Reset Input
C2
NC
NC
1.2 Package Information
Figure 1-1. Package Configuration
2. Description
Atmel® AT88SCxxxxC is a family of nine high-performance secure memory devices providing 1-Kbit to 256-Kbit of user
memory with advanced built-in security and cryptographic features. The memory is divided into 4, 8, or 16 user zones each of
which may be individually set with different security access rights or used together to effectively provide space for one or
multiple data files. Atmel CryptoMemory® has a configuration memory which contains registers to define the security rights for
each user zone and space for passwords and secret keys used by the security logic of CryptoMemory.
Through dynamic, symmetric mutual authentication, data encryption, and the use of encrypted checksums, CryptoMemory
provides a secure place for storage of sensitive information within a system. With its tamper protection circuits, this information
remains safe even under attack.
CryptoMemory also provides high security, low cost, and ease of implementation of host-client type systems without the need
for a microprocessor operating system. The embedded cryptographic engine provides for a dynamic, symmetric mutual
authentication between the device and host, as well as, performs stream encryption for all data and passwords exchanged
between the device and host. Up to four unique key sets are available for these operations.
2.1 Embedded Applications
A 2-Wire serial interface running at 1MHz is used for fast and efficient communications with up to 15 devices which can be
individually addressed. CryptoMemory is available in industry standard 8-lead packages with the same familiar pinout as
2-Wire Serial EEPROMs supporting only the synchronous communications protocol.
TWI Smart Card Module
V
CC
=C1
NC=C2
SCL/CLK=C3
NC=C4
C5=GND
C6=NC
C7=S
D
A/IO
C8=NC
r
ISO Smart Card Module
V
CC
=C1
RST=C2
SCL/CLK=C3
NC=C4
C5=GND
C6=NC
C7=S
D
A/IO
C8=NC
8-lead SOI
C
, PDIP
1
2
3
4
8
7
6
5
NC
NC
NC
GND
V
CC
NC
SCL
S
D
A
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2.2 Smart Card Applications
CryptoMemory offers the ability to communicate with virtually any smart card reader using the asynchronous T=0 protocol
defined in ISO 7816-3. For devices with 32-Kbit of user memory and larger, communication speeds up to 153,600baud are
supported by utilizing ISO 7816-3 protocol and parameter selection. All CryptoMemory devices in smart card module form will
also communicate using a synchronous 2-Wire serial interface.
2.3 Scope and Purpose of This Document
This document covers all three major operational modes of CryptoMemory
Standard Mode
Authentication Mode
Encryption Mode
This document provides all information necessary to take full advantage of the security capabilities of CryptoMemory. It is
designed for use in conjunction with functional cryptographic libraries or companion hardware from Atmel; therefore, requires
cryptographic library and or companion hardware documentation to complement its use. Contact your regional Atmel sales
office for information on the most current version of functional libraries and/or available cryptographic companion hardware.
Figure 2-1. Block Diagram
Authentication,
Encryption and
Certification Unit
EEPROM
Answer to Reset
Data Transfer
Password
Verification
Reset Block
Asynchronous
ISO Interface
Synchronous
Interface
Power
Management
VCC
GND
SCL/CLK
SDA/IO
RST
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3. Pin Description
3.1 Supply Voltage (VCC)
The VCC input is a 2.7V to 5.5V positive voltage supplied by the host.
3.2 Clock (SCL/CLK)
In the asynchronous T=0 protocol, the SCL/CLK input is used to provide the device with a carrier frequency f. The nominal
length of one bit emitted on I/O is defined as an “elementary time unit” (etu) and is equal to 372/f. When the synchronous
protocol is used, the SCL/CLK input is used to clock data in on the positive clock edge and clock data out on the negative
clock edge.
3.3 Serial Data (SDA/IO)
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wired with any number of other
open drain or open collector devices. An external pull-up resistor should be connected between SDA and VCC, a nominal value
of 4.7KΩ may be used. The value of this resistor and the system capacitance loading the SDA bus will determine the rise time
of SDA. This rise time will determine the maximum frequency during read operations. Low value pull-up resistors will allow
higher frequency operations while drawing higher average power supply current.
3.4 Reset (RST)
CryptoMemory provides an ISO 7816-3 compliant asynchronous Answer-To-Reset (ATR) sequence. When the reset
sequence is activated, the device will output the data programmed into the 64-bit ATR register. When RST is low, all internal
logic, access-rights, and write cycles are in reset except the asynchronous mode activation flag. A weak internal pull-up on the
RST input pad allows the device to be used in synchronous mode without bonding RST. For synchronous only smart card
applications, an external pull-up on RST is recommended to ensure synchronous operation under any system timings or
conditions. CryptoMemory does not support a synchronous answer to reset sequence. The RST input is not available in the
plastic package options for CryptoMemory.
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4. Detailed Description
To enable the security features of CryptoMemory, personalize the device by setting up registers and loading appropriate
passwords and keys. Do these by programming the configuration memory using simple write and read commands. Gain
access to the configuration memory by successfully presenting the secure code (Write 7 Password). After writing and verifying
data in the configuration memory, blow the security fuses to lock this information in the device. For additional information on
personalizing CryptoMemory, please see the examples in the protocol sections of this specification, Section 10, Initialization
Example.
4.1 User Memory
The EEPROM user memory is divided into 4, 8, or 16 user zones. Multiple zones allow for the storage of different data types
or files in different zones. Access to user zones is possible only after meeting security requirements. The customer defines
these security requirements in the configuration memory during device personalization. When the same security requirements
define access to multiple zones, the zones effectively serve as one large storage area albeit with the requirement to select
each zone prior to access. The below nine tables present the memory map of the user zones for the different device densities.
Table 4-1. AT88SC0104C User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
User 0
$00
─
32 bytes
─
$18
User 1
$00
─
32 bytes
─
User 2
$00
─
32 bytes
─
$18
User 3
$00
─
32 bytes
─
$18
Note: Page size = 16-bytes
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Table 4-2. AT88SC0204C User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
User 0
$00
─
64 bytes
─
$38
User 1
$00
─
64 bytes
─
$38
User 2
$00
─
64 bytes
─
$38
User 3
$00
─
64 bytes
─
$38
Note: Page size = 16-bytes
Table 4-3. AT88SC0404C User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
User 0
$00
─
128 bytes
─
$78
User 1
$00
─
128 bytes
─
$78
User 2
$00
─
128 bytes
─
$78
User 3
$00
─
128 bytes
─
$78
Note: Page size = 16-bytes
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Table 4-4. AT88SC0808C User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
User 0
$00
─
128 bytes
─
$78
User 1
─
─
─
User 6
$00
─
─
$78
User 7
$00
─
128 bytes
─
$78
Note: Page size = 16-bytes
Table 4-5. AT88SC1616C User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
User 0
$00
─
128 bytes
─
$78
User 1
─
─
─
User 14
$00
─
─
$78
User 15
$00
─
128 bytes
─
$78
Note: Page size = 16-bytes
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Table 4-6. AT88SC3216C User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
User 0
$00
─
256 bytes
─
$F8
User 1
─
─
─
User 14
$00
─
─
$F8
User 15
$00
─
256 bytes
─
$F8
Note: Page size = 64-bytes
Table 4-7. AT88SC6416C User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
User 0
$000
─
512 bytes
─
$1F8
User 1
─
─
─
User 14
$000
─
─
$1F8
User 15
$000
─
512 bytes
─
$1F8
Note: Page size = 64-bytes
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Table 4-8. AT88SC12816C User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
User 0
$000
─
1024 bytes
─
$3F8
User 1
─
─
─
User 14
$000
─
─
$3F8
User 15
$000
─
1024 bytes
─
$3F8
Note: Page size = 128-bytes
Table 4-9. AT88SC25616C User Memory
Zone
$0
$1
$2
$3
$4
$5
$6
$7
User 0
$000
─
2048 bytes
─
$7F8
User 1
─
─
─
User 14
$000
─
─
$7F8
User 15
$000
─
2048 bytes
─
$7F8
Note: Page size = 128-bytes
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4.2 Control Logic
Access to the user zones occurs only through the device’s control logic. This logic is configurable through proper programming
of access, passwords and keys registers of the configuration memory during device personalization. This logic also
implements the cryptographic engine for performing the various higher-level security functions of the device.
4.3 Configuration Memory
The configuration memory consists of 2048-bits of EEPROM memory used for storing passwords, keys, codes, and defining
security levels to be used for each user zone. The control logic defines access rights to the configuration memory as well as to
the user zones and the user may not alter these rights. The access rights include the ability to program certain portions of the
configuration memory and then lock the data written through the use of security fuses. The configuration memory for each
CryptoMemory device is identical with the exception of the number of access registers and password/key registers available.
Devices with four user zones have four sets of registers, those with eight user zones, eight sets of registers, and those with
16 user zones, 16 sets of registers. Unused memory space in the register region becomes reserved to ensure other
components of the configuration memory remain at the same address location regardless of the number of user zones in a
device.
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Table 4-10. AT88SC0104C/0204C/0404C Configuration Memory
$0
$1
$2
$3
$4
$5
$6
$7
$00
Answer to Reset
Identification
$08
Fab Code
MTZ
Card Manufacturer Code
$10
Lot History Code
Read Only
$18
DCR
Identification Number Nc
Access Control
$20
AR0
PR0
AR1
PR1
AR2
PR2
AR3
PR3
$28
Reserved
$30
$38
$40
Issuer Code
$48
$50
AAC0
Cryptogram C0
Cryptography
$58
Session Encryption Key S0
$60
AAC1
Cryptogram C1
$68
Session Encryption Key S1
$70
AAC2
Cryptogram C2
$78
Session Encryption Key S2
$80
AAC3
Cryptogram C3
$88
Session Encryption Key S3
$90
Secret Seed G0
Secret
$98
Secret Seed G1
$A0
Secret Seed G2
$A8
Secret Seed G3
$B0
PAC
Write 0
PAC
Read 0
Password
$B8
PAC
Write 1
PAC
Read 1
$C0
PAC
Write 2
PAC
Read 2
$C8
PAC
Write 3
PAC
Read 3
$D0
PAC
Write 4
PAC
Read 4
$D8
PAC
Write 5
PAC
Read 5
$E0
PAC
Write 6
PAC
Read 6
$E8
PAC
Write 7
PAC
Read 7
$F0
Reserved
Forbidden
$F8
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Table 4-11. AT88SC0808C Configuration Memory
$0
$1
$2
$3
$4
$5
$6
$7
$00
Answer to Reset
Identification
$08
Fab Code
MTZ
Card Manufacturer Code
$10
Lot History Code
Read-Only
$18
DCR
Identification Number Nc
Access Control
$20
AR0
PR0
AR1
PR1
AR2
PR2
AR3
PR3
$28
AR4
PR4
AR5
PR5
AR6
PR6
AR7
PR7
$30
Reserved
$38
$40
Issuer Code
$48
$50
AAC0
Cryptogram C0
Cryptography
$58
Session Encryption Key S0
$60
AAC1
Cryptogram C1
$68
Session Encryption Key S1
$70
AAC2
Cryptogram C2
$78
Session Encryption Key S2
$80
AAC3
Cryptogram C3
$88
Session Encryption Key S3
$90
Secret Seed G0
Secret
$98
Secret Seed G1
$A0
Secret Seed G2
$A8
Secret Seed G3
$B0
PAC
Write 0
PAC
Read 0
Password
$B8
PAC
Write 1
PAC
Read 1
$C0
PAC
Write 2
PAC
Read 2
$C8
PAC
Write 3
PAC
Read 3
$D0
PAC
Write 4
PAC
Read 4
$D8
PAC
Write 5
PAC
Read 5
$E0
PAC
Write 6
PAC
Read 6
$E8
PAC
Write 7
PAC
Read 7
$F0
Reserved
Forbidden
$F8
AT88SC0104C/0204C/0404C/0808C/1616C/3216C/6416C/12816C/25616C [Datasheet]
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Table 4-12. AT88SC1616C/3216C/6416C/12816C/25616C Configuration Memory
$0
$1
$2
$3
$4
$5
$6
$7
$00
Answer to Reset
Identification
$08
Fab Code
MTZ
Card Manufacturer Code
$10
Lot History Code
Read-Only
$18
DCR
Identification Number Nc
Access Control
$20
AR0
PR0
AR1
PR1
AR2
PR2
AR3
PR3
$28
AR4
PR4
AR5
PR5
AR6
PR6
AR7
PR7
$30
AR8
PR8
AR9
PR9
AR10
PR10
AR11
PR11
$38
AR12
PR12
AR13
PR13
AR14
PR14
AR15
PR15
$40
Issuer Code
$48
$50
AAC0
Cryptogram C0
Cryptography
$58
Session Encryption Key S0
$60
AAC1
Cryptogram C1
$68
Session Encryption Key S1
$70
AAC2
Cryptogram C2
$78
Session Encryption Key S2
$80
AAC3
Cryptogram C3
$88
Session Encryption Key S3
$90
Secret Seed G0
Secret
$98
Secret Seed G1
$A0
Secret Seed G2
$A8
Secret Seed G3
$B0
PAC
Write 0
PAC
Read 0
Password
$B8
PAC
Write 1
PAC
Read 1
$C0
PAC
Write 2
PAC
Read 2
$C8
PAC
Write 3
PAC
Read 3
$D0
PAC
Write 4
PAC
Read 4
$D8
PAC
Write 5
PAC
Read 5
$E0
PAC
Write 6
PAC
Read 6
$E8
PAC
Write 7
PAC
Read 7
$F0
Reserved
Forbidden
$F8
AT88SC0104C/0204C/0404C/0808C/1616C/3216C/6416C/12816C/25616C [Datasheet]
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5. Communication Security Modes
Communication between the device and host operates in three basic modes. Standard mode is the default mode for the
device after power-up. Authentication mode is activated by a successful authentication sequence. Encryption mode is
activated by a successful encryption activation following a successful authentication. Data transferred to and from the device is
handled per the following table.
Table 5-1. Communication Security Modes
Mode
Configuration Data
User Data
Passwords
Data Integrity Check
Standard/Password
Clear
Clear
Clear
N/A
Authentication
Clear
Clear
Encrypted
MAC
Encryption
Clear
Encrypted
Encrypted
MAC
Note: Configuration data includes the entire configuration memory except the passwords
MAC: Message Authentication Code
5.1 Security Operations
5.1.1 Password Verification
The use of passwords protects read and write accesses to the user zones. Any one of eight password sets is available for
assignment to any user zone through configuration of access registers. CryptoMemory provides separate 24-bit passwords for
read and write operations. Read passwords grant only read accesses to zones under password protection, while write
passwords grant both read and write accesses. Successful presentation of any password renders the verify password
command active until the presentation of another password or device reset. Only one password may be active at a time.
Presenting incorrect passwords decrements the value of the corresponding Password Attempts Counter (PAC). Decrementing
the PAC to $00 permanently disables the corresponding password and permanently renders the corresponding user zone(s)
under protection inaccessible. Operation in authentication or encryption mode requires encryption of passwords for all
password transactions.
Figure 5-1. Password Verification
Command/CommunicationsCryptoMemory Device
VERIFY Password
Allow Access
Host Logic
Send Password
encrypted if performed after
Mutual Authentication
Verify Password
AT88SC0104C/0204C/0404C/0808C/1616C/3216C/6416C/12816C/25616C [Datasheet]
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5.1.2 Mutual Authentication
The use of a mutual authentication protocol further protects access to user zones. Any one of four key sets is available for
assignment to any user zone through configuration of access registers. Each key set consists of a secret seed, a cryptogram,
and a session encryption key. A Verify Crypto command exists to allow the use of any one of the key sets to enter
authentication mode. Each successful entry into authentication mode renders the mode active until the next call to the Verify
Crypto command or device reset. Only one key set may be active at anytime. Unsuccessful calls of the Verify Crypto
command exits authentication mode and decrements the value of the Authentication Attempts Counter (AAC) register.
Decrementing AAC to $00 permanently disables the corresponding key set and permanently renders the corresponding user
zone(s) under protection inaccessible.
Entry into authentication mode is a process through which the host and CryptoMemory device mutually authenticate one
another. First, the host generates a 64-bit random number, reads a current cryptogram from the device, and uses this
information in conjunction with the corresponding secret seed to generate a 64-bit challenge for the device. The host also
generates a new cryptogram and session encryption key in the process. The host then sends the challenge and random
number to the device by calling the Verify Crypto command. The device utilizes the random number from the host to generate
its own challenge, new cryptogram, and session encryption key. It then compares its challenge to the one from the host. If the
challenges match, then the device declares the host authentic, overwrites its corresponding current cryptogram and session
encryption key with the new ones. To complete the mutual authentication, the host reads the new cryptogram from the device
and compares it with its newly calculated cryptogram. The new cryptogram from the device serves as a challenge to the host.
If the cryptograms match then the device is authentic. Only an authentic pair of host and device can generate the same
challenges and cryptograms. Mutual authentication requires the use of the verify authentication variant of the Verify Crypto
command (see Table 7-1, “Atmel CryptoMemory Synchronous Command Set,” or Table 9-2, “Atmel CryptoMemory
Asynchronous Command Set”).
Figure 5-2. The Mutual Authentication Process
CryptoMemory Device
Device Info, Cryptogram
[Secret Seed]
Compute Challenge A
Verify Challenge A
Compute Challenge B
Compute Session Key
Allow Access
Host Logic
Read Device Info, Cryptogram
Compute Secret Seed
Generate Random Number
Compute Challenge A
Compute Challenge B
Compute Session Key
Read Challenge B
Verify Challenge B
Allow Access
Read Config Zone
Verify Authentication
Read Config Zone
Command/Communications
AT88SC0104C/0204C/0404C/0808C/1616C/3216C/6416C/12816C/25616C [Datasheet]
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5.1.3 Data Encryption
CryptoMemory allows the use of encryption between a host system and the CryptoMemory device to protect the confidentiality
of data during read-write accesses and verify password operations. To enable encryption, the host must call the Verify Crypto
command with a valid session encryption key when the device is already in active authentication mode. The session
encryption key must belong to the active authentication key set. The host may enable encryption at any time after which data
content of communication between host and device user zones becomes encrypted. If a user zone configuration in the access
register requires encryption; however, then the host must enter encryption mode and must encrypt all data content to and from
the zone in the remainder of the active encryption session in order to communicate with the zone. CryptoMemory does not
encrypt system zone data except for password and password attempt counters. Passwords and password attempt counters
require encryption during active authentication or encryption modes.
Each successful entry into encryption mode renders the mode active for the current key set until the next call to the Verify
Crypto command or device reset. Only one key set may be active at anytime. Unsuccessful calls of the Verify Crypto
command exits both encryption and authentication modes and decrements the value of the authentication attempts counter
(AAC) register. Decrementing AAC to $00 permanently disables the corresponding key set and permanently renders the
corresponding user zone(s) under protection inaccessible. Activating encryption is similar in process to activating
authentication with the exception that the session encryption key replaces the secret seed. The process uses the verify
encryption variant of the Verify Crypto command (see Table 7-1, “Atmel CryptoMemory Synchronous Command Set,” or Table
9-2, “Atmel CryptoMemory Asynchronous Command Set”).
Figure 5-3. Encryption Activation Process from Active Authentication Mode
5.1.4 Encrypted Checksum
CryptoMemory implements a data validity check function in the form of an encrypted checksum. This checksum provides a
bi-directional data integrity check and data origin authentication capability in the form of a Message Authentication Code
(MAC): only the host/device that carried out a valid authentication is capable of computing a valid MAC. When writing data to
the CryptoMemory device in authentication or encryption communication modes, the host must send a valid checksum
immediately following the write command. If the checksum is invalid, the device rejects the write command and resets the
device security privileges. The host must reinitiate entry into authentication and, if applicable, encryption modes to continue.
The use of checksum is optional when reading data. Calls to the Read Checksum command resets device security so its use
is recommended only at the completion of all data read operations from the device.
CryptoMemory Device
Session Key, Cryptogram
Compute Challenge A
Verify Challenge A
Compute Challenge B
Enable Encryption
Host Logic
Session Key, Cryptogram
Generate Random Number
Compute Challenge A
Compute Challenge B
Read Challenge B
Verify Challenge B
Verify Encryption
Read Config Zone
Command/Communications
AT88SC0104C/0204C/0404C/0808C/1616C/3216C/6416C/12816C/25616C [Datasheet]
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5.2 Data Protection Features
Security operations control access to data stored in CryptoMemory. After gaining access, additional options exist to protect
data in the user memory.
5.2.1 Modify Forbidden
The Modify Forbidden option renders the user zone read-only by restricting all write operations to it. It is recommended to
program all required data in the user zone prior to enabling this option. Modify Forbidden is available for any user zone and is
selectable by configuring appropriate access registers.
5.2.2 Program Only
The Program Only option constrains data bit modification to programming from Logic 1 to Logic 0 only. Data bits may never
change from Logic 0 to Logic 1. Program Only is available for any user zone and is selectable by configuring appropriate
access registers.
5.2.3 Write Lock
The Write Lock option provides ability to render individual bytes within a user zone read-only by restricting all write operations
to it. It operates on 8-byte page level whereby the lowest addressed byte of the page serves as the Write Access Control byte
for that page. Table 5-2 shows the use of Write Lock for data at addresses $080 thru $087. The byte at $080 controls write
access to bytes from $080 to $087.
Table 5-2. Write Lock Example
Address
$0
$1
$2
$3
$4
$5
$6
$7
$080
11011001
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
Locked
Locked
Locked
The Write Lock option also applies to the Access Control byte for each page by writing its least significant (rightmost) bit to
Logic 0. Moreover, only logic modifications from Logic 1 to Logic 0 of the access control byte are permissible.
Write Lock is available for any user zone and is selectable by configuring appropriate access registers; furthermore,
configuring a user zone with the Write Lock option restricts writing to that zone to a byte at a time. Attempts to write several
bytes within a command result in writing only the first byte.
5.2.4 Anti-tearing (Power Loss Protection)
In the event of a power loss during a write cycle, the integrity of the device's stored data may be recovered. This function is
optional, and the host may choose to activate the anti-tearing function for any write to a user zone or configuration memory by
use of the appropriate B4 system write command. When anti-tearing is active, write commands will take longer to execute
since more write cycles are required. Additionally, the data written is limited to 8-bytes.
Data is written first to a Buffer zone in EEPROM instead of the intended destination address in the User zone or Configuration
Memory, but with the same access conditions. If this write cycle is interrupted the original data remains intact in the User zone
or Configuration Memory. The data is then written in the required memory location. If this second write cycle is interrupted the
device will automatically recover the data from the system Buffer zone at the next power-up and write it to the intended
destination address.
In 2-Wire mode, the host is required to perform ACK polling for 18ms after each write command when anti-tearing is active. At
power-up, five clock cycles are required to check the anti-tearing flags. In the event the device needs to carry out the data
recovery process the host is required to perform ACK polling for 14ms.
AT88SC0104C/0204C/0404C/0808C/1616C/3216C/6416C/12816C/25616C [Datasheet]
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5.3 Configuration Memory Values
This section describes each individual field in the Configuration Memory.
5.3.1 Default Values
Atmel programs certain fields of the Configuration Memory at the factory. The customer may elect to change the content of all
of these fields except for the lot history code field which is permanently locked. Atmel programs the remainder of the fields,
including all of the Configuration Memory and user zones to ones prior to releasing the device from the factory. Table 5-3
summarizes device fields Atmel programs at the factory. A brief description of each field follows.
Table 5-3. Factory Programmed Fields
Device
ATR
Fab Code
Lot History code
Write 7 Password
(Secure Code)
Atmel AT88SC0104C
3B B2 11 00 10 80 00 01
10 10
Variable, locked
DD 42 97
Atmel AT88SC0204C
3B B2 11 00 10 80 00 02
20 20
Variable, locked
E5 47 47
Atmel AT88SC0404C
3B B2 11 00 10 80 00 04
40 40
Variable, locked
60 57 34
Atmel AT88SC0808C
3B B2 11 00 10 80 00 08
80 60
Variable, locked
22 E8 3F
Atmel AT88SC1616C
3B B2 11 00 10 80 00 16
16 80
Variable, locked
20 0C E0
Atmel AT88SC3216C
3B B3 11 00 00 00 00 32
32 10
Variable, locked
CB 28 50
Atmel AT88SC6416C
3B B3 11 00 00 00 00 64
64 40
Variable, locked
F7 62 0B
Atmel AT88SC12816C
3B B3 11 00 00 00 01 28
28 60
Variable, locked
22 EF 67
Atmel AT88SC25616C
3B B3 11 00 00 00 02 56
58 60
Variable, locked
17 C3 3A
5.3.2 Answer To Reset (ATR)
This is an 8-byte wide register with content that Atmel defines. This register is read/write accessible prior to blowing the FAB
fuse, but becomes read-only after blowing the fuse.
5.3.3 FAB Code
This field is a 16-bit wide register with content that Atmel defines. This field is read/write accessible prior to blowing the FAB
fuse, but becomes read-only after blowing the fuse.
5.3.4 Memory Test Zone (MTZ)
This field is a 16-bit wide register with open read/write access privileges at all times for testing basic communication to the
device. This field is free of all security constraints at all times.
5.3.5 Card Manufacturer Code
This field is a 32-bit wide register with read/write access privileges for the customer to define its content. The content of this
field becomes read-only after blowing the PER fuse.
5.3.6 Lot History Code
This field is a 64-bit wide register with content that Atmel defines. This field is read-only.
5.3.7 Issuer Code
This field is a 128-bit wide register with read/write access privileges for customer to define its content. The content of this field
becomes read-only after blowing the PER fuse.
AT88SC0104C/0204C/0404C/0808C/1616C/3216C/6416C/12816C/25616C [Datasheet]
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5.3.8 Device Configuration Register (DCR)
This 8-bit register allows selection of the following device configuration options (active low). The values programmed have an
immediate effect on the logic of the device. The default value is one for each bit.
Table 5-4. Device Configuration Register (DCR)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SME
UCR
UAT
ETA
CS3
CS2
CS1
CS0
5.3.8.1 SME – Supervisor Mode Enable
Asserting this bit (SME = 0) enables supervisor mode for Write 7 Password such that verifying Write 7 Password grants read
and write accesses to all password sets and PACs. Verifying Write 7 Password does not grant access to other passwords
when this bit is not asserted (SME = 1).
5.3.8.2 UCR – Unlimited Checksum Reads
Asserting this bit (UCR = 0) allows unlimited number of checksum reads without requiring a new authentication. Not asserting
this bit (UCR = 1) limits the read of checksum to one attempt after which the device resets the crypto algorithm after executing
the Read Checksum command.
5.3.8.3 UAT – Unlimited Authentication Trials
Asserting this bit (UAT = 0) disables the Authentication Attempts Counter (AAC) thus allowing unlimited authentication
attempts. The AAC decrements after each unsuccessful attempt but the internal logic ignores it value. Asserting this bit also
prevents reset of the crypto algorithm after reading the MAC in encryption mode. The UAT bit does not affect the password
attempts counter.
5.3.8.4 ETA – Eight Trials Allowed
Asserting this bit (ETA = 0) extends the trials limit to eight incorrect attempts to authenticate or verify a password. The counter
(AAC or PAC) will decrement ($FF, $FE, $FC, $F8, $F0, $E0, $C0, $80, $00) with each incorrect attempt. Disabling this bit
(ETA = 1) limits authentication and password verification trials to only four incorrect attempts ($FF, $EE, $CC, $88, $00).
5.3.8.5 CS0 – CS3: Programmable Chip Select (Only relevant in synchronous protocol)
The four most significant bits (b4 – b7) of every command comprise the Chip Select Address. All CryptoMemory devices will
respond to the default chip select address of $B (1011). Each device also responds to a second chip select address
programmed into CS0 – CS3 of the device configuration register. By programming each device to a unique chip select
address, it is possible to connect up to 15 devices on the same serial data bus and communicate individually to each. Global
communications to all devices sharing the bus is accomplished using the default Chip Select Address $B.
5.3.9 Access Registers
Four, eight, or sixteen 8-bit access registers allow personalization of the device. Each access register works in conjunction
with a password/key register to define the security settings for each individual zone of the user memory. Values in the access
registers take immediate effect after programming. The default value for each bit is one.
Table 5-5. Access Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PM1
PM0
AM1
AM0
ER
WLM
MDF
PGO
AT88SC0104C/0204C/0404C/0808C/1616C/3216C/6416C/12816C/25616C [Datasheet]
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5.3.9.2 PM(1:0) Password Mode
Table 5-6. Password Mode
PM0
PM1
Access
1
1
No Password Required
1
0
Write Password Required
0
*
Read and Write Passwords Required
When PM = 11, the user zone under protection requires no password. When PM = 10, the zone requires write password
verification for writing and reading is free. When PM = 01 or 00, reading requires the read password verification and writing
requires write password verification; however, proper verification of the write password also grants read access. The password
set required is specified by PW(3:0) in the corresponding passwords/keys register (see following section). Verification of the
write password also allows modification of the read and the write passwords, for each password set.
5.3.9.3 AM(1:0) – Authentication Mode
Table 5-7. Authentication Mode
AM1
AM0
Access
1
1
No Authentication Required
1
0
Authentication for Write
0
1
Normal Authentication Mode
0
0
Dual Access Mode
When AM = 11, the user zone under protection requires no authentication. When AM = 10, the zone requires authentication
only for write accesses and read accesses are free. When AM = 01, the zone requires authentication for both write and read
accesses. In both of these configurations, the Authentication Key (AK) in the corresponding passwords/keys register specifies
the required secret seed and corresponding cryptogram, and when applicable the session encryption key (see Section 6,
Protocol Selection).
Finally, when AM = 00, the dual access mode is active in which authentication using the Program Only Key (POK) gives a right
to read and program the zone (i.e. write zeros only), while authentication using the Authentication Key (AK) gives full read and
write access to the zone. In this way, a token application may be implemented, whereby regular hosts with knowledge of POK
may decrement the stored value, and only master hosts with knowledge of AK may reset the token to its full value. See the
following Section 6 on the passwords/keys register for further definition of POK and AK.
Notes: 1. When AM = 00, the POK bits in the corresponding password/key register are ignored
2. When AM = 00 and PGO = 0; bits in the zone may not be written to one even when using the AK
3. Requiring authentication automatically requires the use of secure checksums for write operations (See
“Encrypted Checksum”)
5.3.9.4 ER – Encryption Required
When ER = 0, the host is required to activate the encryption mode in order to read/write the corresponding user zone. No data
read from or written to the zone may be transmitted in the clear. If ER = 1, the host may activate the encryption mode, but isn't
specifically required to do so by the device.
5.3.9.5 WLM – Write Lock Mode
Asserting this bit (WLM = 0) divides the user zone into 8-byte pages. The first byte of each page becomes the Write Lock byte
and defines the locked/unlocked status for each byte in the page. Write access is forbidden to a byte if its associated bit in the
Write Lock byte is set to zero. Bit 7 controls byte 7; bit 6 controls byte 6, etc. By setting bit 0 to zero locks the Write Lock byte
itself. Enabling Write Lock mode limits write operations to one byte at a time.