1. Product profile
1.1 General description
Low capacitance 7-fold bidirectional ESD protection diode arrays in small plastic
packages designed for the protection of up to seven transmission or data lines from
damage caused by ElectroStatic Discharge (ESD) and other transients.
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
PESD5V0L7BAS;
PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode
arrays
Rev. 4 — 23 June 2010 Product data sheet
Table 1. Product overview
Type number Package
Name NXP
PESD5V0L7BAS TSSOP8 SOT505-1
PESD5V0L7BS SO8 SOT96-1
ESD protection of up to seven lines Ultra low leakage current: IRM =3nA
Low diode capacitance ESD protection of up to 10 kV
Max. peak pulse power: PPP =35W IEC 61000-4-2, level 4 (ESD)
Low clamping voltage: VCL =17V IEC 61000-4-5 (surge ); IPP =2.5A
Computers and peripherals High-speed data lines
Communication systems Parallel ports
Audio and video equipment
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VRWM reverse standoff voltage - - 5 V
Cddiode capacitance VR=0V;
f=1MHz -810pF
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 2 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
2. Pinning information
3. Ordering information
4. Marking
Table 3. Pinning
Pin Description Simplified outline Graphic symbol
TSSOP8
1 cathode 1
2 cathode 2
3 cathode 3
4 cathode 4
5 cathode 5
6 cathode 6
7 cathode 7
8 cathode 8
SO8
1 cathode 1
2 cathode 2
3 cathode 3
4 cathode 4
5 cathode 5
6 cathode 6
7 cathode 7
8 cathode 8
14
85
8
7
6
5
1
2
3
4
sym005
4
5
1
8
8
7
6
5
1
2
3
4
sym005
Table 4. Orderin g information
Type number Package
Name Description Version
PESD5V0L7BAS TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm SOT505-1
PESD5V0L7BS SO8 plastic small outline package; 8 leads;
body width 3.9 mm SOT96-1
Table 5. Marking codes
Type number Marking code
PESD5V0L7BAS 5V07B
PESD5V0L7BS 5V0L7BS
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 3 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
5. Limiting values
[1] Non-repetitive current pulse 8/20 s exponentially decaying waveform according to IEC 61000-4-5;
see Figure 1.
[1] Device stressed with ten non-repetitive ElectroStatic Discharge (ESD) pulses; see Figure 2.
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per diode
PPP peak pulse power tp=8/20s[1] -35W
IPP peak pulse current tp=8/20s[1] -2.5A
Tjjunction temperature - 150 C
Tamb ambient temperature 65 +150 C
Tstg storage temperature 65 +150 C
Table 7. ESD maximum ratings
Symbol Parameter Conditions Min Max Unit
VESD electrostatic discharge voltage IEC 61000-4-2
(contact discharge) [1] -10kV
MIL-STD-883
(human body
model)
-10kV
Table 8. ESD standards compliance
Standard Conditions
IEC 61000-4-2; level 4 (ESD); see Figure 2 > 8 kV (contact)
MIL-STD-883; class 3 (human body model) > 4 kV
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 4 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
6. Characteristics
[1] Non-repetitive current pulse 8/20 s exponentially decaying waveform according to IEC 61000-4-5; see Figure 1.
Fig 1. 8/20 s pulse wavefor m ac c or ding to
IEC 61000-4-5 Fig 2. ElectroStatic Discharge (ESD) pulse waveform
according to IEC 61000-4-2
t (μs)
0403010 20
001aaa630
40
80
120
IPP
(%)
0
e−t
100 % IPP; 8 μs
50 % IPP; 20 μs
001aaa631
I
PP
100 %
90 %
t
30 ns 60 ns
10 %
t
r
= 0.7 ns to 1 ns
Table 9. Characteristics
Tamb = 25
C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VRWM reverse standoff voltage - - 5 V
IRM reverse leakage current VRWM = 5 V; see Figure 6 - 3 25 nA
VCL clamping voltage IPP =1A [1] --11V
IPP =2.5A [1] --17V
VBR breakdown voltage IR=1mA 7.27.67.9V
rdif differential resistance IR= 1 mA - - 100
Cddiode capacitance VR= 0 V; f = 1 MHz;
see Figure 5 - 8 10 pF
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 5 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
Tamb =25C
Fig 3. Peak pulse power as a function of exponential
pulse duration tp; typical values Fig 4. Relative variation of peak pulse powe r a s a
function of junction temperature; typical
values
Tamb =25C; f = 1 MHz
Fig 5. Diode capacitance as a function of reverse
voltage; typical values Fig 6. Relative variation of reverse leakage current
as a function of junction temperature; typical
values
001aaa192
tp (μs)
110
4
103
10 102
10
102
PPP
(W)
1
Tj (°C)
0 20015050 100
001aaa193
0.4
0.8
1.2
PPP
0
PPP(25°C)
VR (V)
054231
001aaa142
7
8
9
Cd
(pF)
6
001aaa143
1
10
IRM
0
Tj (°C)
−100 150100050−50
IRM(25°C)
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 6 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
Fig 7. ESD clamping test setu p and waveforms
006aaa062
450 Ω
50 Ω
IEC 61000-4-2 network
CZ = 150 pF; RZ = 330 Ω
DUT: PESD5V0L7BAS
PESD5V0L7BS
RG 223/U
50 Ω coax
RZ
CZ
ESD TESTER 4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
vertical scale = 200 V/div
horizontal scale = 50 ns/div vertical scale = 10 V/div
horizontal scale = 50 ns/div
vertical scale = 200 V/div
horizontal scale = 50 ns/div vertical scale = 10 V/div
horizontal scale = 50 ns/div
GND
GND
GND
unclamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network) clamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network)
GND
unclamped −1 kV ESD voltage waveform
(IEC 61000-4-2 network) clamped −1 kV ESD voltage waveform
(IEC 61000-4-2 network)
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 7 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
7. Application information
The PESD5V0L7BAS and the PESD5V0L7BS are designed for the protection of up to
seven bidirectional data lines from the damage caused by ElectroStatic Discharge (ESD)
and surge pulses. The PESD5V0L7BAS and the PESD5V0L7BS may be used on lines
where the signal polarities are above and below ground.
The PESD5V0L7BAS and the PESD5V0L7BS provide a surge capability of 35 W per line
for a 8/20 s waveform.
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the device as clos e to the input terminal or connector as possible.
2. The path length between the device and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
Fig 8. Typical app lication for ESD protection of seven lines carr ying bidirectional data
006aaa063
high-speed
data lines
PESD5V0L7BAS
PESD5V0L7BS
GND
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 8 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
8. Package outline
Fig 9. Package outline SOT505-1 (TSSOP8)
UNIT A1
A
max. A2A3bpLHELpwyv
ceD(1) E(2) Z(1) θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.45
0.25 0.28
0.15 3.1
2.9 3.1
2.9 0.65 5.1
4.7 0.70
0.35 6°
0°
0.1 0.10.10.94
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
0.7
0.4
SOT505-1 99-04-09
03-02-18
wM
bp
D
Z
e
0.25
14
85
θ
A
A2A1
Lp
(A3)
detail X
L
HE
E
c
vMA
X
A
y
2.5 5 mm0
scale
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1
1.1
pin 1 index
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 9 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
Fig 10. Package outline SOT96-1 (SO8/MS-012)
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 10 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
9. Packing information
[1] For further information and the availability of packing methods, see Section 13.
10. Soldering
Table 10. Packing methods
The indicated -xxx are the last thre e digits of the 12NC ordering code.[1]
Type number Package Description Packing quantity
1000 2500
PESD5V0L7BAS SOT505-1 8 mm pitch, 12 mm tape and reel - -118
PESD5V0L7BS SOT96-1 8 mm pitch, 12 mm tape and reel -115 -118
Reflow soldering is the only recommended soldering method.
Fig 11. Reflow soldering footprint SOT505-1 (TSSOP8)
sot505-1_fr
occupied areasolder lands Dimensions in mm
3.200
3.600
5.750
0.725
0.650
0.125
0.4500.600
3.600
2.950
0.125
0.125
5.500
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 11 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
Fig 12. Reflow soldering footprint SOT96-1 (SO8/MS-012)
Fig 13. Wave soldering footprint SOT96-1 (SO8/MS-012)
sot096-1_fr
occupied area
solder lands Dimensions in mm
placement accuracy ± 0.25
1.30
0.60 (8×)
1.27 (6×)
4.00 6.60
5.50
7.00
sot096-1_fw
solder resist
occupied area
solder lands Dimensions in mm
board direction
placement accurracy ± 0.25
4.00
5.50
1.30
0.3 (2×)
0.60 (6×)
1.20 (2×)
1.27 (6×)
7.00
6.60
enlarged solder land
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 12 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
11. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PESD5V0L7BAS_BS v.4 20100623 Product data sheet - PESD5V0L7BAS_BS_3
Modifications: •Section 4 “Marking”: marking code corrected for PESD5V0L7BAS
•Section 10 “Soldering”: added
•Section 12 “Legal information”: updated
PESD5V0L7BAS_BS_3 20090820 Product data sheet - PESD5V0L7BAS_BS_2
PESD5V0L7BAS_BS_2 20041125 Product data sheet - PESD5V0L7BS_1
PESD5V0L7BS_1 20040315 Product specification - -
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 13 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the shor t data sheet, the
full data sheet shall pre vail.
Product specificat io n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability t owards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suit able for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or cu stomer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by custo m er’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Te rms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly ob jects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulatio ns. Export might require a prior
authorization from national authorities.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
PESD5V0L7BAS_BS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 4 — 23 June 2010 14 of 15
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics se ctions of this
document, and as such is not complete, exhaustive or legally binding.
12.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors PESD5V0L7BAS; PESD5V0L7BS
Low capacitance 7-fold bidirectional ESD protection diode arrays
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 23 June 2010
Document identifier : PES D5 V0 L7B A S_BS
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Application information. . . . . . . . . . . . . . . . . . . 7
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
9 Packing information . . . . . . . . . . . . . . . . . . . . 10
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
13 Contact information. . . . . . . . . . . . . . . . . . . . . 14
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15