1
6
2
3
7
VI
Inhibit
GND GND
VO
1%,0.05W
(Required)
PTN78020
(TopView)
STANDARD APPLICATION
RSET#
4 5 VOSense
L
O
A
D
*Seethe sectionforcapacitorrecommendations.Theminimuminputcapacitance
foris PTN78020W,and PTN78020H
ApplicationInformation
2.2 Ffor 18.8 F(4x4.7 F)form m m
#R oltage.Seethe sectionforvalues.
SET ApplicationInformationisrequiredtoadjusttheoutputv
C *
Ceramic
(Required)
IC *
330 F
(Required)
O
m
PTN78020W
PTN78020H
www.ti.com
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
6-A, WIDE-INPUT ADJUSTABLE SWITCHING REGULATOR
Check for Samples: PTN78020W,PTN78020H
1FEATURES APPLICATIONS
•6-A Output Current •General-Purpose, Industrial Controls,
HVAC Systems, Test and Measurement,
•Wide-Input Voltage Medical Instrumentation, AC/DC Adaptors,
(7 V to 36 V) / (15 V to 36 V) Vehicles, Marine, and Avionics
•Wide-Output Voltage Adjust
(2.5 V to 12.6 V) / (11.85 V to 22 V)
•High Efficiency (Up to 96%)
•On/Off Inhibit
•Undervoltage Lockout
•Output Current Limit
•Overtemperature Shutdown
•Operating Temperature: -40°C to 85°C
•Surface Mount Package Available
DESCRIPTION
The PTN78020 is a series of high-efficiency, step-down integrated switching regulators (ISRs), that represent the
third generation in the evolution of high-performance power modules designed for industrial use. The wide-input
voltage range makes these modules suitable for a variety of applications that operate off 12–V, 24–V, and 28–V
dc power. In new designs they should be considered in place of the PT6620, PT6650, PT6680, and PT6880
series of single in-line pin (SIP) products. The PTN78020 is smaller and lighter than its predecessors, and has
either similar or improved electrical performance characteristics. The caseless, double-sided package has
excellent thermal characteristics, and is compatible with TI's roadmap for RoHS and lead-free compliance.
Operating from a wide-input voltage range, the PTN78020 provides high-efficiency, step-down voltage
conversion for loads of up to 6 A. The output voltage is set using a single, external resistor. The PTN78020W
may be set to any value within the range, 2.5 V to 12.6 V, and the PTN78020H from 11.85 V to 22 V. The output
voltage of the PTN78020W can be as little as 2 V lower than the input, allowing operation down to 7 V, with an
output voltage of 5 V. The output voltage of the PTN78020H can be as little as 3 V lower than the input, allowing
operation down to 15 V, with an output voltage of 12 V.
The PTN78020 has undervoltage lockout, an integral on/off inhibit, and includes an output current limit and
overtemperature protection.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright ©2004–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
PTN78020W
PTN78020H
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see
the TI website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range unless otherwise noted
all voltages with respect to GND UNIT
TAOperating free-air temperature Over VIrange –40°C to 85°C
Surface temperature of module body or pins Horizontal TH
Wave solder temperature 260°C
(5 seconds) (suffix AH &AD)
Horizontal SMD 235°C
(suffix AS)
Solder reflow temperature Surface temperature of module body or pins Horizontal SMD 260°C
(suffix AZ)
TSStorage temperature –55°C to 125°C
VIInput surge voltage, 10 ms maximum 38 V
VINH Inhibit (pin 3) input voltage –0.3 V to 5 V
POOutput power VI≤24 V or VO≥15 V 90 W
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT
PTN78020W 7 36
VIInput voltage V
PTN78020H 15 36
TAOperating free-air temperature –40 85 °C
PACKAGE SPECIFICATIONS
PTN78020x (Suffix AH, AS, &AZ)
Weight 7.3 grams
Flammability Meets UL 94 V-O Horizontal T/H (suffix AH and AD) 250 G (1)
Mechanical Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 sine,
shock mounted Horizontal SMD (suffix AS and AZ) 125 G (1)
Horizontal T/H (suffix AH and AD) 20 G (1)
Mechanical Mil-STD-883D, Method 2007.2, 20-2000 Hz
vibration Horizontal SMD (suffix AS and AZ) 10 G (1)
(1) Qualification limit.
2Submit Documentation Feedback Copyright ©2004–2011, Texas Instruments Incorporated
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SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
ELECTRICAL CHARACTERISTICS
operating at 25°C free-air temperature, VI= 20 V, VO= 5 V, IO= IO(max), CI= 2.2 µF, CO= 330 µF (unless otherwise noted)
PTN78020W
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VI≤24 V 0.1 6 (1)
IOOutput current TA= 25°C, natural convection airflow VI= 32 V 0.1 5 (1) A
VI= 36 V 0.1 4.5 (1)
VIInput voltage range Over IOrange 7 (2) 36 (3) V
Set-point voltage tolerance TA= 25°C±2%(4)
Temperature variation –40°C to +85°C±0.5%
Line regulation Over VIrange ±10 mV
VOLoad regulation Over IOrange ±10 mV
Includes set point, line, load
Total output voltage variation ±3% (4)
–40 <TA<85°C
VI<12 V 2.5 VI–2
12 V ≤VI≤15.1 V 2.5 VI–2.5
VO(adj) Output voltage adjust range V
15.1 V <VI≤25 V 2.5 12.6
VI>25 V 0.1 ×VI12.6
VI= 24 V, RSET = 732 Ω, VO= 12 V 94%
ηEfficiency VI= 15 V, RSET = 21 kΩ, VO= 5 V 88%
VI= 15 V, RSET = 78.7 kΩ, VO= 3.3 V 85%
Output voltage ripple 20-MHz bandwith 1% VOV(PP)
IO (LIM) Current limit threshold ΔVO=–50 mV 8.5 A
1 A/µs load step from 50% to 100% IOmax
Transient response Recovery time 200 µs
VOover/undershoot 5 %VO
Input high voltage (VIH) 1 Open (5) V
Inhibit control (pin 3) Input low voltage (VIL)–0.1 0.3
Input low current (IIL) 0.25 mA
II(stby) Input standby current Pin 3 connected to GND 17 mA
VIincreasing 5.5
UVLO Undervoltage lockout V
VIdecreasing 5.2
FSSwitching frequency Over VIand IOranges 440 550 660 kHz
CIExternal input capacitance Ceramic and nonceramic 2.2 (6) µF
Ceramic 300 µF
COExternal output capacitance Nonceramic 330 (7) 2,000
Equiv. series resistance (nonceramic) 10 (8) mΩ
Per Telcordia SR-332, 50% stress,
MTBF Calculated reliability 5.6 106Hr
TA= 40°C, ground benign
(1) Above an input voltage of 24 V, the maximum output current must be derated by 125 mA per volt above 24 V.
(2) For output voltages less than 10 V, the minimum input voltage is 7 V or (VO+ 2) V, whichever is greater. For output voltages of 10 V
and higher, the minimum input voltage is (VO+ 2.5 V). See the Application Information section for further guidance.
(3) For output voltages less than 3.6 V, the maximum input voltage is 10 ×VO. See the Application Information section for further guidance.
(4) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with with 100 ppm/°C or better temperature stability.
(5) This control pin has an internal pullup, and if left open-circuit, the module operates when input power is applied. The open-circuit voltage
is typically 1.5 V. A small, low-leakage (<100 nA) MOSFET is recommended for control. See the Application Information section for
further guidance.
(6) An external 2.2-µF ceramic capacitor is required across the input (VIand GND) for proper operation. Locate the capacitor close to the
module.
(7) 330 µF of output capacitance is required for proper operation. See the Application Information section for further guidance.
(8) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 mΩas the minimum when using max-ESR values to
calculate.
Copyright ©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): PTN78020W PTN78020H
PTN78020W
PTN78020H
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
www.ti.com
ELECTRICAL CHARACTERISTICS
operating at 25°C free-air temperature, VI= 24 V, VO= 12 V, IO= IO(max), CI= 4×4.7 µF, CO= 330 µF (unless otherwise
noted) PTN78020H
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Vo=12 V 0.1 6 (1)
IOOutput current TA= 25°C, natural convection airflow Vo=15 V 0.1 6 (1) (2) A
Vo= 22 V 0.1 4.09 (2)
VIInput voltage range Over IOrange 15 (3) 36 V
Set-point voltage tolerance TA= 25°C±2%(4)
Temperature variation –40°C to +85°C±0.5%
Line regulation Over VIrange ±10 mV
VOLoad regulation Over IOrange ±10 mV
Includes set point, line, load
Total output voltage variation ±3% (4)
–40 <TA<85°C
VI<19 V 11.85 VI–3
19 V ≤VI≤25 V 11.85 VI–4
VO(adj) Output voltage adjust range V
VI>25 V 11.85 22
VI= 24 V, RSET = 383 k Ω, VO= 12 V 94%
ηEfficiency VI= 24 V, RSET = 15 kΩ, VO= 15 V 95%
VI= 32 V, RSET = 95.3 Ω, VO= 22 V 96%
Output voltage ripple 20-MHz bandwith 1% VOV(PP)
IO (LIM) Current limit threshold ΔVO=–50 mV 8.0 A
1 A/µs load step from 50% to 100% IOmax
Transient response Recovery time 200 µs
VOover/undershoot 200 mV
Input high voltage (VIH) 1 Open (5) V
Inhibit control (pin 3) Input low voltage (VIL)–0.1 0.3
Input low current (IIL) 0.25 mA
II(stby) Input standby current Pin 3 connected to GND 17 mA
VIincreasing 12.2
UVLO Undervoltage lockout V
VIdecreasing 12
FSSwitching frequency Over VIand IOranges 440 550 660 kHz
CIExternal input capacitance Ceramic and nonceramic 18.8 (6) µF
Ceramic 0 300 µF
COExternal output capacitance Nonceramic 330 (7) 2,000
Equiv. series resistance (nonceramic) 10 (8) mΩ
Per Telcordia SR-332, 50% stress,
MTBF Calculated reliability 5.6 106Hr
TA= 40°C, ground benign
(1) The maximum output current is 6 A or a maximum output power of 90 W, whichever is less. Above an input voltage of 24 V, the
maximum output current must be derated by 125 mA per volt above 24 V. See the Typica lCharacteristics section for further guidance.
(2) Above an output voltage of 15 V, the maximum output current must be derated by 285 mA per volt. The maximum output power is 90 W.
See the application information for further guidance.
(3) For output voltages less than 19 V, the minimum input voltage is 15 V or (VO+ 3) V, whichever is greater. For output voltages of 19 V
and higher, the minimum input voltage is (VO+ 4 V). See the Application Information section for further guidance.
(4) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with with 100 ppm/°C or better temperature stability.
(5) This control pin has an internal pullup, and if left open-circuit, the module operates when input power is applied. The open-circuit voltage
is typically 1.5 V. A small, low-leakage (<100 nA) MOSFET is recommended for control. See the Application Information section for
further guidance.
(6) Four external 4.7-µF ceramic capacitors are required across the input (VIand GND) for proper operation. Locate the capacitors close to
the module.
(7) 330 µF of output capacitance is required for proper operation. See the Application Information section for further guidance.
(8) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 mΩas the minimum when using max-ESR values to
calculate.
4Submit Documentation Feedback Copyright ©2004–2011, Texas Instruments Incorporated
Product Folder Link(s): PTN78020W PTN78020H
PTN78020
(TopView)
1
2
7
6
543
PTN78020W
PTN78020H
www.ti.com
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
PIN ASSIGNMENT
TERMINAL FUNCTIONS
TERMINAL I/O DESCRIPTION
NAME NO.
This is the common ground connection for the VIand VOpower connections. It is also the 0-Vdc reference
GND 1, 7 for the Inhibit and VOAdjust control inputs.
VI2 I The positive input voltage power node to the module, which is referenced to common GND.
The Inhibit pin is an open-collector/drain active-low input that is referenced to GND. Applying a low-level
ground signal to this input disables the module's output and turns off the output voltage. When the Inhibit
Inhibit 3 I control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left
open-circuit, the module produces an output whenever a valid input source is applied.
A 1% resistor must be connected between this pin and GND (pin 7) to set the output voltage of the
module. If left open-circuit, the output voltage is set to its default value. The temperature stability of the
VOAdjust 4 I resistor should be 100 ppm/°C (or better). The standard resistor value for a number of common output
voltages is provided in the application information.
The sense input allows the regulation circuit to compensate for voltage drop between the module and the
VOSense 5 I load. For optimum voltage accuracy, VOSense should be connected to VO. If the
sense feature is not used, this pin may be left disconnected.
VO6 O The regulated positive power output with respect to the GND node.
Copyright ©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): PTN78020W PTN78020H
0
10
20
30
40
50
0 1 2 3 4 5 6
IO-OutputCurrent- A
V -OutputVoltageRipple-mV
O PP
VO=3.3V
VO=5V
0
1
2
3
4
0 1 2 3 4 5 6
P -PowerDissipation-W
D
IO-OutputCurrent- A
VO=3.3V
VO=5V
0 1 2 3 4 5 6
50
60
70
80
90
100
VO=3.3V
VO=5V
Efficiency-%
IO-OutputCurrent- A
20
30
40
50
60
70
80
90
0 1 2 3 4 5 6
IO-OutputCurrent- A
200LFM
100LFM
Natconv
TemperatureDerating- C
o
Airflow
VO=3.3V
20
30
40
50
60
70
80
90
0 1 2 3 4 5 6
IO-OutputCurrent- A
200LFM
100LFM
Natconv
TemperatureDerating- C
o
Airflow
VO=5V
PTN78020W
PTN78020H
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
www.ti.com
TYPICAL CHARACTERISTICS (7-V INPUT)(1) (2)
EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 1. Figure 2. Figure 3.
TEMPERATURE DERATING TEMPERATURE DERATING
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 4. Figure 5.
(1) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 1,Figure 2, and Figure 3.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
For surface mount packages (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power
pins. Please refer to the mechanical specification for more information. Applies to Figure 4 and Figure 5.
6Submit Documentation Feedback Copyright ©2004–2011, Texas Instruments Incorporated
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0
10
20
30
40
50
0 1 2 3 4 5 6
IO-OutputCurrent- A
VO-OutputVoltageRipple-mVPP
VO=3.3V
VO=5V
V =12V
O
0
1
2
3
4
0 1 2 3 4 5 6
-PowerDissipation-W
PD
IO-OutputCurrent- A
VO=3.3V
VO=5V
VO=12V
5
0 1 2 3 4 5 6
50
60
70
80
90
100
VO=3.3V
VO=5V
Efficiency-%
IO-OutputCurrent- A
V =12V
O
PTN78020W
PTN78020H
www.ti.com
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
TYPICAL CHARACTERISTICS (15-V INPUT)(1) (2)
EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 6. Figure 7. Figure 8.
TEMPERATURE DERATING TEMPERATURE DERATING
vs vs
OUTPUT CURRENT OUTPUT CURRENT
Figure 9. Figure 10.
(1) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 6,Figure 7, and Figure 8.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
For surface mount packages (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power
pins. Please refer to the mechanical specification for more information. Applies to Figure 9 and Figure 10.
Copyright ©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): PTN78020W PTN78020H
0 1 2 3 4 5 6
40
50
60
70
80
90
100
Efficiency-%
I -OutputCurrent- A
O
V =3.3V
O
V =5V
O
V =12V
O
V =18V
O
V =15V
O
0
10
30
20
40
50
60
70
V -OutputVoltageRipple-mV
O PP
01 2 3 4 56
I -OutputCurrent- A
O
V =3.3V
O
V =5V
O
V =15V
O
V =12V
O
V =18V
O
0
1
2
3
4
5
0 1 2 3 4 5 6
P -PowerDissipation-W
D
IO-OutputCurrent- A
6
V =18V
O
V =15V
O
V =12V
O
V =5V
O
V =3.3V
O
PTN78020W
PTN78020H
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
www.ti.com
TYPICAL CHARACTERISTICS (24-V INPUT)(1) (2)
EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 11. Figure 12. Figure 13.
TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 14. Figure 15. Figure 16.
(1) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 11,Figure 12, and Figure 13.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
For surface mount packages (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power
pins. Please refer to the mechanical specification for more information. Applies to Figure 14 through Figure 16.
8Submit Documentation Feedback Copyright ©2004–2011, Texas Instruments Incorporated
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0
10
30
20
40
50
60
70
80
V -OutputVoltageRipple-mV
O PP
0 1 2 3 4 5
I -OutputCurrent- A
O
V =3.3V
O
V =5V
O
V =12V
O
V =15V
O
V =22V
O
0
1
2
3
4
5
0 1 2 3 4 5
IO-OutputCurrent- A
6
7
P -PowerDissipation-W
D
V =22V
O
V =15V
O
V =3.3V
O
V =5V
O
V =12V
O
0 1 2 3 4 5
40
45
50
55
60
65
70
75
80
85
90
95
100
Efficiency-%
I -OutputCurrent- A
O
V =3.3V
O
V =5V
O
V =12V
O
V =22V
O
V =15V
O
20
30
40
50
60
70
80
90
0 1 2 3 4 5
I -OutputCurrent- A
O
200LFM
Natconv
Airflow
VO=5V
TemperatureDerating- C°
100LFM
20
30
40
50
60
70
80
90
0 1 2 3 4 5
I -OutputCurrent- A
O
200LFM
100LFM
Natconv
Airflow
VO=15V
TemperatureDerating- C°
20
30
40
50
60
70
80
90
0 1 2 3 4 5
I -OutputCurrent- A
O
200LFM
100LFM
Natconv
TemperatureDerating- C°
Airflow
VO=12V
20
30
40
50
60
70
80
90
0 1 2 3 4
I -OutputCurrent- A
O
Airflow
VO=22V
Natconv
100LFM
200LFM
TemperatureDerating- C°
PTN78020W
PTN78020H
www.ti.com
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
TYPICAL CHARACTERISTICS (32-V INPUT)(1) (2)
EFFICIENCY OUTPUT VOLTAGE RIPPLE POWER DISSIPATION
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 17. Figure 18. Figure 19.
TEMPERATURE DERATING TEMPERATURE DERATING TEMPERATURE DERATING
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 20. Figure 21. Figure 22.
TEMPERATURE DERATING
vs
OUTPUT CURRENT
Figure 23.
(1) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 17,Figure 18, and Figure 19.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
For surface mount packages (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power
pins. Please refer to the mechanical specification for more information. Applies to Figure 20 through Figure 23.
Copyright ©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 9
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R =54.9k
SET W´1.25 V
V -V
O min
-RP
PTN78020W
PTN78020H
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
www.ti.com
APPLICATION INFORMATION
Adjusting the Output Voltage of the PTN78020x Series of Wide-Output Adjust Power Modules
General
A resistor must be connected between the VOAdjust control (pin 4) and GND (pin 7) to set the output voltage.
The adjustment range is from 2.5 V to 12.6 V for PTN78020W. The adjustment range is from 11.85 V to 22 V for
PTN78020H. If pin 4 is left open, the output voltage defaults to the lowest value.
Table 2 gives the preferred value of the external resistor for a number of standard voltages, with the actual
output voltage that the value provides. For other output voltages, the value of the required resistor can either be
calculated using Equation 1 and the constants for the applicable product in Table 1.Figure 24 shows the
placement of the required resistor.
(1)
Table 1. RSET Formula Constants
PRODUCT VMIN RP
PTN780x0W 2.5 V 6.49 kΩ
PTN780x0H 11.824 V 6.65 kΩ
Input Voltage Considerations
The PTN78020 is a step-down switching regulator. In order that the output remains in regulation, the input
voltage must exceed the output by a minimum differential voltage.
Another consideration is the pulse width modulation (PWM) range of the regulator's internal control circuit. For
stable operation, its operating duty cycle should not be lower than some minimum percentage. This defines the
maximum advisable ratio between the regulator input and output voltage magnitudes.
As an example, for satisfactory performance, the operating input voltage range of the PTN78020x must adhere to
the following requirements.
1. For PTN78020W output voltages lower than 10 V, the minimum input voltage is (VO+ 2 V) or 7 V, whichever
is higher.
2. For PTN78020W output voltages equal to 10 V and higher, the minimum input voltage is (VO+ 2.5 V) .
3. For PTN78020W, the maximum input voltage is (10 ×VO) or 36 V, whichever is less.
4. For PTN78020H output voltages lower than 19 V, the minimum input voltage is (VO+ 3 V) or 15 V, whichever
is higher.
5. For PTN78020H output voltages equal to 19 V and higher, the minimum input voltage is (VO+4V).
Table 2 gives the operating input voltage range for the common output bus voltages. In addition, the Electrical
Characteristics table defines the available output voltage adjust range for various input voltages.
Table 2. Standard Values of Rset for Common Output Voltages
VORSET VOOperating
PRODUCT (Required) (Standard Value) (Actual) VIRange
2.5 V Open 2.5 V 7 V to 25 V
3.3 V 78.7 kΩ3.306 V 7 V to 33 V
PTN780x0W 5 V 21 kΩ4.996 V 7 V to 36 V
12 V 732 Ω12.002 V 14.5 V to 36 V
12 V 383 kΩ12.000 V 15 V to 36 V
15 V 15 kΩ14.994 V 18 V to 36 V
PTN780x0H 18 V 4.42 kΩ18.023 V 21 V to 36 V
22 V 95.3 21.998 V 26 V to 36 V
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GND GND
RSET
0.05 W
1%
CO
330 Fm
PTN78020W
7 4
5
62
3
VI
VI
VO
VO
GND
Inhibit
1
Sense
Adjust
C
2.2 F
Ceramic
I
m
GND
PTN78020W
PTN78020H
www.ti.com
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(1) A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C (or
better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 4 and 7
using dedicated PCB traces.
(2) Never connect capacitors from VOAdjust to either GND or VO. Any capacitance added to the VOAdjust
pin affects the stability of the regulator.
Figure 24. PTN78020W VOAdjust Resistor Placement
Table 3. PTN78020W Output Voltage Set-Point Resistor Values
VO(V) RSET (kΩ) VO(V) RSET (kΩ) VO(V) RSET (kΩ) VO(V) RSET (kΩ)
2.50 Open 3.7 V 50.7 6.1 12.6 9.0 4.07
2.55 1370 3.8 V 46 6.2 12.1 9.2 3.75
2.60 680 3.9 V 42.5 6.3 11.6 9.4 3.46
2.65 451 4.0 V 39.3 6.4 11.1 9.6 3.18
2.70 337 4.1 V 36.4 6.5 10.7 9.8 2.91
2.75 268 4.2 V 33.9 6.6 10.2 10.0 2.66
2.80 222 4.3 V 31.6 6.7 9.85 10.2 2.42
2.85 190 4.4 V 29.6 6.8 9.47 10.4 2.20
2.90 165 4.5 V 27.8 6.9 9.11 10.6 1.98
2.95 146 4.6 V 26.2 7.0 8.76 10.8 1.78
3.00 131 4.7 V 24.7 7.1 8.43 11.0 1.58
3.05 118 4.8 V 23.3 7.2 8.11 11.2 1.40
3.10 108 4.9 V 22.1 7.3 7.81 11.4 1.22
3.15 99.1 5.0 V 21.0 7.4 7.52 11.6 1.05
3.20 91.5 5.1 V 19.9 7.5 7.24 11.8 0.889
3.25 85.0 5.2 V 18.9 7.6 6.97 12.0 0.734
3.30 79.3 5.3 V 18.0 7.7 6.71 12.2 0.585
3.35 74.2 5.4 V 17.2 7.8 6.46 12.4 0.442
3.40 69.8 5.5 V 16.4 7.9 6.22 12.6 0.305
3.45 65.7 5.6 V 15.6 8.0 5.99
3.50 62.1 5.7 V 15.0 8.2 5.55
3.55 58.9 5.8 V 14.3 8.4 5.14
3.60 55.9 5.9 V 13.7 8.6 4.76
3.65 53.2 6.0 V 13.1 8.8 4.40
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RSET
0.05 W
1%
CO
330 Fm
PTN78020H
7 4
5
62
3
VI
VI
VO
VO
GND
Inhibit
1
Sense
Adjust
C
4x4.7 F
Ceramic
I
m
GND
PTN78020W
PTN78020H
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(1) A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C (or
better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 4 and 7
using dedicated PCB traces.
(2) Never connect capacitors from VOAdjust to either GND or VO. Any capacitance added to the VOAdjust
pin affects the stability of the regulator.
Figure 25. PTN78020H VOAdjust Resistor Placement
Table 4. PTN78020H Output Voltage Set-Point Resistor Values
VORSET VORSET VORSET
11.85 V 2633 kΩ13.50 V 34.3 kΩ17.20 V 6.12 kΩ
11.90 V 896 kΩ13.65 V 30.9 kΩ17.40 V 5.66 kΩ
11.95 V 538 kΩ13.80 V 28.1 kΩ17.60 V 5.23 kΩ
12.00 V 383 kΩ13.95 V 25.6 kΩ17.80 V 4.83 kΩ
12.10 V 242 kΩ14.10 V 23.5 kΩ18.00 V 4.46 kΩ
12.15 V 204 kΩ14.25 V 21.6 kΩ18.20 V 4.11 kΩ
12.20 V 176 kΩ14.40 V 19.9 kΩ18.40 V 3.79 kΩ
12.25 V 154 kΩ14.55 V 18.5 kΩ18.60 V 3.48 kΩ
12.30 V 138 kΩ14.70 V 17.2 kΩ18.80 V 3.19 kΩ
12.35 V 124 kΩ14.85 V 16.0 kΩ19.00 V 2.91 kΩ
12.40 V 113 kΩ15.00 V 14.9 kΩ19.20 V 2.65 kΩ
12.45 V 103 kΩ15.15 V 13.9 kΩ19.40 V 2.41 kΩ
12.50 V 94.9 kΩ15.30 V 13.1 kΩ19.60 V 2.18 kΩ
12.55 V 87.9 kΩ15.45 V 12.3 kΩ19.80 V 1.95 kΩ
12.60 V 81.8 kΩ15.60 V 11.5 kΩ20.00 V 1.74 kΩ
12.65 V 76.4 kΩ15.75 V 10.8 kΩ20.20 V 1.54 kΩ
12.70 V 71.7 kΩ15.90 V 10.2 kΩ20.40 V 1.35 kΩ
12.75 V 67.5 kΩ16.05 V 9.59 kΩ20.60 V 1.17 kΩ
12.80 V 63.7 kΩ16.20 V 9.03 kΩ20.80 V 995 Ω
12.85 V 60.2 kΩ16.35 V 8.51 kΩ21.00 V 829 kΩ
12.90 V 57.1 kΩ16.50 V 8.03 kΩ21.20 V 669 Ω
12.95 V 54.3 kΩ16.65 V 7.57 kΩ21.40 V 516 Ω
13.00 V 51.7 kΩ16.80 V 7.14 kΩ21.80 V 229 Ω
13.05 V 49.3 kΩ17.10 V 6.36 kΩ22.00 V 94 Ω
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CAPACITOR RECOMMENDATIONS for the PTN78020 WIDE-OUTPUT
ADJUST POWER MODULES
PTN78020W Input Capacitor
The minimum requirement for the input capacitance is a 2.2-µF ceramic capacitor for PTN78020W, in either a
X5R or X7R temperature characteristic. Ceramic capacitors should be located within 0.5 inch (1,27 cm) of the
regulator's input pins. Electrolytic capacitors can be used at the input, but only in addition to the required ceramic
capacitance. The minimum ripple current rating for any nonceramic capacitance must be at least 500 mA rms for
VO≤5.5. For VO>5.5 V, the minimum ripple current rating is 750 mA rms. The ripple current rating of electrolytic
capacitors is a major consideration when they are used at the input. This ripple current requirement can be
reduced by placing more ceramic capacitors at the input, in addition to the minimum required 2.2 µF.
Tantalum capacitors are not recommended for use at the input bus, as none were found to meet the minimum
voltage rating of 2 ×(maximum dc voltage + ac ripple). This voltage derating is standard practice for regular
tantalum capacitors to ensure reliability. Polymer-tantalum capacitors are more reliable, and are available with a
maximum rating of typically 20 V. These can be used with input voltages up to 16 V.
PTN78020H Input Capacitor
The minimum requirement for PTN78020H the input capacitance is 18.8 µF (4x 4.7-µF) or equivalent . Ceramic
capacitors should be located within 0.5 inch (1,27 cm) of the regulator's input pins. Electrolytic capacitors can be
used at the input, but only in addition to the required ceramic capacitance. The minimum ripple current rating for
any nonceramic capacitance must be at least 500 mA rms for VO≤5.5. For VO>5.5 V, the minimum ripple
current rating is 750 mA rms. The ripple current rating of electrolytic capacitors is a major consideration when
they are used at the input.
Tantalum capacitors are not recommended for use at the input bus, as none meet the minimum voltage rating of
2×(maximum dc voltage + ac ripple). This voltage derating is standard practice for regular tantalum capacitors
to ensure reliability. Polymer-tantalum capacitors are more reliable, and are available with a maximum rating of
typically 20 V. These can be used with input voltages up to 16 V.
PTN78020W/PTN78020H Output Capacitor
The minimum capacitance required to ensure stability is a 330 µF. Either ceramic or electrolytic-type capacitors
can be used. The minimum ripple current rating for the nonceramic capacitance must be at least 250 mA rms.
The stability of the module and voltage tolerances are compromised if the capacitor is not placed near the output
bus pins. A high-quality, computer-grade electrolytic capacitor should be adequate. A ceramic capacitor can be
also be located within 0.5 inch (1,27 cm) of the output pin.
For applications with load transients (sudden changes in load current), the regulator response improves with
additional capacitance. Additional electrolytic capacitors should be located close to the load circuit. These
capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz. Aluminum electrolytic capacitors are
suitable for ambient temperatures above 0°C. For operation below 0°C, tantalum or Os-Con type capacitors are
recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR should be no
lower than 10 m Ω(17 mΩusing the manufacturer's maximum ESR for a single capacitor). A list of capacitors
and vendors are identified in Table 5 and Table 6, the recommended capacitor tables.
Ceramic Capacitors
Above 150 kHz, the performance of aluminum electrolytic capacitors becomes less effective. To further reduce
the reflected input ripple current, or the output transient response, multilayer ceramic capacitors must be added.
Ceramic capacitors have low ESR and their resonant frequency is higher than the bandwidth of the regulator.
When placed at the output, their combined ESR is not critical as long as the total value of ceramic capacitance
does not exceed 300 µF. Also, to prevent the formation of local resonances, do not place more than three
identical ceramic capacitors with values of 10 µF or greater in parallel.
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Tantalum Capacitors
Tantalum-type capacitors may be used at the output, and are recommended for applications where the ambient
operating temperature can be less than 0°C. The AVX TPS, Sprague 593D/594/595, and Kemet
T495/T510/T520 capacitors series are suggested over many other tantalum types due to their rated surge, power
dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have
considerably higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors are
also less reliable as they have lower power dissipation and surge current ratings. Tantalum capacitors that do not
have a stated ESR or surge current rating are not recommended for power applications. When specifying
Os-Con and polymer-tantalum capacitors for the output, the minimum ESR limit is encountered well before the
maximum capacitance value is reached.
Capacitor Table
The capacitor tables, Table 5 and Table 6, identifies the characteristics of capacitors from a number of vendors
with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both
the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors
from other vendors are available with comparable specifications. Those listed are for guidance. The rms rating
and ESR (at 100 kHz) are critical parameters necessary to ensure both optimum regulator performance and long
capacitor life.
Designing for Load Transients
The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of
1 A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the
required value of output capacitance. As the di/dt of a transient is increased, the response of a converter's
regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation of
any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application
specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output
capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the
capacitors selected.
Table 5. Recommended Input/Output Capacitors (PTN78020W)
CAPACITOR CHARACTERISTICS QUANTITY
85°C
CAPACITOR VENDOR/ EQUIVALENT VENDOR
WORKING MAXIMUM PHYSICAL
COMPONENT VALUE SERIES INPUT OUTPUT NUMBER
VOLTAGE RIPPLE SIZE
SERIES (µF) RESISTANCE BUS BUS
(V) CURRENT (mm)
(ESR) (Ω)(mArms)
Panasonic FC( Radial) 35 330 0.068 1050 10 ×16 1 1 EEUFC1V331 (VI<30 V)
FK (SMD) 50 330 0.12 900 12,5 ×13,5 1 (1) 1 EEVFK1H331Q
United Chemi-Con PXA (SMD) 16 330 0.014 4360 10 ×12,2 ≤1 PXA16VC331MJ12TP
1(1) (VI<14 V)
PS 16 330 0.014 5500 10 ×12,5 1 (1) ≤1 16PS330M J12 (VI<14 V)
LXZ 35 220 0.090 760 10 ×12,5 2 LXZ35VB221M10X12LL
1(1) (VI<30 V)
MVZ(SMD) 25 470 0.09 670 10 ×10 1 1 MVZ25VC471MJ10TP
(VI<24 V) (VO≤5.5 V)
Nichicon UWG (SMD) 35 330 0.15 670 10 ×10 1 1 UWG1V331MNR1GS
SP 20 180 0.032 4280 10 ×10.5 2 (1) ≤2 20SP180M (VI~VO≤16 V)
Sanyo Os-Con SVP (SMD) 16 330 0.020 4700 10 ×12,7 1 (1) ≤1 16SVP330M (VI≤14 V)
SP 20 180 0.032 4280 10 ×10.5 2 (1) ≤2 20SP180M (VI≤16 V)
20 100 0.085 1543 7,3 L ×4,3 N/R (2) ≤3 TPSV107M020R0085
W×4,1 H (VO≤10 V)
AVX Tantalum TPS (SMD) 20 100 0.200 >817 3225 N/R (2) ≤3 TPSE107M020R0200
(VO≤10 V)
(1) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the
regulator at a higher input voltage, select a capacitor with the next higher voltage rating.
(2) Not recommended (N/R). The voltage rating does not meet the minimum operating limits in most applications.
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Table 5. Recommended Input/Output Capacitors (PTN78020W) (continued)
CAPACITOR CHARACTERISTICS QUANTITY
85°C
CAPACITOR VENDOR/ EQUIVALENT VENDOR
WORKING MAXIMUM PHYSICAL
COMPONENT VALUE SERIES INPUT OUTPUT NUMBER
VOLTAGE RIPPLE SIZE
SERIES (µF) RESISTANCE BUS BUS
(V) CURRENT (mm)
(ESR) (Ω)(mArms)
Kemet X5R Ceramic 6.3 47 0.002 >1000 3225 N/R (3) ≤4 C1210C476K9PAC
(VO≤5.5 V)
TDK X5R Ceramic 6.3 47 0.002 >1000 3225 N/R (3) ≤4 C3225X5R0J476MT
(VO≤5.5 V)
Murata X5R Ceramic 6.3 47 0.002 >1000 3225 N/R (3) ≤4 GRM42-2X5R476M6.3
(VO≤5.5 V)
Murata X7R Ceramic 50 4.7 0.002 >1000 3225 ≥1 1 GRM32ER71H475KA88L
TDK X7R Ceramic 50 2.2 0.002 >1000 3225 ≥1 1 C3225X7R1H225KT
TDK X7R Ceramic 25 2.2 0.002 >1000 3225 ≥1(4) 1 C3225X7R1E225KT/MT
(VI~VO≤20 V)
Kemet X7R Ceramic 25 2.2 0.002 >1000 3225 ≥1(4) 1 C1210C225K3RAC
(VO≤20 V)
AVX X7R Ceramic 25 2.2 0.002 >1000 3225 ≥1(4) 1 C12103C225KAT2A
(VO≤20 V)
TDK X7R Ceramic 50 1.0 0.002 >1000 3225 ≥2(5) 1 C3225X7R1H105KT
Kemet X7R Ceramic 50 1.0 0.002 >1000 3225 ≥2(5) 1 C1210C105K5RAC
Kemet Radial Through-hole 50 1.0 0.002 >1000 5,08 ×7,62 ≥2(5) 1 C330C105K5R5CA
×9,14 H
Murata Radial Through-hole 50 2.2 0.004 >1000 10 H ×10 ≥1 1 RPER71H2R2KK6F03
W×4 D
(3) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the
regulator at a higher input voltage, select a capacitor with the next higher voltage rating.
(4) The maximum rating of the ceramic capacitor limits the regulator operating input voltage to 20 V. Select a alternative ceramic
component to operate at a higher input voltage.
(5) A total capacitance of 2 µF is an acceptable replacement value for a single 2.2-µF ceramic capacitor
Copyright ©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 15
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Table 6. Recommended Input/Output Capacitors (PTN78020H)
CAPACITOR CHARACTERISTICS QUANTITY
85°C
CAPACITOR VENDOR/ EQUIVALENT VENDOR
WORKING MAXIMUM PHYSICAL
COMPONENT VALUE SERIES INPUT OUTPUT NUMBER
VOLTAGE RIPPLE SIZE
SERIES (µF) RESISTANCE BUS BUS
(V) CURRENT (mm)
(ESR) (Ω)(mArms)
Panasonic FC( Radial) 35 330 0.068 1050 10 ×16 1 1 EEUFC1V331 (VI<30 V)
FK (SMD) 50 330 0.12 900 12,5 ×13,5 1 (1) 1 EEVFK1H331Q
LXZ 35 220 0.09 760 10 ×12,5 2 LXZ35VB2231M10X12LL
1(1) (VI<30 V)
MVY(SMD) 35 220 0.15 670 10 ×10 1 2 MVY35VC221M10X10TP
(VI<30 V)
Nichicon UWG (SMD) 35 330 0.15 670 10 ×10 1 1 UWG1V331MNR1GS
(VI<30 V)
Sanyo Os-Con SP (SMD 20 180 0.032 4280 10 ×10.5 2 (1) ≤2 20SP180M (VI~ VO≤16 V)
TDK X7R Ceramic 25 2.2 0.002 >1000 3225 ≥8(2) 1 C3225X7R1E225KT/MT
(VO≤20 V)
Murata X7R Ceramic 25 2.2 0.002 >1000 3225 ≥8(2) 1 GRM32RR71E225K
(VO≤20 V)
Kemet X7R Ceramic 25 2.2 0.002 >1000 3225 ≥8(2) 1 C1210C225K3RAC
(VO≤20 V)
AVX X7R Ceramic 25 2.2 0.002 >1000 32225 ≥8(2) 1 C12103C225KAT2A
(VO≤20 V)
Murata X7R Ceramic 50 4.7 0.002 >1000 3225 ≥4 1 GRM32ER71H475KA88L
TDK X7R Ceramic 50 3.3 0.002 >1000 3225 ≥6 1 CKG45NX7R1H335M
Murata Radial Through-hole 50 3.3 0.004 >1000 12,5 H x ≥6 1 RPER71H3R3KK6F03
12,5 W x
4 D
Kemet Radial Through-hole 50 4.7 0.002 >1000 5,08 ×7,62 ≥4(3) 1 C350C475K5R5CA
×9,14 H
(1) The voltage rating of the input capacitor must be selected for the desired operating input voltage range of the regulator. To operate the
regulator at a higher input voltage, select a capacitor with the next higher voltage rating.
(2) The maximum rating of the ceramic capacitor limits the regulator operating input voltage to 20 V. Select a alternative ceramic
component to operate at a higher input voltage.
(3) A total capacitance of 2 µF is an acceptable replacement value for a single 2.2-µF ceramic capacitor
Output Voltage Sense
An external output voltage sense improves the load regulation performance of the module by enabling it to
compensate for any IR-voltage drop between the module and the load circuit. This voltage drop is caused by the
flow of current through the resistance in the printed-circuit board connections.
To use the output voltage sense feature, simply connect the VOSense input (pin 5) to VO, close to the device
that draws the most supply current. If an external voltage sense is not desired, the VOSense input may be left
open circuit. An internal resistor (15 Ωor less), connected between this input and VO, ensures that the output
remains in regulation.
With VOSense connected, the difference between the voltage measured directly between the VOand GND, and
that measured from VOSense to GND, represents the amount of IR-voltage drop being compensated by the
regulator. This should be limited to a maximum of 0.3 V.
Note: The external voltage sense is not designed to compensate for the forward drop of nonlinear or
frequency-dependent components that may be placed in series with the regulator's output. Examples include
OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the external
sense connection, they are effectively placed inside the regulation control loop. This can adversely affect the
stability of the module.
Undervoltage Lockout
The undervoltage lockout (UVLO) circuit prevents the module from attempting to power up until the input voltage
is above the UVLO threshold. This is to prevent the module from drawing excessive current from the input source
at power up. Below the UVLO threshold, the module is held off.
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t-Time=5ms/div
VI(5V/div)
VO(2V/div)
II(2 A/div)
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PTN78020H
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SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
Power-Up Characteristics
When configured per the standard application, the PTN78020 power module produces a regulated output voltage
following the application of a valid input source voltage. During power up, internal soft-start circuitry slows the
rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the input
source. The soft-start circuitry introduces a short time delay (typically 5 ms –10 ms) into the power-up
characteristic. This is from the point that a valid input source is recognized. Figure 26 shows the power-up
waveforms for a PTN78020W, operating from a 12-V input and with the output voltage adjusted to 5 V. The
waveforms were measured with a 1.5-A resistive load.
Figure 26. Power-Up Waveforms
Current-Limit Protection
The PTN78020 modules protect against load faults with a continuous current limit characteristic. Under a load
fault condition, the output current cannot exceed the current limit value. Attempting to draw current that exceeds
the current-limit value causes the module to progressively reduce its output voltage. Current is continuously
supplied to the fault until it is removed. On removal of the fault, the output voltage promptly recovers. When
limiting output current, the regulator experiences higher power dissipation, which increases its temperature. If the
temperature increase is excessive, the module overtemperature protection begins to periodically turn the output
voltage completely off.
Overtemperature Protection
A thermal shutdown mechanism protects the module's internal circuitry against excessively high temperatures. A
rise in temperature may be the result of a drop in airflow, a high ambient temperature, or a sustained current limit
condition. If the junction temperature of the internal control IC rises excessively, the module turns itself off,
reducing the output voltage to zero. The module instantly restarts when the sensed temperature decreases by a
few degrees.
Overtemperature protection is a last resort mechanism to prevent damage to the module. It should not be relied
on as permanent protection against thermal stress. Always operate the module within its temperature derated
limits, for the worst-case operating conditions of output current, ambient temperature, and airflow. Operating the
module above these limits, albeit below the thermal shutdown temperature, reduces the long-term reliability of
the module.
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Product Folder Link(s): PTN78020W PTN78020H
Inhibit
GND GND
1%
(Ceramic)
PTN78020
14
62
3
AdjustGND
VO
VI
VI=12V VO=5V
Inhibit
7
5
Sense
+
Q1
BSS138
L
O
A
D
21k
CI
2.2 Fm
CO
330 Fm
RSET
0.05W
t-Time=5ms/div
VO(2V/div)
II(2 A/div)
Q1VGS (10V/div)
PTN78020W
PTN78020H
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
www.ti.com
Output On/Off Inhibit
For applications requiring output voltage on/off control, the PTN78020 power module incorporates an output
on/off Inhibit control (pin 3). The inhibit feature can be used wherever there is a requirement for the output
voltage from the regulator to be turned off.
The power module functions normally when the Inhibit pin is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to VIwith respect to GND. Figure 27 shows the the circuit used to
demonstrate the inhibit function. Note the discrete transistor (Q1). Turning Q1 on applies a low voltage to the
Inhibit control pin and turns the module off. The output voltage decays as the load circuit discharges the
capacitance. The current drawn at the input is reduced to typically 17 mA. If Q1 is then turned off, the module
executes a soft-start power up. A regulated output voltage is produced within 20 ms. Figure 28 shows the typical
rise in the output voltage, following the turn off of Q1. The turn off of Q1 corresponds to the fall in the waveform,
Q1 Vgs. The waveforms were measured with a 1.5-A resistive load.
Figure 27. On/Off Inhibit Control Circuit
Figure 28. Power Up Response From Inhibit Control
18 Submit Documentation Feedback Copyright ©2004–2011, Texas Instruments Incorporated
Product Folder Link(s): PTN78020W PTN78020H
PTN78020W
2 6
5
+
7 4
GND Adjust
Sense
13
GNDGND
UDG−06049
VO
VIVO
VI
Inhibit
C1
1 µF
50 V
Ceramic
C2
2.2 µF
50 V
Ceramic
(Required)
C3
330 µF
(Required)
C4
1 µF
Ceramic
RSET
(2)
(1) (1)
PTN78020W
PTN78020H
www.ti.com
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
Optional Input/Output Filters
Power modules include internal input and output ceramic capacitors in all of their designs. However, some
applications require much lower levels of either input reflected or output ripple/noise. This application describes
various filters and design techniques found to be successful in reducing both input and output ripple/noise.
Input/Output Capacitors
The easiest way to reduce output ripple and noise is to add one or more 1-μF ceramic capacitors, such as C4
shown in Figure 29. Ceramic capacitors should be placed close to the output power terminals. A single 1-μF
capacitor reduces the output ripple/noise by 10% to 30% for modules with a rated output current of less than 3 A.
(Note: C3 is required to improve the regulator transient response, and does not reduce output ripple and noise.)
Switching regulators draw current from the input line in pulses at their operating frequency. The amount of
reflected (input) ripple/noise generated is directly proportional to the equivalent source impedance of the power
source including the impedance of any input lines. The addition of C1, minimum 2.2-μF ceramic capacitor, near
the input power pins, reduces reflected conducted ripple/noise by 30% to 50%.
(1) See the specifications for required value and type. For the PTN78020H, C2 = 4 ×4.7 μF.
(2) See the Application Information section for suggeted value and type.
Figure 29. Adding High-Frequency Bypass Capacitors To The Input and Output
πFilters
If a further reduction in ripple/noise level is required for an application, higher order filters must be used. A π(pi)
filter, employing a ferrite bead (Fair-Rite part number 2773021447 or equivalent) in series with the input or output
terminals of the regulator reduces the ripple/noise by at least 20 db (see Figure 30 and Figure 31). In order for
the inductor to be effective in reduction of ripple and noise, ceramic capacitors are required. (Note: see Capacitor
Recommendations for the PTN78020W for addtional information on vendors and component suggestions.)
These inductors plus ceramic capacitors form an excellent filter because of the rejection at the switching
frequency (650 kHz - 1 MHz). The placement of this filter is critical. It must be located as close as possible to the
input or output pins to be efffective. The ferrite bead is small (12.5 mm ×3 mm), easy to use, low cost, and has
low dc resistance. Fair-Rite also manufactures a surface mount bead (part number 2773021447), through hole
(part number 2673000701) rated to 5 A, but in this application, it is effective to 6 A on the output bus. 1-µH to
5-µH inductors can be used in place of the ferrite inductor bead.
Copyright ©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): PTN78020W PTN78020H
C5
1 µF
Ceramic
UDG−06050
C1
2.2 µF
50 V
Ceramic
C2
330 µF
50 V
(Optional) RSET
C6
100 µF
VIVIPTN78020W
2 6
5
+
7 4
Vo
Inhibit GND Adjust
Vo
Sense
13
GNDGND
+
GND
C3
2.2 µF
50 V
Ceramic
(Required)
C4
330 µF
(Required)
(2)
(3)(4)
L1
1−5 µH
(1)
L2
1−5 µH
+
10
15
20
25
30
35
40
45
0 0.5 1 1.5 2 2.5 3
1 MHz
600 kHz
Attenuation − dB
Load Current − A
PTN78020W
PTN78020H
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
www.ti.com
(1) See the specifications for required value and type. For the PTN78020H, C3 = 4 ×4.7 μF.
(2) See the Application Information section for suggeted value and type.
(3) Recommended whenever IO>2A.
(4) For PTN78020H, C1 ≤4.7 μF.
Figure 30. Adding πFilters (IO≤3 A)
Figure 31. π-Filter Attenuation vs. Load Current
20 Submit Documentation Feedback Copyright ©2004–2011, Texas Instruments Incorporated
Product Folder Link(s): PTN78020W PTN78020H
C5
1 µF
Ceramic
UDG−05089
C1
1 µF
50 V
Ceramic
C2
330 µF
50 V
(Optional) RSET
C6
100 µF
VIVI
C3
2.2 µF
50 V
Ceramic
(Required)
C4
330 µF
(Required)
PTN78020W
2 6
5
+
7 4
Inhibit GND Adjust
Sense
13
GNDGND
+
GND
L2
1 µH to 5 µH
L1
1 µH to 5 µHL3
1 µH to 5 µH
(1)
(2)
(3)
(1)
VOVO
PTN78020W
PTN78020H
www.ti.com
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
(1) See the specifications for required value and type. For the PTN78020H, C2 = 4 ×4.7 μF.
(2) See the Application Information section for suggeted value and type.
(3) Recommended whenever IO>2A.
(4) For PTN78020H, C1 ≥4.7 μF.
Figure 32. Adding πFilters (IO=3Ato6A)
Copyright ©2004–2011, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): PTN78020W PTN78020H
PTN78020W
PTN78020H
SLTS228C –DECEMBER 2004–REVISED AUGUST 2011
www.ti.com
REVISION HISTORY
Changes from Revision B (APRIL 2008) to Revision C Page
•Added Output Voltage Sense section ............................................................................................................................... 16
22 Submit Documentation Feedback Copyright ©2004–2011, Texas Instruments Incorporated
Product Folder Link(s): PTN78020W PTN78020H
PACKAGE OPTION ADDENDUM
www.ti.com 20-Aug-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
PTN78020HAH ACTIVE Through-
Hole Module EUK 7 20 Pb-Free (RoHS) SN N / A for Pkg Type
PTN78020HAS ACTIVE Surface
Mount Module EUL 7 20 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS
PTN78020HAST ACTIVE Surface
Mount Module EUL 7 200 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS
PTN78020HAZ ACTIVE Surface
Mount Module EUL 7 20 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR
PTN78020HAZT ACTIVE Surface
Mount Module EUL 7 200 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR
PTN78020WAD ACTIVE Through-
Hole Module EUK 7 20 Pb-Free (RoHS) SN N / A for Pkg Type
PTN78020WAH ACTIVE Through-
Hole Module EUK 7 20 Pb-Free (RoHS) SN N / A for Pkg Type
PTN78020WAS ACTIVE Surface
Mount Module EUL 7 20 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS
PTN78020WAST ACTIVE Surface
Mount Module EUL 7 200 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS
PTN78020WAZ ACTIVE Surface
Mount Module EUL 7 20 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR
PTN78020WAZT ACTIVE Surface
Mount Module EUL 7 200 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PACKAGE OPTION ADDENDUM
www.ti.com 20-Aug-2011
Addendum-Page 2
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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