POWER MANAGEMENT
1www.semtech.com
SC1175
Low Power Dual Synchronous DC/DC
Controller With Current Sharing Circuitry
Description Features
Applications
Revision: September 22, 2004
The SC1175 is a versatile 2 phase, synchronous, volt-
age mode PWM controller that may be used in two dis-
tinct ways. First, the SC1175 is ideal for applications
where point of use output power exceeds any single in-
put power budget. Alternatively, the SC1175 can be used
as a dual switcher. The SC1175 features a temperature
compensated voltage reference, over current protection
with 50% fold-back and internal level-shifted, high-side
drive circuitry.
In current sharing configuration, the SC1175 can pro-
duce a single output voltage from two separate voltage
sources (which can be different voltage levels) while
maintaining current sharing between the channels. Cur-
rent sharing is programmable to allow loading each input
supply as required by the application.
In dual switcher configuration, two feedback paths are
provided for independent control of the separate out-
puts. The device will provide a regulated output from
flexibly configured inputs (3.3V, 5V, 12V), provided 5V is
present for VCC. The two switchers are 180° out of phase
to minimize input and output ripple.
300kHz fixed frequency operation
Soft Start and Enable function
Power Good output provided
Over current protection with 50% fold-back
Phase-shifted switchers minimize ripple
High efficiency operation, >90%
Programmable output(s) as low as 1.25V
Industrial temperature range
20 pin SOIC or TSSOP package
Two Phase, Current Sharing Controller
Flexible, same or separate VIN
Programmable current sharing
Combined current limit with fold-back
2 phases operating opposed for ripple reduction
Thermal distribution via multi-phase output
Two Independent PWM Controllers
Flexible, same or separate VIN
Independent control for each channel
Independent and separate current limit
2 phases operating opposed for ripple reduction (if
same VIN used)
Graphics cards
DDR Memory
Peripheral add-in card
SSTL Termination
Dual-Phase power supply
Power supplies requiring two outputs
2 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
2 Channels with Current Sharing
Typical Application Circuit
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2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
Electrical Characteristics
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Unless Specified: VCC = 4.75 to 5.25V, GND = PGND = 0V, FB = VO, 0mV < (CS(+) - CS(-)) < 60mV , TJ = 25°C
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Absolute Maximum Rating
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not implied.
4 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
Electrical Characteristics (Cont.)
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NOTES:
(1) Specification refers to application circuit.
(2) The soft start pin sources 25µA to an external capacitor. The converter operates in synchronous mode
above the soft start transition threshold and in asynchronous mode below it.
(3) Power good is an open collector pulled low when the output voltage is outside the ±10% window.
(4) This device is ESD sensitive. Use of standard ESD handling precautions is required.
(5) 200ns maximum at 70°.
Unless Specified: VCC = 4.75 to 5.25V, GND = PGND = 0V, FB = VO, 0mV < (CS(+) - CS(-)) < 60mV , TJ = 25°C
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2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
Expanded Pin DescriptionExpanded Pin Description
Expanded Pin DescriptionExpanded Pin Description
Expanded Pin Description
Pin 1:Pin 1:
Pin 1:Pin 1:
Pin 1: (VREF)
Internal 1.25V reference
Connected to the + input of the master channel error
amplifier.
Pin 2: Pin 2:
Pin 2: Pin 2:
Pin 2: (+IN)
+ Input of slave channel error amplifier.
Connected to 1.25V reference (Pin 1) for the two
independent channel configuration.
Pin 3, 18: Pin 3, 18:
Pin 3, 18: Pin 3, 18:
Pin 3, 18: (-IN2, -IN1)
- Inputs of close loop error amplifiers.
Works as a feedback inputs (For both modes).
Pin 4: Pin 4:
Pin 4: Pin 4:
Pin 4: (VCC)
VCC chip supply voltage.
15V maximum, 10mA typical.
Needs a 1µF ceramic multilayer decoupling capacitor
to GND (Pin 20).
Pin 5, 6,Pin 5, 6,
Pin 5, 6,Pin 5, 6,
Pin 5, 6,11
11
15, 15, 1
5, 15, 1
5, 16: 6:
6: 6:
6: (CL2-, CL2+, CL1+, CL1-)
Pins (-) and (+) of the current limit amplifiers for both
channels.
Connected to output current sense resistors. Com-
pares that sense voltage to internal 75mV reference.
Needs RC filter for noise rejection.
Pin 7, 14: Pin 7, 14:
Pin 7, 14: Pin 7, 14:
Pin 7, 14: (BST2, BST1)
BST signal. Supply for high side driver.
Can be connected to a high enough voltage source.
Usually connected to bootstrap circuit.
Pin 8, 13:Pin 8, 13:
Pin 8, 13:Pin 8, 13:
Pin 8, 13: (DH2, DH1)
DH signal (Drive High).
Gate drive for top MOSFETs.
Requires a small series resistor.
Pin 9, 12:Pin 9, 12:
Pin 9, 12:Pin 9, 12:
Pin 9, 12: (DL2, DL1)
DL signal (Drive Low).
Gate drive for bottom MOSFETs.
Requires a small series resistor.
Pin 10:Pin 10:
Pin 10:Pin 10:
Pin 10: (PGND)
Power GND. Return of gate drive currents.
Pin 11:Pin 11:
Pin 11:Pin 11:
Pin 11: (BSTC)
Supply for bottom MOSFETs gate drive.
Pin 1Pin 1
Pin 1Pin 1
Pin 177
77
7::
::
: (SS/ENA)
Soft start pin. Internal current source connected to
external capacitor.
Inhibits the chip if pulled down.
Pin 19:Pin 19:
Pin 19:Pin 19:
Pin 19: (PWRGD)
Power good signal.
Open collector signal .
Turns to 0 if output voltage is outside the power good
window.
Pin 20: Pin 20:
Pin 20: Pin 20:
Pin 20: (GND)
Analog GND.
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Notes:
(1) Only available in tape and reel packaging. A reel
contains 1000 (SOIC) and 2500 (TSSOP) devices.
(2) Lead free product. This product is fully WEEE and
RoHS compliant.
Pin Configuration Ordering Information
Pin Descriptions
Top View
(SOIC-20 and TSSOP-20 Pin)
6 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
NOTES
(1) Block 1 (top) is the Master and Block 2 (bottom) is the Slave in current sharing configuration.
(2) For independant operation there is no Master or Slave.
Main Loop(s)
The SC1175 is a dual, voltage mode synchronous Buck
controller, the two separate channels are identical and
share only IC supply pins (Vcc and GND), output driver
ground (PGND) and pre-driver supply voltage (BSTC). They
also share a common oscillator generating a sawtooth
waveform for channel 1 and an inverted sawtooth for
channel 2. Each channel has its own current limit com-
parator. Channel 1 has the positive input of the error
amplifier internally connected to Vref. Channel 2 has
both inputs of the error amplifier uncommitted and avail-
able externally. This allows the SC1175 to operate in two
distinct modes.
a) Two independent channels with either common or
different input voltages and different output voltages.
The two channels each have their own voltage feed-
Block Diagram
Applications Information - Theory of Operation
back path from their own output. In this mode, the
positive input of error amplifier 2 is connected exter-
nally to Vref. If the application uses a common input
voltage, the sawtooth phase shift between the chan-
nels provides some measure of input ripple current
cancellation.
b) Two channels operating in current sharing mode
with common output voltage and either common in-
put voltage or different input voltages. In this mode,
channel 1 operates as a voltage mode Buck control-
ler, as before, but error amp 2 monitors and amplifies
the difference in voltage across the output current
sense resistors of channel 1 and channel 2 (Master
and Slave) and adjusts the Slave duty cycle to match
output currents. Because of finite gain and offsets in
the loop, the resistor ratio for perfect current match-
ing is not 1:1. The Master and Slave channels still have
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2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
their own current limits, identical to the independent
channel case.
Power Good
The controller provides a power good signal. This is an
open collector output, which is pulled low if the output
voltage is outside of the power good window.
Soft Start/Enable
The Soft Start/Enable (SS/ENA) pin serves several func-
tions. If held below the Soft Start Enable threshold, both
channels are inhibited. DH1 and DH2 will be low, turning
off the top FETs. Between the Soft Start Enable thresh-
old and the Soft Start End threshold, the duty cycle is
allowed to increase. At the Soft Start End threshold,
maximum duty cycle is reached. In practical applications
the error amplifier will be controlling the duty cycle be-
fore the Soft Start End threshold is reached. To avoid
boost problems during startup in current share mode,
both channels start up in asynchronous mode, and the
bottom FET body diode is used for recirculating current
during the FET off time. When the SS/ENA pin reaches
the Soft Start Transition threshold, the channels begin
operating in synchronous mode for improved efficiency.
The soft start pin sources approximately 25uA and soft
start timing can be set by selection of an appropriate
soft start capacitor value.
SENSE RESISTOR SELECTION
Current Sharing Mode
Calculation of the three programming resistors to achieve
sharing. Three resistors will determine the current shar-
ing load line. First the offset resistor will ensure that the
load line crosses the origin (0 Amp on each channel) for
sharing at light current. A pull up resistor from the 5V
bias (VCC of the chip) will be used. For low duty cycle on
the slave channel (below 50%), the pull up will be on pin
Applications Information - Theory of Operation
3. For high duty cycle on the slave channel (above 50%),
the pull up will be on pin 2.
The formula is:
SLAVE
OUT
OUT
uppull
V
1.V
5.
V5
X1.2)K(R +
−
−
=Ω
−
100Ω being the value of the resistors connecting the
pins 2 and 3 to the two output sense resistors.
.1 V is an estimated voltage drop across the MOSFETs.
Positive values go to pin 3, negative to pin 2.
A +20K will be a 20K on pin 3.
A -20K will be a 20K on pin 2.
Now that the offset resistor has been fixed, we need to
set up the maximum current for each channel.
Selection of RSENSE 1 for the master channel: (in m ohm)
RSENSE 1 = 72mV / I max master
Selection of RSENSE 2 for the slave channel: (in m ohm)
RSENSE 2 = 72mV / I max slave
The errors will be minimized if the power components
have been sized proportionately to the maximum
currents.
Independent Channels
Calculation of the two current limiting resistors.
There is no need for an offset resistor in the indepen-
dent channels mode, only the two sense resistors are
used:
Selection of RSENSE 1 for the channel 1: (mohms)
RSENSE 1 = 72mV / I max ch 1
Selection of RSENSE 2 for the channel 2: (mohms)
RSENSE 1 = 72mV / I max ch 2
8 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
Typical Characteristics - 2 Channels with Current Sharing
Figure 1:Figure 1:
Figure 1:Figure 1:
Figure 1: VOUT vs IIN(5V) and IIN(12V) with VCC applied and 4A load. Soft start capacitor = 10nF.
Ch1: VOUT
Ch2: IIN(5V) (1A/Div)
Ch4: IIN(12V) (1A/Div)
IOUT: 4.004 Amps
Figure 2:Figure 2:
Figure 2:Figure 2:
Figure 2: VOUT vs IIN(5V) and IIN(12V) with VCC removed and 4A load. Soft start capacitor = 10nF.
Ch1: VOUT
Ch2: IIN(5V) (1A/Div)
Ch4: IIN(12V) (1A/Div)
IOUT: 4.004 Amps
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SC1175
POWER MANAGEMENT
Typical Characteristics - 2 Channels with Current Sharing (Cont.)
Figure 3:Figure 3:
Figure 3:Figure 3:
Figure 3: VOUT vs IIN(5V) and IIN(12V) with VCC applied and 12A load. Soft start capacitor = 10nF.
Ch1: VOUT
Ch2: IIN(5V) (2A/Div)
Ch4: IIN(12V) (2A/Div)
IOUT: 12 Amps
Figure 4:Figure 4:
Figure 4:Figure 4:
Figure 4: VOUT vs IIN(5V) and IIN(12V) with VCC removed and 12A load. Soft start capacitor = 10nF.
Ch1: VOUT
Ch2: IIN(5V) (2A/Div)
Ch4: IIN(12V) (2A/Div)
IOUT: 12 Amps
10 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
Typical Characteristics - 2 Channels with Current Sharing (Cont.)
The Current Sharing Evaluation Board is not intended for a specific application. The power components are not
optimized for minimum cost and size. This evaluation board should be used to understand the operation of the
SC1175. To design with SC1175 for specific current sharing applications,please refer to Application note AN00-3.
Figure 5:Figure 5:
Figure 5:Figure 5:
Figure 5: Efficiency data - current sharing mode.
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
02468101214
Current (A)
Efficiency (%)
VIN(MASTER) = 12V
VIN(SLAVE) = 5V
VOUT = 2.75V
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SC1175
POWER MANAGEMENT
Evaluation Board Schematic - 2 Channel with Current Sharing
12 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
metIytitnauQecnerefeRtraP
127C,1CV05,Fu22.
23 4C,3C,2CV05,Fu1
33 61C,51C,5C10V05,Fn
418CV05,Fn1
53 41C,01C,9CV6,Fu001
66 91C,81C,71C,31C,21C,11CV61,Fu051
722D,1D8414LD
811LA8,Hu5.7
912LA8,Hu7.4
0123M,1M0307BDFro9087FRI
1124M,2M0307BDFro1187FRI
2111R421
317 8R,7R,6R,5R,4R,3R,2R2.2
41201R,9R001
51121R051
61131R600.
71141R300.
8111U5711CS
Evaluation Board Bill of Materials - 2 Channels with Current Sharing
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SC1175
POWER MANAGEMENT
Top Side Traces
Bottom Side Traces
Evaluation Board Gerber Plots - 2 Channels with Current Sharing
14 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
Figure 6: Figure 6:
Figure 6: Figure 6:
Figure 6:
Figure 7 Figure 7
Figure 7 Figure 7
Figure 7: Output Current: Output Current
: Output Current: Output Current
: Output Current
Input Voltage = 12V @ 5Amps. 2A/DIV.
Typical Characteristics - 2 Independent Channels
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SC1175
POWER MANAGEMENT
Typical Characteristics - 2 Independent Channels (Cont.)
Figure 8: Figure 8:
Figure 8: Figure 8:
Figure 8: Peak - Peak Output Ripple @ 5A
IInput Voltage = 12V.
Output Voltage = 2.0V
Figure 9: Phase Node 12V Input @ 5A Figure 9: Phase Node 12V Input @ 5A
Figure 9: Phase Node 12V Input @ 5A Figure 9: Phase Node 12V Input @ 5A
Figure 9: Phase Node 12V Input @ 5A (without snubber and RC network.
16 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
Typical Characteristics - 2 Independent Channels (Cont.)
Figure 10: Start-up Power On Figure 10: Start-up Power On
Figure 10: Start-up Power On Figure 10: Start-up Power On
Figure 10: Start-up Power On
Chan. 1 = Output Current. 2A/DIV.
Chan. 2 = 5V Bias Voltage
Figure 11: Power OffFigure 11: Power Off
Figure 11: Power OffFigure 11: Power Off
Figure 11: Power Off
Chan. 1 = Output Current. 2A/DIV.
Chan. 2 = 5V Bias Voltage
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2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
The Independent Channels Evaluation Board is not intended for a specific application. The power components
are not optimized for minimum cost and size. This evaluation board should be used to understand the operation
of the SC1175.
To design with the SC1175 for specific independent channels applications. Please refer to: Application note
AN00-4.
Typical Characteristics - 2 Independent Channels Efficiency Test
70
75
80
85
90
95
100
0123456
OUTPUT CURRENT
EFFICIENCY
Vin = 12V Vout =
2.0V
Vin = 5V Vout =
1.25V
Figure 12:Figure 12:
Figure 12:Figure 12:
Figure 12:
18 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
Evaluation Board Schematic - 2 Independent Channels
19
2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
metIytitnauQecnerefeRtraP
13 3C,2C,1CV05,Fu1
23 11C,6C,4CV05,Fu22.
315CV05,Fn1
44 01C,9C,8C,7CV05,Fn01
59 02C,91C,81C,71C,61C,51C,41C,31C,21CV6,Fu051
63 32C,22C,12CV61,Fu001
722D,1D8414LD
811LA8,Hu5.7
912LA8,Hu7.4
0123M,1M0307BDFro9087FRI
1124M,2M0307BDFro1187FRI
217 7R,6R,5R,4R,3R,2R,1R2.2
313 31R,9R,8R001
41101R600.
51111R022
61121R300.
71251R,41R421
8111U5711CS
Evaluation Board Bill of Materials - 2 Independent Channels
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SC1175
POWER MANAGEMENT
Top Side Traces
Bottom Side Traces
Evaluation Board Gerber Plots - 2 Independent Channels
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SC1175
POWER MANAGEMENT
Power and signal traces must be kept separated for
noise considerations. Feedback, current sense traces
and analog ground should not cross any traces or
planes carrying high switching currents, such as the
input loop or the phase node.
The input loop, consisting of the input capacitors and
both MOSFETs must be kept as small as possible. All of
the high switching currents occur in this loop. The
enclosed loop area must be kept small to minimize
inductance and radiated and conducted emissions.
Designing for minimum trace length is not always the
best approach, often a more optimum layout can be
achieved by keeping loop area constraints in mind.
It is important to keep gate lengths short, the IC must
be close to the power switches. This is more difficult in
a dual channel device than a single and requires that
the two power paths run on either side of a centrally
located controller.
Grounding requirements are always conflicting in a
buck converter, especially at high power, and the trick
is to achieve the best compromise. Power ground
(PGND) should be returned to the bottom MOSFET
source to provide the best gate current return path.
Analog ground (GND) should be returned to the ground
side of the output capacitors so that the analog
circuitry in the controller has an electrically quiet
reference and to provide the greatest feedback
accuracy. The problem is that the differential voltage
capability of the two IC grounds is limited to about 1V
for proper operation and so the physical separation
between the two grounds must also be minimized. If
the grounds are too far apart, fast current transitions
in the connection can generate voltage spikes exceed-
ing the 1V capability, resulting in unstable and erratic
behavior.
The feedback divider must be close to the IC and be
returned to analog ground. Current sense traces must
be run parallel and close to each other and to analog
ground.
The IC must have a ceramic decoupling capacitor
across its supply pins, mounted as close to the device
as possible. The small ceramic, noise-filtering capaci-
tors on the current sense lines should also be placed
as close to the IC as possible.
22 2004 Semtech Corp. www.semtech.com
SC1175
POWER MANAGEMENT
Outline Drawing - TSSOP-20
L
(L1)
c
01
GAGE
PLANE
SEE DETAIL DETAIL A
A
0.25
.026 BSC
.252 BSC
20
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20
0.10
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4.40
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SEATING
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INDICATOR
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bbb C A-B D
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DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS3.
OR GATE BURRS.
DATUMS AND TO BE DETERMINED AT DATUM PLANE
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
-B-
NOTES:
1.
2. -A- -H-
SIDE VIEW
(.039)
.004
.008
-
.024
-
-
-
-
0°
.018
.003
.031
.002
-
8° 0°
0.20
0.10
-8°
0.45
0.09
0.80
0.05
.030
.007
.047
.042
.006
-
(1.0)
0.60
-
0.75
0.20
-
-
-1.20
1.05
0.15
A
B
C
D
e
e/2
H
PLANE
D
E
A1
A2 A
REFERENCE JEDEC STD MO-153, VARIATION AC.
4.
INCHES
b
N
ccc
aaa
bbb
01
E1
E
L
L1
e
D
c
A2
A1
DIM
A
MIN MAX
MILLIMETERS
MIN
DIMENSIONS
NOM MAX NOM
(.222) (5.65)
ZG
Y
P
(C) 4.10.161
0.65.026
0.40.016
1.55.061
7.20.283
X
INCHES
DIMENSIONS
Z
P
Y
X
DIM
C
G
MILLIMETERS
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
NOTES:
1.
Land Pattern - TSSOP-20
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SC1175
POWER MANAGEMENT
Contact Information
Outline Drawing - SO-20
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
