Low Power, Wide Supply Range,
Low Cost Difference Amplifiers, G = ½, 2
AD8278/AD8279
Rev. C
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FEATURES
Wide input range beyond supplies
Rugged input overvoltage protection
Low supply current: 200 µA maximum (per amplifier)
Low power dissipation: 0.5 mW at VS = 2.5 V
Bandwidth: 1 MHz (G = ½)
CMRR: 80 dB minimum, dc to 20 kHz (G = ½, B Grade)
Low offset voltage drift: ±1 V/°C maximum (B Grade)
Low gain drift: 1 ppm/°C maximum (B Grade)
Enhanced slew rate: 1.4 V/µs
Wide power supply range
Single supply: 2 V to 36 V
Dual supplies: ±2 V to ±18 V
8-lead SOIC, 14-lead SOIC, and 8-lead MSOP packages
APPLICATIONS
Voltage measurement and monitoring
Current measurement and monitoring
Instrumentation amplifier building block
Portable, battery-powered equipment
Test and measurement
GENERAL DESCRIPTION
The AD8278 and AD8279 are general-purpose difference
amplifiers intended for precision signal conditioning in power
critical applications that require both high performance and low
power. The AD8278 and AD8279 provide exceptional common-
mode rejection ratio (80 dB) and high bandwidth while amplifying
input signals that are well beyond the supply rails. The on-chip
resistors are laser trimmed for excellent gain accuracy and high
CMRR. They also have extremely low gain drift vs. temperature.
The common-mode range of the amplifier extends to almost
triple the supply voltage (for G = ½), making the amplifer ideal
for single-supply applications that require a high common-
mode voltage range. The internal resistors and ESD circuitry at
the inputs also provide overvoltage protection to the op amp.
The AD8278 and AD8279 can be used as difference amplifiers with
G = ½ or G = 2. They can also be connected in a high precision,
single-ended configuration for non inverting and inverting gains of
−½, −2, +3, +2, +1½, +1, or +½. The AD8278 and AD8279
provide an integrated precision solution that has a smaller size,
lower cost, and better performance than a discrete alternative.
The AD8278 and AD8279 operate on single supplies (2.0 V to 36 V)
or dual supplies (±2 V to ±18 V). The maximum quiescent supply
current is 200 A, which is ideal for battery-operated and portable
systems. For unity-gain difference amplifiers with similar
performance, refer to the AD8276 and AD8277 data sheets.
FUNCTIONAL BLOCK DIAGRAMS
25
3 1
6
7
4
40k20k
40k
–VS
+VS
–IN
+IN
SENSE
OUT
REF
20k
AD8278
08308-001
Figure 1. AD8278
212
314
13
11
40k20k
40k
+VS
–INA
+INA
SENSEA
OUTA
REFA
20k
610
5 8
9
40k20k
40k
–INB
+INB
SENSEB
OUTB
REFB
20k
AD8279
4
–VS
08308-058
Figure 2. AD8279
Table 1. Difference Amplifiers by Category
Low
Distortion High Voltage Current Sensing1 Low Power
AD8270 AD628 AD8202 (U) AD8276
AD8271 AD629 AD8203 (U) AD8277
AD8273 AD8205 (B)
AD8274 AD8206 (B)
AMP03 AD8216 (B)
1U = unidirectional, B = bidirectional.
The AD8278 is available in the space-saving 8-lead MSOP and
SOIC packages, and the AD8279 is offered in a 14-lead SOIC
package. Both are specified for performance over the industrial
temperature range of −40°C to +85°C and are fully RoHS
compliant.
AD8278/AD8279
Rev. C | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagrams............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
Maximum Power Dissipation ..................................................... 7
Short-Circuit Current .................................................................. 7
ESD Caution.................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ..............................................9
Theory of Operation ...................................................................... 16
Circuit Information.................................................................... 16
Driving the AD8278 and AD8279 ........................................... 16
Input Voltage Range................................................................... 16
Power Supplies............................................................................ 17
Applications Information.............................................................. 18
Configurations............................................................................ 18
Differential Output .................................................................... 19
Instrumentation Amplifier........................................................ 19
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 21
REVISION HISTORY
1/11—Rev. B to Rev. C
Change to Impedance/Differential Parameter, Table 3 ............... 4
Change to Impedance/Differential Parameter, Table 5 ............... 6
4/10—Rev. A to Rev. B
Changed Supply Current Parameters to AD8278 Supply Current
Parameter and AD8279 Supply Current Parameter, Table 5 ...... 6
Updated Outline Dimensions....................................................... 20
10/09—Rev. 0 to Rev. A
Added AD8279 and 14-Lead SOIC Model .....................Universal
Changes to Features.......................................................................... 1
Changes to General Description .................................................... 1
Change to Table 2 ............................................................................. 3
Change to Table 3 ..............................................................................4
Change to Table 4 ..............................................................................5
Change to Table 5 ..............................................................................6
Added Figure 6 and Table 9 .............................................................8
Changes to Figure 31 and Figure 32............................................. 13
Changes to Figure 40, Figure 41, and Figure 42 ......................... 14
Added Figure 47; Renumbered Sequentially .............................. 15
Changes to Figure 51 to Figure 57................................................ 18
Added Differential Output Section.............................................. 19
Changes to Figure 59...................................................................... 19
Updated Outline Dimensions....................................................... 21
Changes to Ordering Guide.......................................................... 21
7/09—Revision 0: Initial Version
AD8278/AD8279
Rev. C | Page 3 of 24
SPECIFICATIONS
VS = ±5 V to ±15 V, VREF = 0 V, TA = 25°C, RL = 10 k connected to ground, G = ½ difference amplifier configuration, unless
otherwise noted.
Table 2.
G = ½
Grade B Grade A
Parameter Conditions
Min Typ Max Min Typ Max
Unit
INPUT CHARACTERISTICS
System Offset1 50 100 50 250 µV
Over Temperature TA = −40°C to +85°C 100 250 µV
vs. Power Supply VS = ±5 V to ±18 V 2.5 5 µV/V
Average Temperature
Coefficient TA = −40°C to +85°C 0.3 1 2 5 µV/°C
Common-Mode Rejection
Ratio (RTI)
VS = ±15 V, VCM = ±27 V,
RS = 0 Ω 80 74 dB
Input Voltage Range2 −3 (VS + 0.1) +3 (VS − 1.5) −3 (VS + 0.1) +3 (VS − 1.5) V
Impedance3
Differential 120 120 kΩ
Common Mode 30 30 kΩ
DYNAMIC PERFORMANCE
Bandwidth 1 1 MHz
Slew Rate 1.1 1.4 1.1 1.4 V/µs
Channel Separation f = 1 kHz 130 130 dB
Settling Time to 0.01% 10 V step on output,
CL = 100 pF
9 9 µs
Settling Time to 0.001% 10 10 µs
GAIN
Gain Error 0.005 0.02 0.01 0.05 %
Gain Drift TA = −40°C to +85°C 1 5 ppm/°C
Gain Nonlinearity VOUT = 20 V p-p 7 12 ppm
OUTPUT CHARACTERISTICS
Output Voltage Swing4 V
S = ±15 V, RL = 10 kΩ
TA = −40°C to +85°C −VS + 0.2 +VS − 0.2 −VS + 0.2 +VS − 0.2 V
Short-Circuit Current Limit ±15 ±15 mA
Capacitive Load Drive 200 200 pF
NOISE5
Output Voltage Noise f = 0.1 Hz to 10 Hz 1.4 1.4 V p-p
f = 1 kHz 47 50 47 50 nV/√Hz
POWER SUPPLY6
AD8278 Supply Current 200 200 A
Over Temperature TA = −40°C to +85°C 250 250 A
AD8279 Supply Current 300 350 300 350 A
Over Temperature TA = −40°C to +85°C 400 400 A
Operating Voltage Range7 ±2 ±18 ±2 ±18 V
TEMPERATURE RANGE
Operating Range −40 +125 −40 +125 °C
1 Includes input bias and offset current errors, RTO (referred to output).
2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the for details. Input Voltage Range
3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy.
4 Output voltage swing varies with supply voltage and temperature. See Figur through for details. e 22 Figure 25
5 Includes amplifier voltage and current noise, as well as noise from internal resistors.
6 Supply current varies with supply voltage and temperature. See Figure and for details. 26 Figure 28
7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference
voltage.
AD8278/AD8279
Rev. C | Page 4 of 24
VS = ±5 V to ±15 V, VREF = 0 V, TA = 25°C, RL = 10 k connected to ground, G = 2 difference amplifier configuration, unless
otherwise noted.
Table 3.
G = 2
Grade B Grade A
Parameter Conditions
Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
System Offset1 100 200 100 500 µV
Over Temperature TA = −40°C to +85°C 200 500 µV
vs. Power Supply VS = ±5 V to ±18 V 5 10 µV/V
Average Temperature
Coefficient TA = −40°C to +85°C 0.6 2 2 5 µV/°C
Common-Mode
Rejection Ratio (RTI)
VS = ±15 V, VCM = ±27 V,
RS = 0 Ω 86 80 dB
Input Voltage Range2 −1.5 (VS + 0.1) +1.5 (VS − 1.5) −1.5 (VS + 0.1) +1.5 (VS − 1.5) V
Impedance3
Differential 30 30 kΩ
Common Mode 30 30 kΩ
DYNAMIC PERFORMANCE
Bandwidth 550 550 kHz
Slew Rate 1.1 1.4 1.1 1.4 V/µs
Channel Separation f = 1 kHz 130 130 dB
Settling Time to 0.01% 10 V step on output,
CL = 100 pF
10 10 µs
Settling Time to 0.001% 11 11 µs
GAIN
Gain Error 0.005 0.02 0.01 0.05 %
Gain Drift TA = −40°C to +85°C 1 5 ppm/°C
Gain Nonlinearity VOUT = 20 V p-p 7 12 ppm
OUTPUT CHARACTERISTICS
Output Voltage Swing4 V
S = ±15 V, RL = 10 kΩ,
TA = −40°C to +85°C −VS + 0.2 +VS − 0.2 −VS + 0.2 +VS − 0.2 V
Short-Circuit Current
Limit
±15 ±15 mA
Capacitive Load Drive 350 350 pF
NOISE5
Output Voltage Noise f = 0.1 Hz to 10 Hz 2.8 2.8 V p-p
f = 1 kHz 90 95 90 95 nV/√Hz
POWER SUPPLY6
AD8278 Supply Current 200 200 A
Over Temperature TA = −40°C to +85°C 250 250 A
AD8279 Supply Current 300 350 300 350 A
Over Temperature TA = −40°C to +85°C 400 400 A
Operating Voltage Range7 ±2 ±18 ±2 ±18 V
TEMPERATURE RANGE
Operating Range −40 +125 −40 +125 °C
1 Includes input bias and offset current errors, RTO (referred to output).
2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the section for details. Input Voltage Range
3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy.
4 Output voltage swing varies with supply voltage and temperature. See Figur through for details. e 22 Figure 25
5 Includes amplifier voltage and current noise, as well as noise from internal resistors.
6 Supply current varies with supply voltage and temperature. See Figure and for details. 26 Figure 28
7 Unbalanced dual supplies can be used, such as −VS = −0.5 V and +VS = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference
voltage.
AD8278/AD8279
Rev. C | Page 5 of 24
VS = +2.7 V to <±5 V, VREF = midsupply, TA = 25°C, RL = 10 k connected to midsupply, G = ½ difference amplifier configuration, unless
otherwise noted.
Table 4.
G = ½
Grade B Grade A
Parameter Conditions
Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
System Offset1 75 150 75 250 µV
Over Temperature TA = −40°C to +85°C 150 250 µV
vs. Power Supply VS = ±5 V to ±18 V 2.5 5 µV/V
Average Temperature
Coefficient TA = −40°C to +85°C 0.3 1 2 5 µV/°C
Common-Mode Rejection
Ratio (RTI)
VS = 2.7 V, VCM = 0 V to
2.4 V, RS = 0 Ω 80 74 dB
V
S = ±5 V, VCM = −10 V
to +7 V, RS = 0 Ω 80 74 dB
Input Voltage Range2 −3 (VS + 0.1) +3 (VS − 1.5) −3 (VS + 0.1) +3 (VS − 1.5) V
Impedance3
Differential 120 120 kΩ
Common Mode 30 30 kΩ
DYNAMIC PERFORMANCE
Bandwidth 870 870 kHz
Slew Rate 1.3 1.3 V/µs
Channel Separation f = 1 kHz 130 130 dB
Settling Time to 0.01% 2 V step on output,
CL = 100 pF, VS = 2.7 V
7 7 µs
GAIN
Gain Error 0.005 0.02 0.01 0.05 %
Gain Drift TA = −40°C to +85°C 1 5 ppm/°C
OUTPUT CHARACTERISTICS
Output Swing4 R
L = 10 kΩ,
TA = −40°C to +85°C −VS + 0.1 +VS − 0.15 −VS + 0.1 +VS − 0.15 V
Short-Circuit Current Limit ±10 ±10 mA
Capacitive Load Drive 200 200 pF
NOISE5
Output Voltage Noise f = 0.1 Hz to 10 Hz 1.4 1.4 V p-p
f = 1 kHz 47 50 47 50 nV/√Hz
POWER SUPPLY6
AD8278 Supply Current TA = −40°C to +85°C 200 200 A
AD8279 Supply Current TA = −40°C to +85°C 375 375 A
Operating Voltage Range 2.0 36 2.0 36 V
TEMPERATURE RANGE
Operating Range −40 +125 −40 +125 °C
1 Includes input bias and offset current errors, RTO (referred to output).
2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the section for details. Input Voltage Range
3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy.
4 Output voltage swing varies with supply voltage and temperature. See Figur through for details. e 22 Figure 25
5 Includes amplifier voltage and current noise, as well as noise from internal resistors.
6 Supply current varies with supply voltage and temperature. See Figure and for details. 27 Figure 28
AD8278/AD8279
Rev. C | Page 6 of 24
VS = +2.7 V to <±5 V, VREF = midsupply, TA = 25°C, RL = 10 k connected to midsupply, G = 2 difference amplifier configuration, unless
otherwise noted.
Table 5.
G = 2
Grade B Grade A
Parameter Conditions
Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS
System Offset1 150 300 150 500 µV
Over Temperature TA = −40°C to +85°C 300 500 µV
vs. Power Supply VS = ±5 V to ±18 V 5 10 µV/V
Average Temperature
Coefficient TA = −40°C to +85°C 0.6 2 3 5 µV/°C
Common-Mode Rejection
Ratio (RTI)
VS = 2.7 V, VCM = 0 V
to 2.4 V, RS = 0 Ω 86 80 dB
V
S = ±5 V, VCM = −10 V
to +7 V, RS = 0 Ω 86 80 dB
Input Voltage Range2 −1.5 (VS + 0.1) +1.5 (VS − 1.5) −1.5 (VS + 0.1) +1.5 (VS − 1.5) V
Impedance3
Differential 30 30 kΩ
Common Mode 30 30 kΩ
DYNAMIC PERFORMANCE
Bandwidth 450 450 kHz
Slew Rate 1.3 1.3 V/µs
Channel Separation f = 1 kHz 130 130 dB
Settling Time to 0.01% 2 V step on output,
CL = 100 pF, VS = 2.7 V
9 9 µs
GAIN
Gain Error 0.005 0.02 0.01 0.05 %
Gain Drift TA = −40°C to +85°C 1 5 ppm/°C
OUTPUT CHARACTERISTICS
Output Swing4 R
L = 10 kΩ,
TA = −40°C to +85°C −VS + 0.1 +VS − 0.15 −VS + 0.1 +VS − 0.15 V
Short-Circuit Current Limit ±10 ±10 mA
Capacitive Load Drive 200 200 pF
NOISE5
Output Voltage Noise f = 0.1 Hz to 10 Hz 2.8 2.8 V p-p
f = 1 kHz 94 100 94 100 nV/√Hz
POWER SUPPLY6
AD8278 Supply Current TA = −40°C to +85°C 200 200 A
AD8279 Supply Current TA = −40°C to +85°C 375 375 A
Operating Voltage Range 2.0 36 2.0 36 V
TEMPERATURE RANGE
Operating Range −40 +125 −40 +125 °C
1 Includes input bias and offset current errors, RTO (referred to output).
2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the section for details. Input Voltage Range
3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy.
4 Output voltage swing varies with supply voltage and temperature. See Figur through for details. e 22 Figure 25
5 Includes amplifier voltage and current noise, as well as noise from internal resistors.
6 Supply current varies with supply voltage and temperature. See Figure and for details. 27 Figure 28
AD8278/AD8279
Rev. C | Page 7 of 24
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter Rating
Supply Voltage ±18 V
Maximum Voltage at Any Input Pin −VS + 40 V
Minimum Voltage at Any Input Pin +VS − 40 V
Storage Temperature Range −65°C to +150°C
Specified Temperature Range −40°C to +85°C
Package Glass Transition Temperature (TG) 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
The θJA values in Table 7 assume a 4-layer JEDEC standard
board with zero airflow.
Table 7. Thermal Resistance
Package Type θJA Unit
8-Lead MSOP 135 °C/W
8-Lead SOIC 121 °C/W
14-Lead SOIC 105 °C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the AD8278 and
AD8279 are limited by the associated rise in junction tempera-
ture (TJ) on the die. At approximately 150°C, which is the glass
transition temperature, the properties of the plastic change.
Even temporarily exceeding this temperature limit may change
the stresses that the package exerts on the die, permanently shifting
the parametric performance of the amplifiers. Exceeding a
temperature of 150°C for an extended period may result in a
loss of functionality.
2.0
1.6
1.2
0.8
0.4
0
–50 0–25 255075100125
MAXIMUM POWER DISSIPATION (W)
AMBIENT TEMERATURE (°C)
T
J
MAX = 150°C
MSOP
JA
= 135°C/W
SOIC
JA
= 121°C/W
08308-002
Figure 3. Maximum Power Dissipation vs. Ambient Temperature
SHORT-CIRCUIT CURRENT
The AD8278 and AD8279 have built-in, short-circuit protection
that limits the output current (see Figure 29 for more information).
While the short-circuit condition itself does not damage the
part, the heat generated by the condition can cause the part to
exceed its maximum junction temperature, with corresponding
negative effects on reliability. Figure 3 and Figure 29, combined
with knowledge of the supply voltages and ambient temperature of
the part, can be used to determine whether a short circuit will
cause the part to exceed its maximum junction temperature.
ESD CAUTION
AD8278/AD8279
Rev. C | Page 8 of 24
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
REF
1
–IN
2
+IN
3
–VS
4
NC
8
+VS
7
OUT
6
SENSE
5
NC = NO CONNECT
AD8278
TOP VIEW
(Not to Scale)
0
8308-003
Figure 4. MSOP Pin Configuration
REF
1
–IN
2
+IN
3
–VS
4
NC
8
+VS
7
OUT
6
SENSE
5
NC = NO CONNECT
AD8278
TOP VIEW
(Not to Scale)
0
8308-004
Figure 5. SOIC Pin Configuration
Table 8. AD8278 Pin Function Descriptions
Pin No. Mnemonic Description
1 REF Reference Voltage Input.
2 −IN Inverting Input.
3 +IN Noninverting Input.
4 −VS Negative Supply.
5 SENSE Sense Terminal.
6 OUT Output.
7 +VS Positive Supply.
8 NC No Connect.
08308-059
NC
1
–INA
2
+INA
3
–VS
4
REFA
14
13
12
11
+INB
510
–INB
6 9
NC
7 8
NC = NO CONNECT
AD8279
TOP VIEW
(Not to Scale)
OUTA
SENSEA
+VS
SENSEB
OUTB
REFB
Figure 6. 14-Lead SOIC Pin Configuration
Table 9. AD8279 Pin Function Descriptions
Pin No. Mnemonic Description
1 NC No Connect.
2 −INA Channel A Inverting Input.
3 +INA Channel A Noninverting Input.
4 −VS Negative Supply.
5 +INB Channel B Noninverting Input.
6 −INB Channel B Inverting Input.
7 NC No Connect.
8 REFB Channel B Reference Voltage Input.
9 OUTB Channel B Output.
10 SENSEB Channel B Sense Terminal.
11 +VS Positive Supply.
12 SENSEA Channel A Sense Terminal.
13 OUTA Channel A Output.
14 REFA Channel A Reference Voltage Input.
AD8278/AD8279
Rev. C | Page 9 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
VS = ±15 V, TA = 25°C, RL = 10 kΩ connected to ground, G = ½ difference amplifier configuration, unless otherwise noted.
600
500
400
300
200
100
0
–150 –100 –50 0 50 100 150
NUMBER OF HITS
SYSTEM OFFSET VOLTAGE (µV)
08308-005
N = 3840
MEAN = –16.8
SD = 41.7673
Figure 7. Distribution of Typical System Offset Voltage, G = 2
800
600
700
500
400
300
200
100
0
–60 –40 –20 0 20 40 60
NUMBER OF HITS
CMRR (µV/V)
08308-006
N = 3837
MEAN = 7.78
SD = 13.569
Figure 8. Distribution of Typical Common-Mode Rejection, G = 2
10
–20
–15
–10
–5
0
5
–50–35–20–5102540557085
CMRR (µV/V)
TEMPERATURE (°C)
08308-007
REPRESENTATIVE DATA
Figure 9. CMRR vs. Temperature, Normalized at 25°C, G = ½
80
–100
–80
–60
–40
–20
0
20
40
60
–50 –35 –20 –5 10 25 40 55 70 85
SYSTEM OFFSET (µV)
TEMPERATURE (°C)
REPRESENTATIVE DATA
08308-008
Figure 10. System Offset vs. Temperature, Normalized at 25°, G = ½
20
–30
–25
–20
–15
–10
–5
0
5
10
15
–50 –35 –20 –5 10 25 40 55 70 85
GAIN ERROR (µV/V)
TEMPERATURE (°C)
REPRESENTATIVE DATA
08308-009
Figure 11. Gain Error vs. Temperature, Normalized at 25°C, G = ½
30
–30
–20
–10
0
10
20
–20 –15 –10 –5 0 5 10 15 20
COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
V
S
= ±15V
V
S
= ±5V
08308-010
Figure 12. Input Common-Mode Voltage vs. Output Voltage,
±15 V and ±5 V Supplies, G = ½
AD8278/AD8279
Rev. C | Page 10 of 24
10
–10
–8
–6
–4
–2
0
2
4
6
8
–0.5 0.5 1.5 2.5 3.5 4.5 5.5
COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
V
S
= 5V
V
REF
= MIDSUPPLY
V
S
= 2.7V
08308-011
Figure 13. Input Common-Mode Voltage vs. Output Voltage,
5 V and 2.7 V Supplies, VREF = Midsupply, G = ½
12
–6
–4
–2
0
2
4
6
8
10
–0.5 0.5 1.5 2.5 3.5 4.5 5.5
COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
V
S
= 5V
V
S
= 2.7V
08308-012
V
REF
= 0V
Figure 14. Input Common-Mode Voltage vs. Output Voltage,
5 V and 2.7 V Supplies, VREF = 0 V, G = ½
30
–30
–20
–10
0
10
20
–20 –15 –10 –5 0 10 20515
COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
V
S
= ±5V
V
S
= ±15V
08308-013
Figure 15. Input Common-Mode Voltage vs. Output Voltage,
±15 V and ±5 V Supplies, G = 2
5
–3
–2
–1
0
1
2
3
4
–0.5 0.5 1.5 2.5 3.5 4.5 5.5
COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
V
S
= 5V
V
S
= 2.7V
08308-014
V
REF
= MIDSUPPLY
Figure 16. Input Common-Mode Voltage vs. Output Voltage,
5 V and 2.7 V Supplies, VREF = Midsupply, G = 2
6
5
–2
–1
0
1
2
3
4
–0.5 0.5 1.5 2.5 3.5 4.5 5.5
COMMON-MODE VOLTAGE (V)
OUTPUT VOLTAGE (V)
V
S
= 5V
V
S
= 2.7V
08308-015
V
REF
= 0V
Figure 17. Input Common-Mode Voltage vs. Output Voltage,
5 V and 2.7 V Supplies, VREF = 0 V, G = 2
18
–36
–30
–24
–18
–12
–6
0
6
12
100 10M1M100k10k1k
GAIN (dB)
FREQUENCY (Hz)
GAIN = 2
GAIN = ½
08308-016
Figure 18. Gain vs. Frequency, ±15 V Supplies
AD8278/AD8279
Rev. C | Page 11 of 24
18
–36
–30
–24
–18
–12
–6
0
6
12
100 10M1M100k10k1k
GAIN (dB)
FREQUENCY (Hz)
GAIN = 2
GAIN = ½
08308-017
Figure 19. Gain vs. Frequency, +2.7 V Single Supply
120
100
80
60
40
20
0
11M100k10k1k10010
CMRR (dB)
FREQUENCY (Hz)
GAIN = 2
GAIN = ½
08308-018
Figure 20. CMRR vs. Frequency
120
100
80
60
40
20
0
11M100k10k1k10010
PSRR (dB)
FREQUENCY (Hz)
–PSRR
+PSRR
08308-019
Figure 21. PSRR vs. Frequency
+
V
S
–0.1
–0.2
–0.3
–0.4
–VS
+0.1
+0.2
+0.3
+0.4
2116141210864
OUTPUT VOLTAGE SWING (V)
REFERRED TO SUPPLY VOLTAGES
SUPPLY VOLTAGE (±VS)
8
TA = –40°C
TA = +25°C
TA = +85°C
TA = +125°C
08308-020
Figure 22. Output Voltage Swing vs. Supply Voltage and Temperature,
RL = 10 kΩ
+
V
S
–0.2
–0.4
–0.6
–0.8
–1.0
–1.2
–VS
+0.2
+0.4
+0.6
+0.8
+1.0
+1.2
OUTPUT VOLTAGE SWING (V)
REFERRED TO SUPPLY VOLTAGES
SUPPLY VOLTAGE (±VS)
TA = –40°C
TA = +25°C
TA = +85°C
TA = +125°C
2116141210864
08308-021
8
Figure 23. Output Voltage Swing vs. Supply Voltage and Temperature,
RL = 2 kΩ
+
V
S
–4
–8
–VS
+4
+8
OUTPUT VOLTAGE SWING (V)
REFERRED TO SUPPLY VOLTAGES
LOAD RESISTANCE ()
1k 100k10k
TA = –40°C
TA = +25°C
TA = +85°C
TA = +125°C
08308-022
Figure 24. Output Voltage Swing vs. RL and Temperature, VS = ±15 V
AD8278/AD8279
Rev. C | Page 12 of 24
+
V
S
–0.5
–1.0
–1.5
–2.0
–V
S
+0.5
+1.0
+1.5
+2.0
OUTPUT VOLTAGE SWING (V)
REFERRED TO SUPPLY VOLTAGES
OUTPUT CURRENT (mA)
01987654321 0
T
A
= –40°C
T
A
= +25°C
T
A
= +85°C
T
A
= +125°C
08308-023
Figure 25. Output Voltage Swing vs. IOUT and Temperature, VS = ±15 V
180
160
170
150
140
130
120
01161412108642
SUPPLY CURRENT (µA)
SUPPLY VOLTAGE (±V)
8
08308-024
Figure 26. Supply Current per Channel vs. Dual-Supply Voltage, VIN = 0 V
180
160
170
150
140
130
120
043530252015105
SUPPLY CURRENT (µA)
SUPPLY VOLTAGE (V)
0
08308-025
Figure 27. Supply Current per Channel vs. Single-Supply Voltage, VIN = 0 V,
VREF = 0 V
250
150
200
100
50
0
–50 –30 –10 10 30 50 70 90 110 130
SUPPLY CURRENT (µA)
TEMPERATURE (°C)
V
S
= ±15V
V
S
= +2.7V
V
REF
= MIDSUPPLY
08308-026
Figure 28. Supply Current per Channel vs. Temperature
30
25
20
15
10
5
0
–5
–10
–15
–20
–50 –30 –10 10 30 50 70 90 110 130
SHORT-CIRCUIT CURRENT (mA)
TEMPERATURE (°C)
I
SHORT+
I
SHORT–
08308-027
Figure 29. Short-Circuit Current per Channel vs. Temperature
2.0
1.6
1.8
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–50 –30 –10 10 30 50 70 90 110 130
SLEW RATE (V/µs)
TEMPERATURE (°C)
–SLEW RATE
+SLEW RATE
08308-028
Figure 30. Slew Rate vs. Temperature, VIN = 20 V p-p, 1 kHz
AD8278/AD8279
Rev. C | Page 13 of 24
08308-029
–10
–8
–6
–4
–2
0
2
4
6
8
10
–5 –4 –3 –2 –1 0 1 2 3 4 5
NONLINEARITY (2ppm/DIV)
OUTPUT VOLTAGE (V)
Figure 31. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = ½
08308-030
–20
–12
–16
–8
–4
0
4
8
12
16
20
–5 –4 –3 –2 –1 0 1 2 3 4 5
NONLINEARITY (2ppm/DIV)
OUTPUT VOLTAG E (V)
Figure 32. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = 2
TIME (µs)
5V/DIV
40µs/DIV
0.002%/DIV
6.24µs TO 0.01%
7.92µs TO 0.001%
0
8308-031
Figure 33. Large Signal Pulse Response and Settling Time, 10 V Step,
VS = ±15 V, G = ½
TIME (µs)
1V/DIV
0.002%/DIV
3.64µs TO 0.01%
4.12µs TO 0.001%
4µs/DIV
0
8308-032
Figure 34. Large Signal Pulse Response and Settling Time, 2 V Step,
VS = 2.7 V, G = ½
TIME (µs)
5V/DIV
0.002%/DIV
7.6µs TO 0.01%
9.68µs TO 0.001%
40µs/DIV
0
8308-033
Figure 35. Large Signal Pulse Response and Settling Time, 10 V Step,
VS = ±15 V, G = 2
TIME (µs)
1V/DIV
0.002%/DIV
4.34µs TO 0.01%
5.12µs TO 0.001%
4µs/DIV
08308-034
Figure 36. Large Signal Pulse Response and Settling Time, 2 V Step,
VS = 2.7 V
AD8278/AD8279
Rev. C | Page 14 of 24
10µs/DIV
2V/DI
V
08308-035
Figure 37. Large Signal Step Response, G = ½
10µs/DIV
5V/DI
V
08308-036
Figure 38. Large Signal Step Response, G = 2
30
25
20
15
10
5
0
100 1M100k10k1k
OUTPUT VOLTAGE (V p-p)
FREQUENCY (Hz)
V
S
= ±15V
V
S
= ±5V
08308-037
Figure 39. Maximum Output Voltage vs. Frequency, VS = ±15 V, ±5 V
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
100 1M100k10k1k
OUTPUT VOLTAGE (V p-p)
FREQUENCY (Hz)
V
S
= 5V
V
S
= 2.7V
08308-038
Figure 40. Maximum Output Voltage vs. Frequency, VS = 5 V, 2.7 V
20mV/DI
V
40µs/DIV
NO LOAD
C
L
= 100pF
C
L
= 147pF
C
L
= 247pF
08308-039
Figure 41. Small Signal Step Response for Various Capacitive Loads, G = ½
20mV/DI
V
40µs/DIV
C
L
= 100pF
C
L
= 200pF
C
L
= 247pF
C
L
= 347pF
08308-040
Figure 42. Small Signal Step Response for Various Capacitive Loads, G = 2
AD8278/AD8279
Rev. C | Page 15 of 24
50
45
40
35
30
25
20
15
10
5
0
02150 20010050
OVERSHOOT (%)
CAPACITIVE LOAD (pF)
50
±2V
±5V
±15V
±18V
08308-041
Figure 43. Small Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = ½
35
30
25
20
15
10
5
0
0350150 250 30020010050
OVERSHOOT (%)
CAPACITIVE LOAD (pF)
±2V
±5V
±15V
±18V
08308-042
Figure 44. Small Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = 2
1k
100
10
0.1 100k10k1k100101
NOISE (nV/ Hz)
FREQUENCY (Hz)
GAIN = 2
GAIN = ½
08308-043
Figure 45. Voltage Noise Density vs. Frequency
1µV/DI
V
1s/DIV
GAIN = 2
GAIN = ½
08308-044
Figure 46. 0.1 Hz to 10 Hz Voltage Noise
08308-060
0
20
40
60
80
100
120
140
160
10 100 1k 10k 100k
FREQUENCY (Hz)
2k LOAD
CHANNEL SEPARATION (dB)
Figure 47. Channel Separation
AD8278/AD8279
Rev. C | Page 16 of 24
THEORY OF OPERATION
CIRCUIT INFORMATION
Each channel of the AD8278 and AD8279 consists of a low power,
low noise op amp and four laser-trimmed on-chip resistors.
These resistors can be externally connected to make a variety
of amplifier configurations, including difference, noninverting,
and inverting configurations. Taking advantage of the integrated
resistors of the AD8278 and AD8279 provides the designer with
several benefits over a discrete design, including smaller size,
lower cost, and better ac and dc performance.
25
3 1
6
7
4
40k20k
40k
–VS
+VS
–IN
+IN
SENSE
OUT
REF
20k
AD8278
08308-045
Figure 48. Functional Block Diagram
DC Performance
Much of the dc performance of op amp circuits depends on the
accuracy of the surrounding resistors. Using superposition to
analyze a typical difference amplifier circuit, as is shown in
Figure 49, the output voltage is found to be
⎟
⎠
⎞
⎜
⎝
⎛
−
⎟
⎠
⎞
⎜
⎝
⎛+
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
=−+ R3
R4
V
R3
R4
R2R1
R2
VV ININ
OUT 1
This equation demonstrates that the gain accuracy and common-
mode rejection ratio of the AD8278 and AD8279 is determined
primarily by the matching of resistor ratios. Even a 0.1%
mismatch in one resistor degrades the CMRR to 69 dB for a
G = 2 difference amplifier.
The difference amplifier output voltage equation can be reduced to
()
−+ −= ININ
OUT VV
R3
R4
V
as long as the following ratio of the resistors is tightly matched:
R3
R4
R1
R2 =
The resistors on the AD8278 and AD8279 are laser trimmed to
match accurately. As a result, the AD8278 and AD8279 provide
superior performance over a discrete solution, enabling better
CMRR, gain accuracy, and gain drift, even over a wide tempera-
ture range.
AC Performance
Component sizes and trace lengths are much smaller in an IC
than on a PCB; therefore, the corresponding parasitic elements
are also smaller. This results in better ac performance of the
AD8278 and AD8279. For example, the positive and negative
input terminals of the AD8278 and AD8279 op amps are
intentionally not pinned out. By not connecting these nodes
to the traces on the PCB, their capacitance remains low and
balanced, resulting in improved loop stability and excellent
common-mode rejection over frequency.
DRIVING THE AD8278 AND AD8279
Care should be taken to drive the AD8278 and AD8279 with a
low impedance source, for example, another amplifier. Source
resistance of even a few kilohms (kΩ) can unbalance the resistor
ratios and, therefore, significantly degrade the gain accuracy and
common-mode rejection of the AD8278 and AD8279. Because all
configurations present several kilohms (kΩ) of input resistance,
the AD8278 and AD8279 do not require a high current drive
from the source and are easy to drive.
INPUT VOLTAGE RANGE
The AD8278 and AD8279 are able to measure input voltages
beyond the supply rails. The internal resistors divide down
the voltage before it reaches the internal op amp and provide
protection to the op amp inputs. Figure 49 shows an example
of how the voltage division works in a difference amplifier
configuration. For the AD8278 and AD8279 to measure correctly,
the input voltages at the input nodes of the internal op amp
must stay below 1.5 V of the positive supply rail and can exceed
the negative supply rail by 0.1 V. Refer to the Power Supplies
section for more details.
08308-062
R4
V
IN+
V
IN–
R3
R1
R2
R2
R1 + R2 (V
IN+
)
R2
R1 + R2 (V
IN+
)
Figure 49. Voltage Division in the Difference Amplifier Configuration
The AD8278 and AD8279 have integrated ESD diodes at the inputs
that provide overvoltage protection. This feature simplifies
system design by eliminating the need for additional external
protection circuitry and enables a more robust system.
The voltages at any of the inputs of the parts can safely range
from +VS − 40 V up to −VS + 40 V. For example, on ±10 V
supplies, input voltages can go as high as ±30 V. Care should be
taken to not exceed the +VS − 40 V to −VS + 40 V input limits
to avoid damaging the parts.
AD8278/AD8279
Rev. C | Page 17 of 24
POWER SUPPLIES
The AD8278 and AD8279 operate extremely well over a very
wide range of supply voltages. They can operate on a single
supply as low as 2 V and as high as 36 V, under appropriate
setup conditions.
For best performance, the user should ensure that the internal
op amp is biased correctly. The internal input terminals of the
op amp must have sufficient voltage headroom to operate
properly. Proper operation of the part requires at least 1.5 V
between the positive supply rail and the op amp input terminals.
This relationship is expressed in the following equation:
V5.1−+<
+S
REF VV
R2R1
R1
For example, when operating on a +VS= 2 V single supply and
VREF = 0 V, it can be seen from Figure 50 that the op amp input
terminals are biased at 0 V, allowing more than the required 1.5 V
headroom. However, if VREF = 1 V under the same conditions, the
input terminals of the op amp are biased at 0.66 V (G = ½). Now
the op amp does not have the required 1.5 V headroom and
cannot function. Therefore, the user must increase the supply
voltage or decrease VREF to restore proper operation.
The AD8278 and AD8279 are typically specified at single and
dual supplies, but they can be used with unbalanced supplies as
well; for example, −VS = −5 V, +VS = +20 V. The difference between
the two supplies must be kept below 36 V. The positive supply
rail must be at least 2 V above the negative supply.
08308-046
R4
R3
R1
R2
R1
R1 + R2 (V
REF
)
R1
R1 + R2 (V
REF
)
V
REF
Figure 50. Ensure Sufficient Voltage Headroom on the Internal Op Amp
Inputs
Use a stable dc voltage to power the AD8278 and AD8279. Noise
on the supply pins can adversely affect performance. Place a
bypass capacitor of 0.1 µF between each supply pin and ground,
as close as possible to each supply pin. Use a tantalum capacitor
of 10 µF between each supply and ground. It can be farther
away from the supply pins and, typically, it can be shared by
other precision integrated circuits.
AD8278/AD8279
Rev. C | Page 18 of 24
APPLICATIONS INFORMATION
CONFIGURATIONS
The AD8278 and AD8279 can be configured in several ways
(see Figure 51 to Figure 57). These configurations have excellent
gain accuracy and gain drift because they rely on the internal
matched resistors. Note that Figure 53 shows the AD8278 and
AD8279 as difference amplifiers with a midsupply reference
voltage at the noninverting input. This allows the AD8278 and
AD8279 to be used as a level shifter, which is appropriate in
single-supply applications that are referenced to midsupply.
Table 10 lists several single-ended amplifier configurations
that are not illustrated.
40k
2
3
5
1
6
20k
40k20k
–IN
OUT
+IN
VOUT = ½ (VIN+ VIN)
08308-047
AD8278
Figure 51. Difference Amplifier, Gain = ½
20k
5
1
2
3
6
40k
20k40k
–IN
OUT
+IN
VOUT = 2(VIN+ VIN)
08308-048
AD8278
Figure 52. Difference Amplifier, Gain = 2
40k
2
3
5
1
V
REF
= MIDSUPPLY
6
20k
40k20k
–IN
OUT
+IN
V
OUT
= ½ (V
IN+
V
IN
) + V
REF
08308-049
AD8278
Figure 53. Difference Amplifier, Gain = ½, Referenced to Midsupply
20k
5
1
2
3
V
REF
= MIDSUPPLY
6
40k
20k40k
–IN
OUT
+IN
V
OUT
= 2 (V
IN+
V
IN
) + V
REF
08308-050
AD8278
Figure 54. Difference Amplifier, Gain = 2, Referenced to Midsupply
40k
2
3
5
1
6
20k
40k
20k
IN
OUT
V
OUT
= –½V
IN
0
8308-051
AD8278
Figure 55. Inverting Amplifier, Gain = −½
40k
25
6
20k
IN
OUT
3
1
40k
20k
V
OUT
= 1.5V
IN
08308-052
AD8278
Figure 56. Noninverting Amplifier, Gain = 1.5
20k2
3
5
1
6
40k
20k40k
OUT
IN
V
OUT
= 2V
IN
0
8308-053
AD8278
Figure 57. Noninverting Amplifier, Gain = 2
Table 10. AD8278 Difference and Single-Ended Amplifier Configurations
Amplifier Configuration Signal Gain Pin 1 (REF) Pin 2 (VIN−) Pin 3 (VIN+) Pin 5 (SENSE)
Difference Amplifier +½ GND IN− IN+ OUT
Difference Amplifier +2 IN+ OUT GND IN−
Single-Ended Inverting Amplifier −½ GND IN GND OUT
Single-Ended Inverting Amplifier −2 GND OUT GND IN
Single-Ended Noninverting Amplifier +3⁄2 IN GND IN OUT
Single-Ended Noninverting Amplifier +3 IN OUT IN GND
Single-Ended Noninverting Amplifier +½ GND GND IN OUT
Single-Ended Noninverting Amplifier +1 IN GND GND OUT
Single-Ended Noninverting Amplifier +1 GND OUT IN GND
Single-Ended Noninverting Amplifier +2 IN OUT GND GND
AD8278/AD8279
Rev. C | Page 19 of 24
The reference must be driven with a low impedance source to
maintain the internal resistor ratio. An example using the low
power, low noise OP1177 as a reference is shown in Figure 58.
INCORRECT
V
CORRECT
AD8278
OP1177
+
–
VREF
AD8278
REF
0
8308-054
Figure 58. Driving the Reference Pin
DIFFERENTIAL OUTPUT
The two difference amplifiers of the AD8279 can be configured
to provide a differential output, as shown in Figure 59. This
differential output configuration is suitable for various applications,
such as strain gage excitation and single-ended-to-differential
conversion. The differential output voltage has a gain twice that
of a single AD8279 channel, as shown in the following equation:
VDIFF_OUT = V+OUT − V−OUT = 2 × GAD8279 × (VIN+ – VIN−)
If the AD8279 amplifiers are each configured for G = ½, the
differential gain is 1×; if the AD8279 amplifiers are each
configured for G = 2, the differential gain is 4×.
08308-061
12 2
14 3
13
11
20k40k
20k
+VS
–IN
+IN
+OUT
40k
AD8279
10 6
8 5
9
4
20k40k
20k
–VS
40k
–OUT
Figure 59. AD8279 Differential Output G = 4 Configuration
INSTRUMENTATION AMPLIFIER
The AD8278 and AD8279 can be used as building blocks for a
low power, low cost instrumentation amplifier. An instrumentation
amplifier provides high impedance inputs and delivers high
common-mode rejection. Combining the AD8278 with an Analog
Devices, Inc., low power amplifier (see Table 11) creates a precise,
power efficient voltage measurement solution suitable for power
critical systems.
R
G
R
F
R
F
–IN
+IN
A1
A2
AD8278/
AD8279
40k
20k
20k
40k
REF
V
OUT
V
OUT
= (1 + 2R
F
/R
G
) (V
IN+
– V
IN–
) × 2
08308-056
Figure 60. Low Power Precision Instrumentation Amplifier
Table 11. Low Power Op Amps
Op Amp (A1, A2) Features
AD8506 Dual micropower op amp
AD8607 Precision dual micropower op amp
AD8617 Low cost CMOS micropower op amp
AD8667 Dual precision CMOS micropower op amp
It is preferable to use dual op amps for the high impedance inputs
because they have better matched performance and track each
other over temperature. The AD8278 and AD8279 difference
amplifiers cancel out common-mode errors from the input op
amps, if they track each other. The differential gain accuracy of
the in-amp is proportional to how well the input feedback
resistors (RF) match each other. The CMRR of the in-amp
increases as the differential gain is increased (1 + 2RF/RG), but a
higher gain also reduces the common-mode voltage range.
Refer to A Designer’s Guide to Instrumentation Amplifiers for
more design ideas and considerations at www.analog.com,
under Technical Documentation.
AD8278/AD8279
Rev. C | Page 20 of 24
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 61. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 62. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
AD8278/AD8279
Rev. C | Page 21 of 24
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AB
060606-A
14 8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COPLANARITY
0.10
8°
0°
45°
Figure 63. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-14)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Branding
AD8278ARZ −40°C to +85°C 8-Lead SOIC_N R-8
AD8278ARZ-R7 −40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8278ARZ-RL −40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8278BRZ −40°C to +85°C 8-Lead SOIC_N R-8
AD8278BRZ-R7 −40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8
AD8278BRZ-RL −40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8
AD8278ARMZ −40°C to +85°C 8-Lead MSOP RM-8 Y21
AD8278ARMZ-R7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 Y21
AD8278ARMZ-RL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 Y21
AD8278BRMZ −40°C to +85°C 8-Lead MSOP RM-8 Y22
AD8278BRMZ-R7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 Y22
AD8278BRMZ-RL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 Y22
AD8279ARZ −40°C to +85°C 14-Lead SOIC_N R-14
AD8279ARZ-R7 −40°C to +85°C 14-Lead SOIC_N, 7" Tape and Reel R-14
AD8279ARZ-RL −40°C to +85°C 14-Lead SOIC_N, 13" Tape and Reel R-14
AD8279BRZ −40°C to +85°C 14-Lead SOIC_N R-14
AD8279BRZ-R7 −40°C to +85°C 14-Lead SOIC_N, 7" Tape and Reel R-14
AD8279BRZ-RL −40°C to +85°C 14-Lead SOIC_N, 13" Tape and Reel R-14
1 Z = RoHS Compliant Part.
AD8278/AD8279
Rev. C | Page 22 of 24
NOTES
AD8278/AD8279
Rev. C | Page 23 of 24
NOTES
AD8278/AD8279
Rev. C | Page 24 of 24
NOTES
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D08308-0-1/11(C)
