19-0496; Rev 3; 1/99 MA AXILM 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset General Description The MAX6316-MAX6322 family of microprocessor (UP) supervisory circuits monitors power supplies and microprocessor activity in digital systems. It offers sev- eral combinations of push/pull, open-drain, and bidirec- tional (such as Motorola 68HC11) reset outputs, along with watchdog and manual-reset features. The Selector Guide below lists the specific functions available from each device. These devices are specifically designed to ignore fast negative transients on Vcc. Resets are guaranteed valid for Vcc down to 1V. These devices are available in 26 factory-trimmed reset threshold voltages (from 2.5V to 5V, in 100mvV incre- ments), featuring four minimum power-on reset timeout periods (from 1ms to 1.12sec), and four watchdog time- out periods (from 6.3ms to 25.6sec). Nine standard ver- sions are available with an order increment requirement of 2500 pieces (see Standard Versions table); contact the factory for availability of other versions, which have an order increment requirement of 10,000 pieces. The MAX6316-MAX6322 are offered in a miniature 5-pin SOT23 package. Applications Portable Computers Computers Controllers Intelligent Instruments Portable/Battery-Powered Equipment Embedded Control Systems Features # Small 5-Pin SOT23 Package @ Available in 26 Reset Threshold Voltages 2.5V to 5V, in 100mV Increments Four Reset Timeout Periods 1ms, 20ms, 140ms, or 1.12sec (min) @ Four Watchdog Timeout Periods 6.3ms, 102ms, 1.6sec, or 25.6sec (typ) @ Four Reset Output Stages Active-High, Push/Pull Active-Low, Push/Pull Active-Low, Open-Drain Active-Low, Bidirectional # Guaranteed Reset Valid to Vcc = 1V # Immune to Short Negative Vcc Transients @ Low Cost @ No External Components Ordering Information PART TEMP. RANGE PIN-PACKAGE MAX6316LUK___-T -40C to +85C 5 SOT23-5 MAX6316MUK____-T -40C to +85C 5 SOT23-5 MAX6317HUK___-T -40C to +85C 5 SOT23-5 MAX6318HUK___-T -40C to +85C 5 SOT23-5 MAX6318MHUK_-T_~s -40C to +85C 5 SOT23-5 Ordering Information continued at end of data sheet. Typical Operating Circuit and Pin Configurations appear at end of data sheet. Selector Guide MANUAL RESET OUTPUTS" WATCHDOG PART INPUT RESET ACTIVE-LOW | ACTIVE-HIGH | ACTIVE-LOW | ACTIVE-LOW INPUT PUSH/PULL PUSH/PULL | BIDIRECTIONAL | OPEN-DRAIN MAX6316L v v v = MAX6316M v v = v _ MAX6317H v v v MAX6318LH v v v MAX6318MH"* v v v MAX6319LH = v v v MAX6319MH"* v v v MAX6320P v v v MAX6321HP v v v MAX6322HP v = v = v * The MAX6318/MAX631 9/MAX632 1/MAX6322 feature two types of reset output on each device. Future productcontact factory for availability. MAXIMA Maxim Integrated Products 1 For free samples & the latest literature: http:/1vwww.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. cCEIXVN-GLEOXVNMAX6316-MAX6322 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset ABSOLUTE MAXIMUM RATINGS Voltage (with respect to GND) NVC ceeceseesssncceceeceececsecsessesaesaeceseeseesesssssesseesaseneeeess -0.3V to +6V RESET (MAX6320/MAX6321/MAX6322 only)...... -0.3V to +6V All Other Pins... cece een nee eee -0.3V to (Vcc + 0.3V) Input/Output Current, All PINS... eee eeeee renee eee 20mA Continuous Power Dissipation (Ta = +70C) SOT23-5 (derate 7.1MW/C above +70C)..... 571mW Operating Temperature Range.... Junction Temperature... Storage Temperature Range............. Lead Temperature (soldering, 10SC)........ ccs eeeee nee +300C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Vcc = 2.5V to 5.5V, Ta = -40C to +85C, unless otherwise noted. Typical values are at Ta = +25C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX | UNITS Operating Voltage Range Vcc TA = -40C to +85C 1 5.5 Vv MAX6316/MAX6317/MAX6318/ | Voc = 5.5V 10 20 MAX6320/MAX6321 : Supply Current Icc MR and WDI unconnected Vec = 3.6V 12 yA MAX6319/MAX6322: Vec = 5.5V 12 MR unconnected Vcc = 3.6V 3 8 Reset Threshold Temperature Coefficient AVTHEC 40 ppm/c Ta = +25C -1.5% Vv 1.5% Reset Threshold (Note 2) Veer LAE* VT Vr VTH+ V TA = -40C to +85C VTH-2.5% VIH VIH+2.5% Reset Threshold Hysteresis 3 mV MAX63__A -T 1 1.4 2 ; ; ; MAX63__B -T 20 28 40 Reset Active Timeout Period tRP ms MAX63__C_-T 140 200 280 MAX63__D _-T 1120 1600 2240 Voc to RESET Delay tRD Vcc falling at 1mV/ps 40 ys PUSH/PULL RESET OUTPUT (MAX6316L/MAX6317H/MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HP) Vcc = 1.0V, ISINK = 50HA 0.3 V Vcc 2 1.2V, ISINK = 100pA 0.3 _ OT Veo = 2.7V, ISINK = 1.2mA 03 RESET Output Voltage Vv Voc 2 4.5V, ISINK = 3.2mA 0.4 V Vcc 2 2.7V, ISOURCE = 500A 0.8 x Voc OH | Veo > 4.5V, ISouRCE = 800pA Voc -1.5 V Voc 2 2.7V, ISINK = 1.2mA 0.3 OT Vee = 4.5V, ISINK = 3.2mA 0.4 RESET Output Voltage Vcc 2 1.8V, ISOURCE = 150pA 0.8 x Voc Vv VOH Voc 2 2.7V, ISOURCE = 500A 0.8 x Voc Vcc = 4.5V, ISOURCE = 800HA Voc -1.5 Note 1: Over-temperature limits are guaranteed by design, not production tested. Note 2: A factory-trimmed voltage divider programs the nominal reset threshold (VTH). Factory-trimmed reset thresholds are available in 100mV increments from 2.5V to 5V (see Table 1 at end of data sheet). MA AXIAA5-Pin uP Supervisory Circuits with Watchdog and Manual Reset ELECTRICAL CHARACTERISTICS (continued) (Vcc = 2.5V to 5.5V, Ta = -40C to +85C, unless otherwise noted. Typical values are at Ta = +25C.) (Note 1) PARAMETER | SYMBOL | CONDITIONS | MIN TYP MAX | UNITS BIDIRECTIONAL RESET OUTPUT (MAX6316M/MAX6318MH/MAX6319MH) Transition Flip-Flop Setup Time ts (Note 3) 400 ns Vcc = 3.0V, CL = 120pF 333 RESET Output Rise Time ta Vcc = 5.0V, CL = 200pF 333 ns (Note 4) Vcc = 3.0V, CL = 250pF 666 Voc = 5.0V, CL = 400pF 666 Active Pull-Up Enable Threshold VPTH Voc = 5.0V 0.4 0.65 Vv RESET Active Pull-Up Current Voc = 5.0V 20 mA RESET Pull-Up Resistance 4.2 4.7 5.2 kQ OPEN-DRAIN RESET OUTPUT (MAX6320P/MAX6321 HP/MAX6322HP) Vcc = 1.0V, ISINK = 50HA 0.3 Vcc 2 1.2V, ISINK = 100pA 0.3 RESET Output Voltage VoL Voc =2.7V, sinc = 1.2mA 03 Vv Voc 2 4.5V, ISINK = 3.2mA 0.4 Open-Drain Reset Output Leakage Current WATCHDOG INPUT (MAX6316/MAX6317H/MAX6318_H/MAX6320P/MAX6321 HP) ILKG 1.0 pA MAX63__ so W-T 4.3 6.3 9.3 ms . MAX63____X-T 71 102 153 Watchdog Timeout Period twbD MAX63____Y-T 1.12 1.6 2.4 sec MAX63____Z-T 17.9 25.6 38.4 WDI Pulse Width two! VIL = 0.3 x Voc, VIH = 0.7 x Voc 50 ns VIL 0.3 x Voc WDI Input Threshold (Note 5) Vv VIH 0.7 x Voc WDI Input Current WDI = Vcc, time average 120 160 IWDI - pA (Note 6) VwDI = 0, time average -20 -15 MANUAL-RESET INPUT (MAX6316_/MAX6317H/MAX6319_H/MAX6320P/MAX6322HP) VIL 0.8 VTH > 4.0V __ VIH 2.0 R Input Threshold Vv VIL 0.3 x Voc VTH < 4.0V VIH 0.7 x Voc MR Input Pulse Width 1 ps MR Glitch Rejection 100 ns MR Pull-Up Resistance 35 52 75 kQ MR to Reset Delay Voc = 5V 230 ns Note 3: This is the minimum time RESET must be held low by an external pull-down source to set the active pull-up flip-flop. Note 4: Measured from RESET VoL to (0.8 x Vcc), RLOAD = =. Note 5: WDI is internally serviced within the watchdog period if WDI is left unconnected. Note 6: The WDI input current is specified as the average input current when the WD! input is driven high or low. The WDI input is designed for a three-stated-output device with a 10HA maximum leakage current and capable of driving a maximum capaci- tive load of 200pF. The three-state device must be able to source and sink at least 200A when active. MA AXIAMA 3 cCEIXVN-GLEOXVNMAX6316-MAX6322 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset Typical Operating Characteristics (Ta = +25C, unless otherwise noted.) MAX6316/17/1 9/20/22 MAX6316/17/18/20/21 Voc FALLING TO RESET PROPAGATION MANUAL- RESET TO RESET SUPPLY CURRENT vs. TEMPERATURE DELAY vs. TEMPERATURE PROPAGATION DELAY vs. TEMPERATURE 10 = 2 320 4 5 Voc FALLING AT 1mV/us z Voc = BV z 9 a Vast- Voc = 100mV 3 300 g 8 = 2 =e 280 z=, & = = i % 260 ima g 6 6 S 240 3S & eS > = & 220 a r 5 200 a 3 E > ig * 480 1 160 0 140 40-20 0 20 40 6 80 100 40-20 0 20 40 6 80 100 40-20 0 2 40 80 80 100 TEMPERATURE (C) TEMPERATURE (C) TEMPERATURE (C) MAX6316/17/18/20/21 NORMALIZED RESET TIMEOUT NORMALIZED WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE PERIOD vs. TEMPERATURE 1.05 r 3 1.05 g Q 1.04 g me 1.04 g E 1.03 > = 1.03 > 5 & 3B 1.02 3 1.02 2 1.01 gg 1.01 Hi 4.00 = 1.00 a 0.99 = 0.99 = 0.98 g 0.98 5 097 : 097 0.96 SD 096 0.95 0.95 40 -20 0 20 40 60 80 100 40-20 0 20 40 6 80 100 TEMPERATURE (C) TEMPERATURE (C) MAX6316M/6318MH/6319MH MAXIMUM Vcc TRANSIENT DURATION BIDIRECTIONAL vs. RESET THRESHOLD OVERDRIVE PULL-UP CHARACTERISTICS 80 MAX6316toc0O RESET OCCURS ABOVELINES ev PASSIVE 70 74HC05 = 47k 4.7kQ. _ =3.3V PULL-UP 2 8 npur Ore avidiv = L 2 5 Vast = 4.63V RESET, ACTIVE g PULL-UP E 40 Vest =2,63V 2Vidiv Be 30 = Eo RESET INPUT 10 BVIdiv 0 10 100 1000 200ns/div RESET THRESHOLD OVERDRIVE (mV) Vast - Vcc 4 MAXUM5-Pin uP Supervisory Circuits with Watchdog and Manual Reset Pin Description PIN MAX6316L MAX6316M MAX6320P MAX6317H MAX6318LH MAX6318MH MAX6321HP MAX6319LH MAX6319MH MAX6322HP NAME FUNCTION MAX631 6L/MAX631 8LH/MAX6319LH: Active-Low, Reset Output. CMOS push/pull output (sources and sinks current). MAX631 6M/MAX6318MH/MAX6319MH: Bidirectional, Active-Low, Reset Output. Intended to interface directly to microprocessors with bidirectional resets such as the Motorola 68HC11. MAX6320P/MAX6321 HP/MAX6322HP: Open-Drain, Active-Low, Reset Output. NMOS out- put (sinks current only). Connect a pull-up resistor from RESET to any supply voltage up to 6V. RESET Active-High, Reset Output. CMOS push/pull output (sources and sinks current). Inverse of RESET. GND Ground Active-Low, Manual Reset Input. Pull low to force a reset. Reset remains asserted for the duration of the Reset Timeout Period after MR transitions from low to high. Leave unconnected or connected to Vcc if not used. WDI Watchdog Input. Triggers a reset if it remains either high or low for the duration of the watchdog timeout period. The internal watchdog timer clears whenever a reset asserts or whenever WDI sees a rising or falling edge. To disable the watchdog fea- ture, leave WDI unconnected or three-state the dri- ver connected to WDI. Voc Supply Voltage. Reset is asserted when Vcc drops below the Reset Threshold Voltage (Vast). Reset remains asserted until Vcc rises above VRsT and for the duration of the Reset Timeout Period (tap) once Vcc rises above Vast. MA AXIAMA cCEIXVN-GLEOXVNMAX6316-MAX6322 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset Veo MAXIM MAX6316-MAX6322 RESET (ALL EXCEPT MAX8317) GENERATOR RESET ry (ALL EXCEPT MAX631 6/MAX6320P) am e (ALL EXCEPT MAX631 8/MAX6321) WATCHDOG WO TRANSITION wa (ALL EXCEPT DETECTOR MAX6319/MAX6322) 52k tL GND Figure 1. Functional Diagram Detailed Description A microprocessors (uP) reset input starts or restarts the UP in a known state. The reset output of the MAX6316 MAX6322 UP supervisory circuits interfaces with the reset input of the pP, preventing code-execution errors during power-up, power-down, and brownout condi- tions (see the Typical Operating Circuit). The MAX6316/ MAX631 7/MAX631 8/MAX6320/MAX6321 are also capa- ble of asserting a reset should the pP become stuck in an infinite loop. Reset Output The MAX6316L/MAX6318LH/MAX6319LH feature an active-low reset output, while the MAX6317H/ MAX6318_H/MAX6319_H/MAX6321 HP/MAX6322HP feature an active-high reset output. RESET is guaran- teed to be a logic low and RESET is guaranteed to be a logic high for Vcc down to 1V. The MAX6316-MAX6322 assert reset when Vcc is below the reset threshold (VRsT), when MR is pulled low (MAX6316_/MAX6317H/MAX6319_H/MAX6320P/ MAX6322HP only), or if the WDI pin is not serviced within 6 the watchdog timeout period (twp). Reset remains assert- ed for the specified reset active timeout period (tRP) after Vcc rises above the reset threshold, after MR transitions low to high, or after the watchdog timer asserts the reset (MAX6316_/MAX6317H/MAX6318_H/MAX6320P/ MAX6321HP). After the reset active timeout period (tRP) expires, the reset output deasserts, and the watchdog timer restarts from zero (Figure 2). Voc w fj, Yar Vest! Nv GND == -4--------=---------- L--== I l RESET rt trp 1 tp Figure 2. Reset Timing Diagram MAXUM5-Pin uP Supervisory Circuits with Watchdog and Manual Reset Bidirectional RESET Output The MAX6316M/MAX631 8MH/MAX6319MH are designed to interface with pPs that have bidirectional reset pins, such as the Motorola 68HC11. Like an open-drain output, these devices allow the pP or other devices to pull the bidirectional reset (RESET) low and assert a reset condi- tion. However, unlike a standard open-drain output, it includes the commonly specified 4.7kQ pull-up resistor with a P-channel active pull-up in parallel. This configuration allows the MAX6316M/MAX631 8MH/ MAX6319MH to solve a problem associated with pPs that have bidirectional reset pins in systems where sev- eral devices connect to RESET (Figure 3). These Ps can often determine if a reset was asserted by an exter- nal device (i.e., the supervisor IC) or by the pP itself (due to a watchdog fault, clock error, or other source), and then jump to a vector appropriate for the source of the reset. However, if the pP does assert reset, it does not retain the information, but must determine the cause after the reset has occurred. The following procedure describes how this is done in the Motorola 68HC11. In all cases of reset, the PP pulls RESET low for about four external-clock cycles. It then releases RESET, waits for two external-clock cycles, then checks RESETs state. If RESET is still low, the pP concludes that the source of the reset was external and, when RESET eventually reaches the high state, it jumps to the normal reset vector. In this case, stored- state information is erased and processing begins from scratch. lf, on the other hand, RESET is high after a delay of two external-clock cycles, the processor knows that it caused the reset itself and can jump to a different vector and use stored-state information to determine what caused the reset. A problem occurs with faster pPs; two external-clock cycles are only 500ns at 4MHz. When there are several devices on the reset line, and only a passive pull-up resis- tor is used, the input capacitance and stray capacitance can prevent RESET from reaching the logic high state (0.8 x Vcc) in the time allowed. If this happens, all resets will be interpreted as external. The yP output stage is guaran- teed to sink 1.6mA, so the rise time can not be reduced considerably by decreasing the 4.7kQ internal pull-up resistance. See Bidirectional Pull-Up Characteristics in the Typical Operating Characteristics. The MAX6316M/MAX6318MH/MAX6319MH overcome this problem with an active pull-up FET in parallel with the 4.7kQ_ resistor (Figures 4 and 5). The pull-up transistor holds RESET high until the uP reset I/O or the supervisory circuit itself forces the line low. Once RESET goes below VPTH, a comparator sets the transition edge flip-flop, indi- cating that the next transition for RESET will be low to high. When RESET is released, the 4.7kQ resistor pulls RESET up toward Vcc. Once RESET rises above VPTH but is below (0.85 x Vcc), the active P-channel pull-up turns on. Once RESET rises above (0.85 x Vcc) or the 2us one-shot times out, the active pull-up turns off. The parallel combination of the 4.7kQ pull-up and the Voc q Voc L | WoDI* 47k 68HC11 Re RESET 7 CIRCUITRY FESET RESET] e RESET RESED** if i LT CIRCUITRY LL Cin Cin CgtRay T | MAAXIAA n a | _ MAX6316M _ _ = MAX6318MH =e MAX6319MH Tf Cin OTHER DEVICES * MAX6316M/MAX6318MH Lo ** MAX6316M/MAX6319MH = *** ACTIVE-HIGH PUSH/PULL MAX6318MH/MAX6319M H Figure 3. MAX6316M/MAX63 18MH/MAX6319MH Supports Additional Devices on the Reset Bus MA AXIAMA cCEIXVN-GLEOXVNMAX6316-MAX6322 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset Voc | MAXUM! MAX6316M TRIMMED MAX6318MH RESISTORS + MAX6319MH Voc VREF 52k RESET MR (MAX6316M/ GENERATOR MAX6319MH) PL WATCHDOG ON (MAX6316M/ CIRCUITRY ww, NAX8818MH) Voc 2us ONE SHOT TRANSITION H FLIP-FLOP A Q 47k FF 8 RESET ACTIVE PULL-UP ENABLE COMPARATOR GND + Figure 4. MAX6316/MAX6318MH/MAX6319MH Bidirectional Reset Output Functional Diagram MAXUM5-Pin uP Supervisory Circuits with Watchdog and Manual Reset P-channel transistor on-resistance quickly charges stray capacitance on the reset line, allowing RESET to transition from low to high within the required two elec- tronic-clock cycles, even with several devices on the reset line. This process occurs regardless of whether the reset was caused by Vcc dipping below the reset threshold, the watchdog timing out, MR being asserted, or the uP or other device asserting RESET. The parts do not require an external pull-up. To minimize supply cur- rent consumption, the internal 4.7kQ pull-up resistor disconnects from the supply whenever the MAX6316M/ MAX6318MH/MAX6319MH assert reset. Open-Drain RESET Output The MAX6320P/MAX6321 HP/MAX6322HP have an active-low, open-drain reset output. This output struc- ture will sink current when RESET is asserted. Connect a pull-up resistor from RESET to any supply voltage up to 6V (Figure 6). Select a resistor value large enough to RESET PULLED LOW ACTIVE BY pC OR PULL-UP RESET GENERATOR TURNS ON Figure 5. Bidirectional RESET Timing Diagram 43.3V +5.0V _ Voc T MR 10k ] wol** RESET RESET*** 5V SYSTEM MAXIM MAX6320 MAX6321 MAX6322 GND * MAX6320/MAX6322 ** MAX6320/MAX6321 = *** MAX6321/MAX6322 Figure 6. MAX6320P/MAX6321HP/MAX6322HP Open-Drain RESET Output Allows Use with Multiple Supplies MA AXIAMA register a logic low (see Electrical Characteristics), and small enough to register a logic high while supplying all input current and leakage paths connected to the RESET line. A 10kQ pull-up is sufficient in most applications. Manual-Reset Input The MAX6316_/MAX6317H/MAX6319_H/MAX6320P/ MAX6322HP feature a manual-reset input. A logic low on MR asserts a reset. After MR transitions low to high, reset remains asserted for the duration of the reset timeout peri- od (tRP). The MR input is connected to Vcc through an internal 52k pull-up resistor and therefore can be left unconnected when not in use. MR can be driven with TTL-logic levels in 5V systems, with CMOS-logic levels in 3V systems, or with open-drain or open-collector output devices. A normally-open momentary switch from MR to ground can also be used; it requires no external debouncing circuitry. MR is designed to reject fast, negative-going transients (typically 100ns pulses). A 0.1pF capacitor from MR to ground provides additional noise immunity. The MR input pin is equipped with internal ESD-protection circuitry that may become forward biased. Should MR be driven by voltages higher than Vcc, excessive current would be drawn, which would damage the part. For example, assume that MR is driven by a +5V supply other than Voc. If Vcc drops lower than +4.7V, MRs absolute maximum rating is violated [-0.3V to (Vcc + 0.3V)], and undesirable current flows through the ESD structure from MR to Vcc. To avoid this, use the same supply for MR as the supply monitored by Vcc. This guarantees that the voltage at MR will never exceed Vcc. Watchdog Input The MAX6316_/MAX6317H/MAX6318_H/MAX6320P/ MAX6321HP feature a watchdog circuit that monitors the pPs activity. If the uP does not toggle the watchdog input (WDI) within the watchdog timeout period (twp), reset asserts. The internal watchdog timer is cleared by reset or by a transition at WDI (which can detect pulses as short as 50ns). The watchdog timer remains cleared while reset is asserted. Once reset is released, the timer begins counting again (Figure 7). The WDI input is designed for a three-stated output device with a 10HA maximum leakage current and the capability of driving a maximum capacitive load of 200pF. The three-state device must be able to source and sink at least 200A when active. Disable the watchdog function by leaving WDI unconnected or by three-stating the driver connected to WDI. When the watchdog timer is left open circuited, the timer is cleared internally at intervals equal to 7/8 of the watchdog period. cCEIXVN-GLEOXVNMAX6316-MAX6322 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset MAXIMA MAX6316/MAX6317 MAX6318/MAX6320 MAX6321 MAXLAA MAX6316 MAX6318 MAX6319 Voc oO GND RESET _ 100k Figure 7. Watchdog Timing Relationship Applications Information Watchdog Input Current The WDI input is internally driven through a buffer and series resistor from the watchdog counter. For minimum watchdog input current (minimum overall power con- sumption), leave WDI low for the majority of the watch- dog timeout period. When high, WDI can draw as much as 160A. Pulsing WDI high at a low duty cycle will reduce the effect of the large inout current. When WDI is left unconnected, the watchdog timer is serviced within the watchdog timeout period by a low-high-low pulse from the counter chain. Negative-Going Vcc Transients These supervisors are immune to short-duration, nega- tive-going Vcc transients (glitches), which usually do not require the entire system to shut down. Typically, 200ns large-amplitude pulses (from ground to Vcc) on the supply will not cause a reset. Lower amplitude puls- es result in greater immunity. Typically, a Vcc transient that goes 100mV under the reset threshold and lasts less than 4s will not trigger a reset. An optional 0.1pF bypass capacitor mounted close to Vcc provides addi- tional transient immunity. Ensuring Valid Reset Outputs Down to Vcc = 0 The MAX6316_/MAX6317H/MAX6318_H/MAX6319_H/ MAX6321HP/MAX6322HP are guaranteed to operate properly down to Vcc = 1V. In applications that require valid reset levels down to Vcc = 0, a pull-down resistor to active-low outputs (push/pull and bidirectional only, Figure 8) and a pull-up resistor to active-high outputs (push/pull only, Figure 9) will ensure that the reset line is valid while the reset output can no longer sink or 10 Figure 8. Ensuring RESET Valid to Vcc = 0 on Active-Low Push/Pull and Bidirectional Outputs MAXIM MAX6317 MAX6318 MAX6319 MAX6321* 400k MAX6322" Vico Lf GND RESET *THIS SCHEMATIC DOES NOT WORK ON THE OPEN- DRAIN OUTPUTS OF THE MAX6321/MAX6322. Figure 9. Ensuring RESET Valid to Vcc = 0 on Active-High Push/Pull Outputs source current. This scheme does not work with the open-drain outputs of the MAX6320/MAX6321/MAX6322. The resistor value used is not critical, but it must be large enough not to load the reset output when Vcc is above the reset threshold. For most applications, 100kQ is adequate. Watchdog Software Considerations (MAX6316/MAX631 7/MAX631 8/ MAX6320/MAX6321) One way to help the watchdog timer monitor software execution more closely is to set and reset the watchdog input at different points in the program, rather than pulsing the watchdog input high-low-high or low-high- low. This technique avoids a stuck loop, in which the watchdog timer would continue to be reset inside the loop, keeping the watchdog from timing out. MAXUM5-Pin uP Supervisory Circuits with Watchdog and Manual Reset Figure 10 shows an example of a flow diagram where the I/O driving the watchdog input is set high at the beginning of the program, set low at the end of every subroutine or loop, then set high again when the pro- gram returns to the beginning. If the program should hang in any subroutine, the problem would be quickly corrected, since the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued. As described in the Watchdog Input Current section, this scheme results in higher time average WDI current than does leaving WD! low for the majority of the timeout period and periodically pulsing it low-high-low. Pin Configurations START SET WDI HIGH PROGRAM CODE POSSIBLE INFINITE LOOP PATH Figure 10. Watchdog Flow Diagram Typical Operating Circuit TOP VIEW rsa [1 5 |Vec reser [1 | 5] Veo MNAAXILAA MAXUM MAX6316 MAX6317 GND | 2 MAX6320 GND | 2 MR[3 4 | wor SOT23-5 wr [3 | 4 | wor SOT23-5 5 | Voc RESET | 4 MAXLAA MA AXIS MAX6318 MAX6319 enn [2] MAx321 eno [2] maxes22 f4|wor reser [3 | SOT23-5 SOT23-5 1 Veo __ ve RESET RESET MAXIM MAX6316 uP MANUAL | MR eND Wo! VO eND RESET MA AXIAMA 11 cCEIXVN-GLEOXVNMAX6316-MAX6322 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset Table 1. Factory-Trimmed Reset Thresholds Ta = +25C Ta = -40C to +85C PART MIN TYP MAX MIN MAX MAX63___50__-T 4.925 5.000 5.075 4.875 5.125 MAX63__ 49 _-T 7.827 4.900 4.974 4.778 5.023 MAX63__ 48 -T 4.728 4.800 4.872 4.680 4.920 MAX63__47__-T 4.630 4.700 4.771 4.583 4.818 MAX63__ 46 _-T 4.561 4.630 4.699 4.514 4.746 MAX63_ 45 -T 4.433 4.500 4.568 4.388 4.613 MAX63_ 44 _-T 4.314 4.390 4.446 4.270 4.490 MAX63__ 43 -T 4.236 4.300 4.365 4.193 4.408 MAX63_ 42 -T 4.137 4.200 4.263 4.095 4.305 MAX63__41__-T 4.039 4.100 4.162 3.998 4.203 MAX63__ 40 -T 3.940 4.000 4.060 3.900 4.100 MAX63__-39_-T 3.842 3.900 3.959 3.803 3.998 MAX63__ 38 _-T 3.743 3.800 3.857 3.705 3.895 MAX63__ 37__-T 3.645 3.700 3.756 3.608 3.793 MAX63__-36_-T 3.546 3.600 3.654 3.510 3.690 MAX63__ -35_-T 3.448 3.500 3.553 3.413 3.588 MAX63__-34_-T 3.349 3.400 3.451 3.315 3.485 MAX63__ 33 -T 3.251 3.300 3.350 3.218 3.383 MAX63__-32_-T 3.152 3.200 3.248 3.120 3.280 MAX63__ -31__-T 3.034 3.080 3.126 3.003 3.157 MAX63__ 30. _-T 2.955 3.000 3.045 2.925 3.075 MAX63_ 29 -T 2.886 2.930 2.974 2.857 3.000 MAX63_-28-T 2.758 2.800 2.842 2.730 2.870 MAX63_27_-T 2.660 2.700 2.741 2.633 2.768 MAX63_-26_-T 2.591 2.630 2.669 2.564 2.696 MAX63_ -25_-T 2.463 2.500 2.538 2.438 2.563 Table 2. Standard Versions RESET MINIMUM RESET TYPICAL SOT PART THRESHOLD TIMEOUT WATCHDOG TOP MARK (V) (ms) TIMEOUTS (sec) MAX631 6BLUK46CY-T 4.63 140 1.6 ACDD MAX631 6BLUK29CY-T 2.93 140 1.6 ACDE MAX631 6BMUK46CY-T 4.63 140 1.6 ACDF MAX631 6MUK29CY-T 2.93 140 1.6 ACDG MAX631 7HUK46CY-T 4.63 140 1.6 ACDQ MAX631 8LHUK46CY-T 4.63 140 1.6 ACDH MAX631 9LHUK46C-T* 4.63 140 _ ACDK MAX6320PUK46CY-T 4.63 140 1.6 ACDN MAX6320PUK29CY-T 2.93 140 1.6 ACDO Note: Nine standard versions are available, with a required order increment of 2500 pieces. Sample stock is generally held on standard versions only. The required order increment for nonstandard versions is 10,000 pieces. Contact factory for availability. +Contact factory for availability of these versions. 12 MAXUM5-Pin uP Supervisory Circuits with Watchdog and Manual Reset Table 3. Reset/Watchdog Timeout Periods _ Ordering Information (continued) RESET TIMEOUT PERIODS PART TEMP. RANGE PIN-PACKAGE SUFFIX MIN TYP MAX UNITS MAX6319LHUK_-T)= -40C to +85C 3= 5 SOT23-5 A 1 16 > MAX6319MHUK -T -40C to+85C 3 =65 SOT23-5 MAX6320PUK -T -40C to+85C = 5 SOT23-5 B 20 30 40 ms MAX6321HPUK__-T -40C to 485C 5 SOT23-5 C 140 200 280 MAX6322HPUK___-T_~-40C to+85C = 5 SOT23-5 D 1.12 1.60 2.24 sec Note: These devices are available with factory-set Vcc reset WATCHDOG TIMEOUT thresholds from 2.5V to SV, in 0.1V increments. Insert the desired nominal reset threshold (25 to 50, from Table 1) into the Ww 4.3 6.3 9.3 ms blanks following the letters UK. All devices offer factory-pro- x 71 102 153 grammed reset timeout periods. Insert the letter corresponding to the desired reset timeout period (A, B, C, or D from Table 3) Y 1.12 16 2.4 sec into the blank following the reset threshold suffix. Parts that offer Z 17.9 25.6 38.4 a watchdog feature (see Selector Guide) are factory-trimmed to one of four watchdog timeout periods. Insert the letter corre- Chip Information TRANSISTOR COUNT: 191 SUBSTRATE IS INTERNALLY CONNECTED TO V+ MA AXIAMA sponding to the desired watchdog timeout period (W, X, Y, or Z from Table 3) into the blank following the reset timeout suffix. 13 cCEIXVN-GLEOXVNMAX6316-MAX6322 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset Package Information Ut aid 0.20 rr DATUM A 50 0.35 J : C NOTE: 1. ALL DIMENSIONS ARE IN MILLIMETERS. /e FOOT LENGTH MEASURED AT INTERCEPT POINT BETWEEN DATUM A & LEAD SURFACE. 3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR. 4, PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING. SOTSL.EPS L735 0.55 1.90 REF 10 PROPRIETARY NFORMATION MA AAILS/VI TITLE: PACKAGE OUTLINE, SOT23, SL APPROVAL DOCUMENT CONTROL NO. REV 1 21-0057 B A 14 MAXUMMA AXIAMA 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset NOTES 15 cCEIXVN-GLEOXVNMAX6316-MAX6322 5-Pin uP Supervisory Circuits with Watchdog and Manual Reset NOTES Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 1999 Maxim Integrated Products Printed USA MAXIMA is a registered trademark of Maxim Integrated Products.