TOSHIBA TC9268F/P TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC9268F, TC9268P =-A MODULATION SYSTEM DA CONVERTER WITH BUILT-IN 8 TIMES OVER SAMPLING DIGITAL FILTER TC9268F, TC9268P are 2nd order =-A modulation system 1bit DA converter incorporating an 8-times over sampling digital filter developed for digital audio equipment. Because the IC is small package (SOP20, DIP20) and includes the de-emphasis filter, it is possible to constitute reducing the size and cost of the DA converter. FEATURES Built-in 8-times over sampling digital filter. @ Low voltage operate (3.3 V). Built-in digital de-emphasis filter. @ Over sampling ratio (OSR) is 192 fs. Sampling frequency (fs) : 44.1 kHz @ Support double speed operation. @ Characteristics of the digital filter and DA converter are as follows : TC9268F SOP20-P-300-1.27 TC9268P DIP20-P-300-2.54A Weight SOP20-P-300-1.27 : 0.48g (Typ.) DIP20-P-300-2.54A: 1.4g (Typ.) Digital filter DIGITAL PASS-BAND TRANSIENT STOP-BAND FILTER RIPPLE BAND WIDTH _| SUPPRESSION Standard operation 8 fs +0.11dB 20 k~24.1 kHz -26dB Double speed operation 8 fs +0.11dB 20 k~24.1 kHz -26dB DA converter (Vpp = 5 V) NOISE OSR DISTORTION S/N RATIO Standard operation 192 fs -90dB (Typ.) | 98dB (Typ.) Double speed operation 96 fs -85dB (Typ.) | 95 dB (Typ.) 2001-06-19TOSHIBA TC9268F/P PIN CONNECTION BLOCK DIAGRAM LRCK BCK DATA FS EMP MCK Vpx ~~ XO xl GNDX LRCK QQ @ @ @M @ @ @ @ @) @ BCK oy j | ft j | DATA INTERFACE DIGITAL FILTER CIRCUIT OSCILLATOR CIRCUIT HS CIRCUIT DE-EMPHASIS FILTER CIRCUIT EMP MCK | i i VDx ) 2-4 MODULATION CIRCUIT TIMING GENERATOR xO OUTPUT OUTPUT CIRCUIT CIRCUIT Xl Ww ae ew Ge uw ee) 1 2 3 4 5 6 7 8 9 1 GNDX TEST <TOP VIEW> CIRCUIT Vop Tl GNDA RO RO VpA LO LO GNDA GNDD PIN FUNCTION No. | SYMBOL | 1/0 FUNCTION & OPERATION REMARKS 1 Vpb | Digital power supply pin 2 T1 | |Test pin. Normally, use at L". 3 GNDA |Analog GND pin 4 RO O |Right channel data forward output pin. 5 RO O |Right channel data reversed output pin. 6 VDA |Analog power supply pin 7 | LO O | Left channel data reverse output pin. 8 LO O | Left channel data forward output pin. 9 GNDA |Analog GND pin 10 GNDD | Digital GND pin. 11 GNDX [Crystal oscillator GND pin. 12 XI | |Crystal oscillator connection pin. Connect to a crystal oscillator, generates needed for the eq 13 xO O system. (384 fs) xl xO 14 Vpx | Oscillator power supply pin. 15 MCK O |System clock output pin. (384 fs) 16 EMP De-emphasis filter ON/OFF switching pin. ON at H and OFF at L. = Standard /double speed operation mode switching pin. 17 HS | . . Standard operation at H, double speed operation at L. 18 DATA | Audio data input pin. 19 BCK | Bit clock input pin. 20 LRCK | LR clock input pin. 2 2001-06-19TOSHIBA TC9268F/P DESCRIPTION OF BLOCK OPERATION 1. Crystal oscillation circuit and timing generator The clock required for internal operations is generated by connecting a crystal and condensers as shown in the diagram below. The IC will also operate when a system clock is input from an external source through the XI pin (pin 12). However, in this situation, due consideration must be given to the fact that waveform characteristics, such as jitter and rising/ falling characteristics of the system clock, significantly affect the DA converters noise distortion and the S/N ratio. To internal circuit 6 bts A SY VY GNDX xO Vpx = MCK ] D+ 16.9344 mz of Xtal Ta CL = 10~33 pF Use a crystal with a low Cl value and favorable start-up characteristics. Fig. 1 Configuration of Crystal Oscillation Circuit The timing generator generates the clocks and process timing signals required for such functions as digital filtering and de-emphasis filtering. 2. Data input circuit DATA and the LRCK are loaded to the LSI internal shift registers on the BCK signal rising edge. It is consequently necessary for the DATA and LRCK signals to be synchronized and input on the BCK signal falling edge as indicated in the timing example below. BCK is available only 48 fs. Also, as DATA has been designed so that the 16 bits before the change point of LRCK are regarded as valid data, the data must be input with Right-justified mode. L-ch R-ch LRcK | | | [ BCK _: : : UT oar FEEL EE betes PPE EPL tele PEE Pen) MSB LSB MSB LSB * : Not effective Fig.2 Example of input timing chart 3 2001-06-19TOSHIBA TC9268F/P 3. Digital filter The 8-times oversampling IIR digital filter eliminates the noise returned from outside the bandwidth during standard and double speed operations. Table-1 Characteristics of the digital filter PASS-BAND | TRANSIENT RIPPLE BANDWIDTH | ATTENUATION Standard operation +0.11dB 20.0 k~24.1 kHz | -26dB or less Double speed operation +0.11dB 20.0 k~24.1 kHz} -26dB or less The characteristics of the digital filter frequencies are shown below. (Double speed operation is same) -20 -30 -40 - 50! GAIN (dB) GAIN (dB) - 60 -70 - 80 -90 ~ 100 44.1 88.2 132.3 176.4 ~ 0 2.0 40 6.0 8.0 10.012.0 14.0 16.018.0 20.022.024.0 FREQUENCY (kHz) FREQUENCY (kHz) 4. De-emphasis filter The built-in IIR type digital de-emphasis filter circuit is available for fs = 44.1 kHz. ON/OFF is controlled with the EMP pin. Table-2. De-emphasis Filter Settings EMP PIN H L De-emphasis Filter ON OFF The digitalization of the de-emphasis filter eliminates the need for such external components as resistors, condensers and analog switches. In addition to this, the coefficients are aligned to reduce error in the de-emphasis filter characteristics. The filter structure and characteristics are shown below. Input data IG Ge} (bp + byZ-") 1 1 Transfer function : H (Z) = one mm 1/72 (1 - a4Z-') Ty = 50 ys, T2 = 15s Fig.4 IIR Digital De-emphasis Filter Fig.5 Filter Characteristics 4 2001-06-19TOSHIBA TC9268F/P 5. DA conversion circuit The IC incorporates a 2'nd order =-A modulation DA converter for two channels (simultaneous output type). The internal structure of this is shown in Fig.6. Tr Y (Zz Q (2) Output data (Bit-stream 1-bit DA conversion data) 2'nd order =-A converter : Y(Z) = X(Z) + (1-Z-'Q(Z) Fig.6 =-A modulation DA converter The =-A modulation clock has been designed to operate at 192 fs (when 384 fs). The noise shaping characteristics are shown in Fig.7. 10 dB NOISE POWER (dB) L L L i L 1 1 | 0 500k 1M FREQUENCY (Hz) Fig.7 Noise shaping characteristic 6. Data output circuit In this circuits, output data waveform is shaped and forward and reverse signals of bit stream data are output to the outside through a buffer. By differentiating these forward signal and the reverse signal in the external analog circuit, DA conversion output of low distortion and high S/N ratio can be obtained. Bit stream 1 bit DA conversion data D Q Q A register CK (XI /2) O Analog output Fig.8 Construction of data output circuit 5 2001-06-19TOSHIBA TC9268F/P MAXIMUM RATINGS (Ta = 25C) CHARACTERISTIC SYMBOL RATING UNIT Vpp -0.3~6.0 Supply Voltage VDA -0.3~6.0 Vv Vpx -0.3~6.0 Input Voltage Vin -0.3~Vpp + 0.3 Vv TC9268F 200 P Dissipati P mW ower Dissipation 7C9268P D 300 Operating Temperature Topr -35~85 C Storage Temperature Tstg -55~150 C ELECTRICAL CHARACTERISTICS (Unless otherwise specified, Ta = 25C, Vpp = Vpx = Vpa = 5 V) DC CHARACTERISTICS TEST CHARACTERISTIC SYMBOL | CIR- TEST CONDITION MIN TYP. MAX UNIT CUIT 0 tina S Vpp 4.5 5.0 5.5 perating 2upPly Vox | |Ta = -35~85C 45 50; 55 |v Voltage (1) VDA 4.5 5.0 5.5 . Vpp Ta = 15~55C 3.3 3.5 5.5 Votan Dy Pe Vox | peration frequency) 3.3 35! 55 | Vv g VDA fopr = 16.9 MHz 3.3 35[ 5.5 Power Dissipation IDD |Xl = 16.9MHz 12 20 mA H" Level VIH Vpp x 0.7, VpbbD Vv Input Voltage Fra evel VIL 0 | |Vpp x03 H" Level lH Input Current 7. Level IL _ - 10 10 LA AC CHARACTERISTICS (Over sampling ratio = 192 fs) TEST CHARACTERISTIC SYMBOL | CIR- TEST CONDITION MIN TYP. MAX | UNIT CUIT Table Harmonic 1kHz Sine wave, full-scale input . . . - - B Distortion + Noise 1 THD + N11 Vpp = Vpx = Vpa=5V 90 80 d Table Harmonic 1kHz Sine wave, full-scale input : . . - - dB Distortion + Noise 2 THD + Na) 1 Vpp = Vpx = Vpa = 3.5V 86 78 S/N Ratio S/N 1 90 98) dB . 1kHz Sine wave, Dynamic Range DR 1 60 dB input conversion 90 95; dB Cross-talk CT 1 |1kHz Sine wave, full-scale input -95} -90 | dB Operating Frequency fopr |Vpp = Vpa = Vox = 4.5V | 16.9344; | MHz Input F n fLR LRCK duty cycle = 50% 44.1) kHz pur Frequency fack. | |BCK duty cycle = 50% | 2.1168) | MHz Rise Time tr D _ _ 15 Fall Time ty |LRCK, BCK (10~90%) = 15 ns Delay Time td |BCK LEdge -LRCK, DATA _ 40 | ns 6 2001-06-19TOSHIBA TC9268F/P @ TEST CIRCUIT-1 : With the use of application circuit example-2 DATA LOUT 20kHz * DISTORTION $G BCK APPLICATION CIRCUIT FACTOR LRCK EXAMPLE-2 ROUT IDEAL LPF |_| GAUGE MCK SG : ANRITSU MG-22A or equivalent LPF : SHIBASOKU 725C internal filter DISTORTION FACTOR GAUGE : SHIBASOKU 725C or equivalent MEASURING ITEM DISTORTION FACTOR GAUGE FILTER SETTING A WEIGHT A weight : IEC-A or equivalent THD +N, CT OFF $/N, DR ON @ AC CHARACTERISTICS STIPULATED POINT (Input signal stipulation : 10% |190% 50% xe ff 50% tg | LRCK, BCK, DATA) 10% | 190% tf X DATA LRCK Ae td APPLICATION CIRCUIT EXAMPLE-1 (+5 V Single power supply used) +C Jenox GNDD [_ }-& H x GNDA [)}& C]csi Na @) 16.9 MHz om 5V . SE qe. wb ef 8 _ w a }px ms Lo Se Ou on Lo [ wn To L-ch Analog OUT 5V 1k xi ____C] mek Voa [)-> Cyne S Nel @) N 47 uF an N ti empH |} Jemp o RO C]sus Gnd <x vriP [-)}#-& Single processor HS e As ke RO RI - RO yw R-ch Analog OUT for CD Player 1 S AOUT}_(_] DATA GNDA [.}- RI Gnd [ ae BCK >} Jack THO ose ED cHCK /}__(_ Vpp [ ANALOG FILTER IC LRCK Of \ SV 7 2001-06-19TOSHIBA TC9268F/P APPLICATION CIRCUIT EXAMPLE-2 (+5 V Two power supply used) 1 100kQ 8 + Jenox 16.9 vig BO HHO 33kQ oo WI xO a ~ 1 1k L-ch Analog OUT et a wt O Vv 7 a4 10 uF qs 5v <t+{ DX ez [SG du 3 PZ 3578 6 xl }_____(") MICK wo | N a EMPH }___()] EMP an VU i 4 Single processor His QO His ke [. for CD Player a $S a AOUT }_____(") DATA GNDA 35 $0 men 4 > 10 WF 1kQ R-ch Analog OUT BCK }_()] BCK 71 ee ;4- Z S & cHCK}-(Jirck /\ Vop $5 aS 5V G x a ate V, a cc = APPLICATION CIRCUIT EXAMPLE-3 (+5 V Single power supply used) ty ty 2 ce 2 cc Ww +C Jenbx GNDD & H - 16.9 MHz xl GNDA oe 6 5600 22kQ 18k oo yw e XO a Lo P tO L-ch Analog QUT 8 PRE 27 pF & >1I* 18 pF 5V<t-C_}Vpx LL sphere | AR 8p as co 22kQ 18kQ 82kQ Xi (mck wo Vpal) 5 v N PA 22k 18k0 82 kO, EMPH } +] EMP oa RO aay wy 18 pF fs Single processor __ _ 2 RO PIs: 27 pF pt 560.2 S for CD Player HS O HS 22kQ 18k) [i R-ch Analog OUT AOQUT } + DATA GNDA [+ BCK + ack Tif )}* 3S CHK P+ lirck = \ vpn [2 5v Vv, Vv 7 Vee 3 vec (Cautions) @ Quality of crystal oscillation waveform largely affect S/N ratio and noise distortion. Further, this is also true then system clock is input externally through the XI pin of Pin. @ Suppress glitch of input signals (LRCK, BCK, DATA) as could as possible. @ The wiring between the TC9268F/P output and the analog filter amplifier input must be made the shortest. @ The capacitor between Vpa and GNDA, Vpp and GNDD, Vpyx and GNDxX shall be connected as close to the pin as possible. 8 2001-06-19TOSHIBA PACKAGE DIMENSIONS SOP20-P-300-1.27 20 11 HRABAAAAAR ) a] HERR RHR EER O.685TYP | |. a ot 1, 0-4320.1 pea [1.27] le 13.3MAX . 12.840.2 Weight : 0.489 (Typ.) TC9268F/P Unit : mm >| (300mil) it 0.158-45 2001-06-19TOSHIBA TC9268F/P PACKAGE DIMENSIONS DIP20-P-300-2.54A Unit : mm 20 11 Co Od ds a) ) Gon ERP ET et Patri 6.440.2 < 25.1MAX 24.640.2 0.95+0.1 Ns Qe a Be} @ 1 Oy = J a z 2 2 z att a o Weight : 1.4g (Typ.) 10 2001-06-19TOSHIBA TC9268F/P RESTRICTIONS ON PRODUCT USE 000707EBA @ TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the Handling Guide for Semiconductor Devices, or TOSHIBA Semiconductor Reliability Handbook etc.. @ The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (Unintended Usage). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. @ The products described in this document are subject to the foreign exchange and foreign trade laws. @ The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. @ The information contained herein is subject to change without notice. 11 2001-06-19