__- Fast Logic series: DDU-7F Digital Delay Units 10 Taps (14 pins DIP) TTL Interfaced Features: g Auto-insertable. a Completely interfaced for TTL m No external components required w P.C. board space economy achieved a Fits standard 14 pins DIP socket Specifications: m No. Taps: 10 equally spaced. m Total Delay Tolerance: +5% or better, or 2 ns whichever is greater. u Rise time: 2 ns typically. a Temperature coefficient: 100 PPM/C. a Temperature range: 0 to + 70C. (-55C to +125C on request.)* m Supply voltage: 4.75 to 5.25 V. # Supply Current: Iecu: 50 ma. Iccu: 15 ma. a DC Parameters: See TTL-Fast Schottky Logic Table on Page 6. *Add M to Part No.: Ex. DDU-7F-100ME5. Case size: E5. Total Delay Part No. Delay Per Tap (ns) (ns) *DDU-7F-10 9 tos 4 DDU-7F-20 18 2.2%. 5 DDU-7F-25 22.5 254.7 DDU-7F-50 50 .0 + 4.5 DDU-7F-100 100 10.0 + 2 DDU-7F-150 150 45.0 + 2 DDU-7F-200 200 20.0 +2 DDU-7F-250 250 25.0 + 2 DDU-7F-300 300 30.0 = 3 DDU-7F-400 400 40.0 + 4 DDU-7F-500 500 50.0 + 6 *Time delay referenced to 1st tap. 3.5 ns ~ 1 ns inherent delay. Test Conditions: g# input Pulse Width: =150% of total delay. mg Time delay measured @ 1.5 V on rising edge. g Unless otherwise specified all time-delays are referenced to input of delay line. mw Rise-time is measured from .75 V to 2.4 V of leading edge. gw All measurements made @ Ver = 5V; Ta= +25C. CS oS oo a Oe oe, Lead Material: Nickel-ron alloy 42 Sa aa oa TIN PLATE 8 g WO 14 12 13 44 280 dit }- 780 Max MAX >| 010+ .002 350 MAX, Tape oto 2-3 4.5 6 7 8 8 10 Pind 130-3. 120-440-4510 gg 8 018 TYP. Ne p- 3 Mt. Prospect Avenue, Clifton, New Jersey 07013 = (973) 773-2299 m Fax (973) 773-9672 11