LM95172EWG
1
2
3
4
5 6
7
8
9
10
OVERTEMP
SC
NC
GND
CS
NC
SI/O
NC
VDD ANALOG
VDD IO
LM95172
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LM95172 13-Bit to 16-Bit 200°C Digital Temp Sensor with 3-Wire Interface
Check for Samples: LM95172
1FEATURES Conversion Time
13-bit mode 43 ms (max)
2 LM95172EWG is AEC-Q100 Grade 0 Qualified
and is Manufactured on an Automotive Grade 16-bit mode 350 ms (max)
Flow. DESCRIPTION
13-Bit (0.0625°C LSB) to 16-Bit (0.0078125°C The LM95172EWG is an integrated digital-output
LSB) Temperature Resolution temperature sensor with a Serial Peripheral Interface
Wide 40°C to +200°C Temperature Range (SPI) and MICROWIRE™-compatible interface in a
35 ms Best Conversion Time Tracks Fast 10-pin Cerpack high temperature ceramic package. It
Temp Changes features a very linear Sigma-Delta Analog-to-Digital
Converter (ADC), high accuracy, fast conversion
OVERTEMP Digital Output Switches rates, and extremely low output noise. With an
when TDIE > THIGH operating temperature as low as -40°C and optimized
Shutdown Mode Saves Power yet Wakes up accuracy from 120°C to 200°C, it is ideal for high-
for One-Shot Temperature Update temperature applications.
SPI and MICROWIRE Bus Interface The over-temperature alarm output (OVERTEMP)
10-Pin Cerpack High-Temperature Ceramic asserts when the die temperature exceeds a
Package programmed THIGH limit. The user-programmed TLOW
limit creates a temperature-stabilizing hysteresis
APPLICATIONS when the ambient temperature is near the trip point.
Automotive High Temperature Applications The LM95172EWG can be programmed to operate
from 13 bits (0.0625°C per LSB) to 16 bits
Industrial Power Controllers (0.0078125°C per LSB) resolution. The
Industrial Motors, Gear Boxes LM95172EWG powers up in 35 ms, the fastest
Geothermal Instrumentation conversion time, with temperature output set at 13-bit
resolution. The resolution may then be changed to
High Temperature Test Equipment 14-, 15- or 16-bits. When in the 13-, 14- or 15-bit
resolution mode, the least significant bit in the 16-bit
KEY SPECIFICATIONS temperature register toggles after the completion of
Analog and Digital Supply Voltage 3.0V to 5.5V each conversion. This bit may be monitored to verify
that the conversion is complete.
Total Supply Current Operating 400 µA
(typ) The high noise immunity of the Serial I/O (SI/O)
Shutdown 40°C to +140°C 4 µA (max) output makes the LM95172EWG ideal for use in
challenging electromagnetic environments.
Shutdown 40°C to +175°C 12 µA (max)
Shutdown 40°C to +200°C 28 µA (max) Connection Diagram
Temperature Accuracy
+175°C to +200°C ±3.0°C (max)
+130°C to +160°C ±1.0°C (max)
+120°C to +130°C ±2.0°C (max)
+160°C to +175°C ±2.0°C (max)
40°C to +120°C ±3.5°C (max)
Temperature Resolution
13-bit mode 0.0625°C/LSB
16-bit mode 0.0078125°C/LSB Figure 1. LM95172EWG- Top View
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2009–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Temperature
Sensor
Circuitry
Control/Status
Register and Logic Temperature
Register Manufacturer's
ID Register
13- to 16-Bit
Sigma-Delta
A/D Converter
SI/O
SC
VDD ANALOG
3.0V to 5.5V
LM95172EWG
CS
VDD IO
3.0V to 5.5V
Temperature
High/Low Limit
Registers
OVERTEMP
Three-Wire
Serial Interface
4
5
7
2
1
9 10
LM95172
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PIN DESCRIPTIONS
Pin Name Type Description Typical Connection
Number
Over-temperature Alarm Output, Open-drain. Active Low on
1 OVERTEMP Output OVERTEMP Alarm POR. Requires a pull-up resistor to VDD IO.
2 SC Input Serial Clock input Serial clock from the Controller
3 NC N/A No Connect Do not connect to this pin.
4 CS Input Chip Select input Chip Select input for the bus. Low pass filtered.
5 GND Ground Power Supply Ground Ground
6 NC N/A No Connect Do not connect to this pin.
Bidirection
7 SI/O Serial I/O Serial I/O Data line to or from the Controller
al
8 NC N/A No Connect Do not connect to this pin.
Analog Power Supply DC Voltage from 3.0V to 5.5V. Bypass with a 10 nF ceramic
9 VDD ANALOG Power Voltage capacitor near the pad to ground.
Digital Power Supply DC Voltage from 3.0V to 5.5V. Bypass with a 10 nF ceramic
10 VDD IO Power Voltage capacitor near the pin to ground.
Simplified Block Diagram
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VDD IO
GND
SI/O
LM95172EWG
CS
SC
VDD ANALOG
VDD IO
Microcontroller
3.0 to 5.5 Volts
GND
RPULL-UP
10k
OVERTEMP
OVERTEMP
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Typical Application
Figure 2. Microcontroller Interface - normal connection
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
VDD ANALOG and VDD IO Supply Voltages 0.2V to 6.0V
Voltage at any Pin 0.2V to (VDD IO + 0.2V)
Input Current at any Pin 5 mA
Storage Temperature 65°C to +175°C
Soldering Information
Infrared or Convection (20 sec.) 235°C
ESD Susceptibility (2)
Human Body Model 2500 V
Machine Model 250 V
Charged Device Model 1000 V
(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Operating Ratings is not implied. The Operating Ratings indicate conditions at which the
device is functional and the device should not be operated beyond such conditions.
(2) Human body model, 100 pF discharged through a 1.5 kΩresistor. Machine model, 200 pF discharged directly into each pin. The
Charged Device Model (CDM) is a specified circuit characterizing an ESD event that occurs when a device acquires charge through
some triboelectric (frictional) or electrostatic induction processes and then abruptly touches a grounded object or surface.
Operating Ratings
Specified Temperature Range 40°C to +200°C
Analog Supply Voltage Range +3.0V to +5.5V
VDD ANALOG
Digital Supply Voltage Range +3.0V to +5.5V
VDD IO
Package Thermal Resistances
Package θJA
10-Lead CERPACK 175°C/W
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Temperature-to-Digital Converter Characteristics
Unless otherwise noted, these specifications apply for VDD ANALOG = VDD IO = 3.0V to 3.6V.(1)Boldface limits apply for TA
=40°C to +200°C; all other limits TA= 25°C, unless otherwise noted. LM95172EWG Units
Parameter Conditions Typical (2) Limits (3) (Limit)
TA= +175°C to +200°C ±3.0
TA= +130°C to +160°C ±1.0
Temperature TA= +120°C to +130°C ±2.0
Accuracy (1) °C (max)
TA= +160°C to +175°C ±2.0
TA=40°C to +120°C ±3.5
Res 1 Bit Res 0 Bit 13 Bits
0 0 0.0625 °C
14 Bits
0 1 0.03125 °C
Resolution 15 Bits
1 0 0.015625 °C
16 Bits
1 1 0.0078125 °C
For 13 Bits Resolution 43(5)
Temperature For 14 Bits Resolution 87(5)
Conversion ms (max)
For 15 Bits Resolution 175(5)
Time(4)
For 16 BIts Resolution 350(5)
TA=40°C to 400 456
140°C
Bus Inactive TA=40°C to 510
Continuous Conversion Mode 175°C
TA=40°C to 500 650 μA (max)
200°C
Total Quiescent
Current (6) TA=40°C to 4
140°C
TA=40°C to 12
Shutdown Mode 175°C
TA=40°C to 28 75
200°C
0.9 V (min)
TA=40°C to 140°C 2.1 V (max)
0.8 V (min)
Power-On Reset TA=40°C to 175°C
Threshold 2.1 V (max)
0.3 V (min)
TA=40°C to 200°C 2.1 V (max)
(1) The LM95172EWG will operate properly over the VDD ANALOG = 3.0V to 5.5V and VDD IO = 3.0V to 5.5V supply voltage ranges.
(2) Typical values represent most likely parametric norms at specific conditions (Example Vcc; specific temperature) and at the
recommended Operating Conditions at the time of product characterizations and are not ensured.
(3) The Electrical characteristics tables list ensured specifications under the listed Operating Ratings except as otherwise modified or
specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured.
(4) This specification is provided only to indicate how often temperature data is updated. The LM95172EWG can be read at any time
without regard to conversion state (and will yield last conversion result). A conversion in progress will not be interrupted. The output shift
register will be updated at the completion of the read and a new conversion restarted.
(5) Specification is ensured by characterization and is not tested in production
(6) Total Quiescent Current includes the sum of the currents into the VDD ANALOG and the VDD IO pins.
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Logic Electrical Characteristics Digital DC Characteristics
Unless otherwise noted, these specifications apply for VDD ANALOG = VDD IO = 3.0V to 3.6V. (1).Boldface limits apply for TA= -
40°C to 200°C; all other limits TA= +25°C, unless otherwise noted.
Symbol Parameter Conditions Typical (2) Limits (3) Units (Limit)
VIH Logical "1" Input Voltage 0.75×VDD IO V (min)
VIL Logical "0" Input Voltage 0.25×VDD IO V (max)
VDD IO = 3.0V 0.63 0.42 V (min)
VDD IO = 3.3V 0.79 0.56
VDD IO = 3.6V 0.97 0.72
VHYST Digital Input Hysteresis VDD IO = 4.5V 0.9
VDD IO = 5.0V 1.0
VDD IO = 5.5V 1.1
IIH Logical “1” Input Leakage Current VIN = VDD IO 1μA (max)
IIL Logical “0” Input Current VIN = 0V 1μA (max)
IOH = 100 μA (Source) VDD IO 0.2 V (min)
VOH Output High Voltage VDD IO
IOH = 2 mA (Source) 0.45
IOL = 100 μA (Sink) 0.2 V (max)
VOL Output Low Voltage IOL = 2 mA (Sink) 0.45
OVERTEMP Output Saturation Voltage IOL = 2 mA (Sink) 0.45 V(max)
(1) The LM95172EWG will operate properly over the VDD ANALOG = 3.0V to 5.5V and VDD IO = 3.0V to 5.5V supply voltage ranges.
(2) Typical values represent most likely parametric norms at specific conditions (Example Vcc; specific temperature) and at the
recommended Operating Conditions at the time of product characterizations and are not ensured.
(3) The Electrical characteristics tables list ensured specifications under the listed Operating Ratings except as otherwise modified or
specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured.
Serial Bus Digital Switching Characteristics
Unless otherwise noted, these specifications apply for VDD ANALOG = VDD IO = 3.0V to 3.6V (1); CL(load capacitance) on output
lines = 100 pF unless otherwise specified. Boldface limits apply for TA= -40°C to 200°C; all other limits TA= +25°C, unless
otherwise noted. Typical (2) Limits (3) Units
Symbol Parameter (Limit)
t1SC (Serial Clock) Period 765 ns (min)
t2CS (Chip Select) Low to SC High Set-Up Time (4)(5) 1.25 µs (min)
t3CS Low to SI/O Output Delay (4)(5) 1µs (max)
t4SC Low to SI/O Output Delay 120 ns (max)
t5CS High to Data Out (SI/O) TRI-STATE 220 ns (max)
t6SC High to SI/O Input Hold Time 50 ns (min)
t7SI/O Input to SC High Set-Up Time 30 ns (min)
t8SC Low to CS High Hold Time 50 ns (min)
tTA Data Turn-Around Time: SI/O input (write to LM95172EWG) to output (read from 130 ns (max)
LM95172EWG)
tBUF Bus free time between communications: CS High to CS Low(4)(5) 5µs (min)
(1) The LM95172EWG will operate properly over the VDD ANALOG = 3.0V to 5.5V and VDD IO = 3.0V to 5.5V supply voltage ranges.
(2) Typical values represent most likely parametric norms at specific conditions (Example Vcc; specific temperature) and at the
recommended Operating Conditions at the time of product characterizations and are not ensured.
(3) The Electrical characteristics tables list ensured specifications under the listed Operating Ratings except as otherwise modified or
specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured.
(4) Specification is ensured by characterization and is not tested in production
(5) Specification is ensured by design and is not tested in production
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SI/O
Input SI/O
Output
tTA
CS
tBUF
SC
CS
t6
t7
t8SC
SI/O
Input
CS
t6
t7
t8
SI/O
Input
CS
SC
SI/O
Output
t5
CS
SC t5
SI/O
Output
CS
SC
SI/O
Output
t3
t2
t4
t1t4trtf
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Figure 3. Data Output Timing Diagram
Figure 4. TRI-STATE Data Output Timing Diagram
Figure 5. Data Input Timing Diagram
Figure 6. tBUF Timing Definition Diagram
Figure 7. tTA Timing Definition Diagram
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Figure 8. TRI-STATE Test Circuit
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Pointer Register
(selects register
for communication)
Interface
Data
Address
SI/O
SC
THIGH
(Read-Write)
Pointer = 82h (r), 02h (w)
TLOW
(Read-Write)
Pointer = 83h (r), 03h (w)
Temperature (Read-Only)
Default Register
CS
Control/Status
(Read-Write)
Pointer = 81h (r), 01h (w)
Identification
(Read-Only)
Pointer = 87h
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FUNCTIONAL DESCRIPTION
The LM95172EWG temperature sensor incorporates a temperature sensor and a 13-bit to 16-bit ΣΔ ADC
(Sigma-Delta Analog-to-Digital Converter). Compatibility of the LM95172EWG's three wire serial interface with
SPI and MICROWIRE allows simple communications with common microcontrollers and processors. Shutdown
mode can be used to optimize current drain for different applications. A Manufacturer's/Device ID register
identifies the LM95172EWG as Texas Instruments product. See Figure 9.
Figure 9. LM95172EWG Functional Block Diagram
INITIAL SOFTWARE RESET AND POWER-UP SEQUENCES AND POWER ON RESET (POR)
Software Reset Sequence
A software reset sequence must be followed, after the initial VDD ANALOG and VDD IO supply voltages reach their
specified minimum operating voltages, in order to ensure proper operation of the LM95172EWG.
The software reset sequence is as follows:
1. Allow VDD ANALOG and VDD IO to reach their specified minimum operating voltages, as specified in Operating
Ratings, and in a manner as specified in Power-Up Sequence.
2. Write a “1” to the Shutdown bit, Bit 15 of the Control/Status Register, and hold it high for at least the
specified maximum conversion time for the initial default of 13-bits resolution, in order to ensure that a
complete reset operation has occurred. (See the Temperature Conversion Time specifications within
Temperature-to-Digital Converter Characteristics.)
3. Write a “0” to the Shutdown bit to restore the LM95172EWG to normal mode.
4. Wait for at least the specified maximum conversion time for the initial default of 13-bits resolution in order to
ensure that accurate data appears in the Temperature Register.
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Power-Up Sequence
WARNING
In all cases listed below the VDD ANALOG waveform must not lag the VDD
IOwaveform
Linear Power-up In the case where the VDD ANALOG and VDD IO voltage-vs.-time function is linear, the specified
minimum operating voltage must be reached in 5 ms or less.
Resistor-Capacitor (R-C) Charging Exponential Power-up In the case where the VDD ANALOG and VDD IO
voltage-vs.-time function is as a typical R-C Charging exponential function the time constant must be less
than or equal to 1.25 ms.
Other Power-up Functions In the case where the VDD ANALOG and VDD IO voltage-vs.-time characteristic follows
another function the following requirements must be met:
1. The specified minimum operating voltage values for VDD ANALOG and VDD IO must be reached in 5 ms or less.
2. The slope of the VDD ANALOG and VDD IO power-up curves must be greater than or equal to 0.7 V/ms at any
time before the specified minimum operating voltage is reached.
3. The slope of the VDD ANALOG and VDD IO power-up curves must not allow ringing such that the voltage is
allowed to drop below the specified minimum operating voltage at any time after the specified minimum
operating voltage is reached.
Power On Reset (POR)
After the requirements of Software Reset Sequence and Power-Up Sequence are met each register will then
contain its defined POR default value. Any of the following actions may cause register values to change from
their POR value:
1. The master writes different data to any Read/Write (R/W) bits, or
2. The LM95172EWG is powered down.
The specific POR Value of each register is listed in INTERNAL REGISTER STRUCTURE.
ONE SHOT CONVERSION
The LM95172EWG features a one-shot conversion bit, which is used to initiate a singe conversion and
comparison cycle when the LM95172EWG is in shutdown mode. While the LM95172EWG is in shutdown mode,
writing a "1" to the One-Shot bit in the Control/Status Register will cause the LM95172EWG to perform a single
temperature conversion and update the Temperature Register and the affected status bits. Operating the
LM95172EWG in this one-shot mode allows for extremely low average-power comsumption, making it ideal for
low-power applications.
When the One-shot bit is set, the LM95172EWG initiates a temperature conversion. After this initiation, but
before the completion of the conversion, and resultant register updates, the LM95172EWG is in a "one-shot"
state. During this state, the Data Available (DAV) flag in the Control/Status Register is "0" and the Temperature
Register contains the value 8000h (-256°C). All other registers contain the data that was present before initiating
the one-shot conversion. After the temperature measurement is complete, the DAV flag will be set to "1" and the
temperature register will contain the resultant measured temperature.
OVERTEMP OUTPUT
The Over-temperature (OVERTEMP) output is a temperature switch signal that indicates when the measured
temperature exceeds the THIGH programmed limit. The programmable THIGH register sets the high temperature
limit and the TLOW register is used to set the hysteresis. The TLOW register also sets the temperature below which
the OVERTEMP output resets. The OVERTEMP output of the LM95172EWG behaves as a temperature
comparator. The following explains the operation of OVERTEMP. Figure 10 illustrates the OVERTEMP output
behavior.
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Temperature Reg Read
(16 bits)
CS
SI/O
D16 D0
SC
1 16
Measured
Temperature
THIGH Limit
TLOW Limit
OVERTEMP Reset
%LWVHWWR³1´
OVERTEMP Output
Polarity = Active Low
NOTE: The OVERTEMP output asserts when the measured temperature is greater than the THIGH value.
Up to 1 Conversion Time
1 Conversion Time
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Figure 10. LM95172EWG OVERTEMP vs. Temperature Response Diagram
The OVERTEMP Output will assert when the measured temperature is greater than the THIGH value.
OVERTEMP will reset if any of the following events happen:
1. The temperature falls below the value stored in the TLOW register, or
2. A "1" is written to the OVERTEMP Reset bit in the Control/Status Register.
If OVERTEMP is cleared by the master writing a "1" to the OVERTEMP Reset bit while the measured
temperature still exceeds the THIGH value, OVERTEMP will assert again after the completion of the next
temperature conversion. Placing the LM95172EWG in shutdown mode or triggering a one-shot conversion does
not cause OVERTEMP to reset.
COMMUNICATING WITH THE LM95172EWG
The serial interface consists of three lines: CS (Chip Select), SC (Serial Clock), and the bi-directional SI/O (Serial
I/O) data line. A high-to-low transition of the CS line initiates the communication. The master (processor) always
drives the chip select and the clock. The first 16 clocks shift the temperature data out of the LM95172EWG on
the SI/O line (a temperature read). Raising the CS at anytime during the communication will terminate this read
operation. Following this temperature read, the SI/O line becomes an input and a command byte can be written
to the LM95172EWG. This command byte contains a R/W bit and the address of the register to be
communicated with next (see INTERNAL REGISTER STRUCTURE). When writing, the data is latched in after
every 8 bits. The processor must write at least 8 bits in order to latch the data. If CS is raised before the falling
edge of the 8th command bit, no data will be latched into the command byte. If CS is raised after the 8th bit, but
before the 16th bit, of a write to a 16-bit data register, only the most significant byte of the data will be latched.
This command-data-command-data sequence may be performed as many times as desired.
Figure 11. Reading the Temperature Register
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Temperature Reg Read
(16 bits) Command Byte
Write (8 bits) Data Register
Read or Write (16 bits)
CS
SI/O
D16 D0 D0D16P7 P0 Command Byte
Write (8 bits) Data Register
Read or Write (16 bits)
D0D16P0P7
SC
1 8 1 16
1 8
116 161
Temperature Reg Read
(16 bits) Command Byte
Write (8 bits) Data Register
Read or Write (16 bits)
CS
SI/O
D16 D0 D0D16P7 P0
SC
1 16 1 161 8
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Figure 12. Reading the Temperature Register followed by a read or write from another register
(Control/Status, THIGH, TLOW, or Identification register)
Figure 13. Reading the Temperature Register followed by repeated commands and Data Register
accesses (Control/Status, THIGH, TLOW, or Identification register)
TEMPERATURE DATA FORMAT
Temperature data is represented by a 13- to 16-bit, two's complement word with a Least Significant Bit (LSB)
equal to 0.0625 °C (13-bits), 0.03125 °C (14-bits), 0.015625 °C (15-bits) or 0.0078125 °C (16-bits). See
Temperature Register for definition of the bits in the Temperature Register.
Table 1. 13-Bit Resolution. First Bit (D15) is Sign, the last bit (D0) is Toggle and bits D1 and D2 are
always 0.
13-bit Resolution Digital Output
Temperature All 16 Bits Bits D15 - D3
16-bit Binary Hex Hex
0101011110000 000 5780
+175°C 0AF0
0101011110000 001 5781
0100101100000 000 4B00
+150°C 0960
0100101100000 001 4B01
0010100000000 000 2800
+80°C 0500
0010100000000 001 2801
0000110010000 000 0C80
+25°C 0190
0000110010000 001 0C81
0000000000001 000 0008
+0.0625°C 0001
0000000000001 001 0009
0000000000000 000 0000
0°C 0000
0000000000000 001 0001
1111111111111 000 FFF8
0.0625°C 1FFF
1111111111111 001 FFF9
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Table 1. 13-Bit Resolution. First Bit (D15) is Sign, the last bit (D0) is Toggle and bits D1 and D2 are
always 0. (continued)
13-bit Resolution Digital Output
Temperature All 16 Bits Bits D15 - D3
16-bit Binary Hex Hex
1110110000000 000 EC00
40°C 1D80
1110110000000 001 EC01
Table 2. 14-Bit Resolution. First bit (D15) is Sign, the last bit (D0) is Toggle and bit D1 is always 0.
14-bit Resolution Digital Output
Temperature All 16 Bits Bits D15 - D2
16-bit Binary Hex Hex
01010111100000 00 5780
+175°C 15E0
01010111100000 01 5781
01001011000000 00 4B00
+150°C 12C0
01001011000000 01 4B01
00101000000000 00 2800
+80°C 0A00
00101000000000 01 2801
00001100100000 00 0C80
+25°C 0320
00001100100000 01 0C81
00000000000001 00 0004
+0.03125°C 0001
00000000000001 01 0005
00000000000000 00 0000
0°C 0000
00000000000000 01 0001
11111111111111 00 FFFC
0.03125°C 3FFF
11111111111111 01 FFFD
11101100000000 00 EC00
40°C 3B00
11101100000000 01 EC01
Table 3. 15-Bit Resolution. First bit (D15) is Sign and the last bit (D0) is Toggle.
15-bit Resolution Digital Output
Temperature All 16 Bits Bits D15 - D1
16-bit Binary Hex Hex
010101111000000 0 5780
+175°C 2BC0
010101111000000 1 5781
010010110000000 0 4B00
+150°C 2580
010010110000000 1 4B01
001010000000000 0 2800
+80°C 1400
001010000000000 1 2801
000011001000000 0 0C80
+25°C 0640
000011001000000 1 0C81
000000000000001 0 0002
+0.015625°C 0001
000000000000001 1 0003
000000000000000 0 0000
0°C 0000
000000000000000 1 0001
111111111111111 0 FFFE
0.015625°C 7FFF
111111111111111 1 FFFF
111011000000000 0 EC00
40°C 7600
111011000000000 1 EC01
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Table 4. 16-Bit Resolution. First bit (D15) is Sign and the last bit (D0) is the LSB.
16-bit Resolution Digital Output
Temperature All 16 Bits
16-bit Binary Hex
+175°C 0101 0111 1000 0000 5780
+150°C 0100 1011 0000 0000 4B00
+80°C 0010 1000 0000 0000 2800
+25°C 0000 1100 1000 0000 0C80
+0.0078125°C 0000 0000 0000 0001 0001
0°C 0000 0000 0000 0000 0000
0.0078125°C 1111 1111 1111 1111 FFFF
40°C 1110 1100 0000 0000 EC00
The first data byte is the most significant byte with most significant bit first, permitting only as much data as
necessary to be read to determine temperature condition. For instance, if the first four bits of the temperature
data indicate an overtemperature condition, the host processor could immediately take action to remedy the
excessive temperatures.
SHUTDOWN MODE
Shutdown Mode is enabled by writing a “1” to the Shutdown Bit, Bit 15 of the Control/Status Register, and
holding it high for at least the specified maximum conversion time at the existing temperature resolution setting.
(see Temperature Conversion Time specifications under the Temperature-to-Digital Converter Characteristics).
For example, if the LM95172EWG is set for 16-bit resolution before shutdown, then Bit 15 of the Control/Status
register must go high and stay high for the specified maximum conversion time for 16-bits resolution.
The LM95172EWG will always finish a temperature conversion and update the temperature registers before
shutting down.
Writing a “0” to the Shutdown Bit restores the LM95172EWG to normal mode.
INTERNAL REGISTER STRUCTURE
The LM95172EWG has four registers that are accessible by issuing a command byte (a R/W Bit plus the register
address: Control/Status, THIGH, TLOW, and Identification. Which of these registers will be read or written is
determined by the Command Byte. See COMMUNICATING WITH THE LM95172EWG for a complete
description of the serial communication protocol. The following diagram describes the Command Byte and lists
the addresses of the various registers. On power-up, the Command Byte will point to the Temperature Register
by default. The temperature is read by lowering the CS line and then reading the 16-Bit temperature register; all
other registers are accessed by writing a Command Byte after reading the temperature.
All registers can be communicated with, either in Continuous Conversion mode or in Shutdown mode. When the
LM95172EWG has been placed in Shutdown Mode, the Temperature register will contain the temperature data
which resulted from the last temperature conversion (whether it was the result of a continuous-conversion
reading or a one-shot reading).
Command Byte
P7 P6 P5 P4 P3 P2 P1 P0
R/W 0 0 0 0 Register Select
Bit <7> Read/Write Bit. Tells the LM95172EWG if the host will be writing to, or reading from, the register to which
this byte is pointing.
Bits <6:3> Not Used. These Bits must be zero. If an illegal address is written, the LM95172EWG will return
0000h on the subsequent read.
Bits <2:0> Pointer Address Bits. Points to desired register. See table below.
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P2 P1 P0 Register
0 0 0 Invalid. (1)
0 0 1 Control/Status
0 1 0 THIGH
0 1 1 TLOW
100
1 0 1 Invalid. (1)
110
1 1 1 Identification
(1) Invalid. The LM95172EWG will return a "0" if read. If written to, no valid register will be modified.
Power-On Reset state: 00h
Reset Conditions: Upon Power-on Reset
Temperature Register
(Read Only): Default Register
D15 D14 D13 D12 D11 D10 D9 D8
Sign 128°C 64°C 32°C 16°C 8°C 4°C 2°C
D7 D6 D5 D4 D3 D2 D1 D0
1°C 0.5°C 0.25°C 0.125°C 0.0625°C 0.03125°C 0.015625°C Conversion - Toggle/ 0.0078125°C
Bit <15:1>: Temperature Data Byte. Represents the temperature that was measured by the most recent
temperature conversion in two's complement form. On power-up, this data is invalid until the DAV Bit in the
Control/Status Register is high (that is, after completion of the first conversion).
The resolution is user-programmable from 13-Bit resolution (0.0625°C) through 16-Bit resolution (0.0078125°C).
The desired resolution is programmed through Bits 4 and 5 of the Control/Status Register. See the description of
Control/Status Register for details on resolution selection.
The Bits not used for a selected resolution are always set to "0" and are not to be considered part of a valid
temperature reading. For example, for 14-Bit resolution, Bit <1> is not used and, therefore, it is invalid and is
always zero.
Bit <0>: Conversion Toggle or, if 16-Bit resolution has been selected, this is the 16-Bit temperature LSB.
When in 13-Bit, 14-Bit, or 15-Bit resolution mode, this Bit toggles each time the Temperature register is read if a
conversion has completed since the last read. If conversion has not completed, the value will be the same as the
last read.
When in 16-Bit resolution mode, this is the Least Significant Bit of the temperature data.
Reset Conditions: See Software Reset Sequence,Power-Up Sequence, and INITIAL SOFTWARE RESET AND
POWER-UP SEQUENCES AND POWER ON RESET (POR) for reset conditions.
One-Shot State: 8000h (-256°C)
Control/Status Register
(Read/Write) Pointer Address: 81h (Read); 01h (Write)
D15 D14 D13 D12 D11 D10 D9 D8
SD One-Shot OVERTEMP Reset Conversion Toggle OVERTEMP Status THIGH TLOW DAV
D7 D6 D5 D4 D3 D2 D1 D0
OVERTEMP Disable OVERTEMP POL RES1 RES0 0 reserved reserved 0
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SNOSB33B DECEMBER 2009REVISED MARCH 2013
Bit <15>: Shutdown (SD) Bit. Writing a “1” to this bit and holding it high for at least the specified maximum
conversion time, at the existing temperature resolution setting, enables the Shutdown Mode. Writing a “0” to this
bit restores the LM95172EWG to normal mode.
Bit <14>: One-Shot Bit. When in shutdown mode (Bit <15> is "1"), initiates a single temperature conversion and
update of the temperature register with new temperature data. Has no effect when in continuous conversion
mode (i.e., when Bit <15> is "0"). Always returns a "0" when read.
Bit <13>: OVERTEMP Reset Bit. Writing a "1" to this Bit resets the OVERTEMP Status bit and, after a possible
wait up to one temperature conversion time, the OVERTEMP pin. It will always return a "0" when read.
Bit <12>: Conversion Toggle Bit. Toggles each time the Control/Status register is read if a conversion has
completed since the last read. If conversion has not been completed, the value will be the same as last read.
Bit <11>: OVERTEMP Status Bit. This Bit is "0" when OVERTEMP output is low and "1" when OVERTEMP
output is high. The OVERTEMP output is reset under the following conditions: (1) Cleared by writing a "1" to the
OVERTEMP Reset Bit (Bit <13>) in this register or (2) Measured temperature falls below the TLOW limit. If the
temperature is still above THIGH, and OVERTEMP Reset is set to "1", then the Bit and the pin clear until the next
conversion, at which point the Bit and pin would assert again.
Bit <10>: Temperature High (THIGH) Flag Bit. This Bit is set to "1" when the measured temperature exceeds the
THIGH limit stored in the programmable THIGH register. The flag is reset to "0" when both of two conditions are
met: (1) temperature no longer exceeds the programmed THIGH limit and (2) upon reading the Control/Status
Register. If the temperature no longer exceeds the THIGH limit, the status Bit remains set until it is read by the
master so that the system can check the history of what caused the OVERTEMP to assert.
Bit <9>: Temperature Low (TLOW) Flag Bit. This Bit is set to "1" when the measured temperature falls below the
TLOW limit stored in the programmable TLOW register. The flag is reset to "0" when both of two conditions are met:
(1) temperature is no longer below the programmed TLOW limit and (2) upon reading the Control/Status Register.
If the temperature is no longer below, or equal to, the TLOW limit, the status Bit remains set until it is read by the
master so that the system can check the history of what caused the OVERTEMP to assert.
Bit <8>: Data Available (DAV) Status Bit. This Bit is "0" when the temperature sensor is in the process of
converting a new temperature. It is "1" when the conversion is done. It is reset after each read and goes high
again after one temperature conversion is done. In one-shot mode: after initiating a temperature conversion while
operating, this status Bit can be monitored to indicate when the conversion is done. After triggering the one-shot
conversion, the data in the temperature register is invalid until this Bit is high (i.e., after completion of the first
conversion).
Bit <7>: OVERTEMP Disable Bit. When set to "0" the OVERTEMP output is enabled. When set to "1" the
OVERTEMP output is disabled. This Bit also controls the OVERTEMP Status Bit (this register, Bit <11>) since
that Bit reflects the state of the OVERTEMP pin.
Bit <6>: OVERTEMP Polarity Bit. When set to "1", OVERTEMP is active-high. When "0" it is active-low.
Control/Status Register (Continued)
Bit <5:4>: Temperature Resolution Bits. Selects one of four user-programmable temperature data resolutions as
indicated in the following table.
Control/Status Register Resolution
Bit 5 Bit 4 Bits °C
0 0 13 0.0625
0 1 14 0.03125
1 0 15 0.015625
1 1 16 0.0078125
Bit <3>: Always write a zero to this Bit.
Bit <2:1>: Reserved Bits. Will return whatever was last written to them. Value is zero on power-up.
Bit <0>: Always write a zero to this Bit.
Reset State: 0000h
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Reset Conditions: Upon Power-on Reset.
THIGH: Upper Limit Register
(Read/Write) Pointer Address: 82h (Read); 02h (Write)
D15 D14 D13 D12 D11 D10 D9 D8
Sign 128°C 64°C 32°C 16°C 8°C 4°C 2°C
D7 D6 D5 D4 D3 D2 D1 D0
1°C 0.5°C 0.25°C Reserved
Bit <15:5>: Upper-Limit Temperature byte. If the measured temperature, stored in the temperature register,
exceeds this user-programmable temperature limit, the OVERTEMP pin will assert and the THIGH flag in the
Control/Status register will be set to "1".
Bit <4:0>: Reserved. Returns all zeroes when read.
Reset State: 4880h (+145°C)
Reset Conditions: Upon Power-on Reset.
TLOW: Lower Limit Register
(Read/Write) Pointer Address: 83h (Read); 03h (Write)
D15 D14 D13 D12 D11 D10 D9 D8
Sign 128°C 64°C 32°C 16°C 8°C 4°C 2°C
D7 D6 D5 D4 D3 D2 D1 D0
1°C 0.5°C 0.25°C Reserved
Bit <15:5>: Lower-Limit Temperature byte. If the measured temperature that is stored in the temperature register
falls below this user-programmable temperature limit, the OVERTEMP pin will not assert and the TLOW flag in the
Control/Status register will be set to "1".
Bit <4:0>: Reserved. Returns all zeroes when read.
Reset State: 4600h (+140°C)
Reset Conditions: Upon Power-on Reset.
MFGID: Manufacturer, Product, and Step ID Register
(Read Only) Pointer Address: 87h
D15 D14 D13 D12 D11 D10 D9 D8
10000000
D7 D6 D5 D4 D3 D2 D1 D0
00110000
Bit <15:8>: Manufacturer Identification Byte. Always returns 80h to uniquely identify the manufacturer as Texas
Instruments Corporation.
Bit <7:4>: Product Identification Nibble. Always returns 30h to uniquely identify this part as the LM95172EWG.
Bit <3:0>: Die Revision Nibble. Returns 0h to uniquely identify the revision level as zero.
Reset State: 8030h
Reset Conditions: Upon Power-on Reset.
16 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: LM95172
VDD ANALOG
+3.3 VDC
100 nF
LM95172EWG
VDD IO
GND
SC
SI/O
CS
68HC11
Microcontroller
GPI/O1
GPI/O2
SC
10k
MSIO
10k
OVERTEMP
OVERTEMP
SC
SI/O
CS
INTEL 196
Microcontroller
GPI/O
RXD
TXD
VDD ANALOG
+3.3 VDC
100 nF
LM95172EWG
VDD IO
GND
10k
OVERTEMP
OVERTEMP
LM95172
www.ti.com
SNOSB33B DECEMBER 2009REVISED MARCH 2013
Typical Applications
Figure 14. Temperature monitor using Intel 196 processor
Figure 15. LM95172EWG digital input control using microcontroller's general purpose I/O.
Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
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LM95172
SNOSB33B DECEMBER 2009REVISED MARCH 2013
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REVISION HISTORY
Changes from Revision A (March 2013) to Revision B Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 17
18 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
www.ti.com 20-Nov-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM95172EWG NRND CFP NAC 10 54 TBD Call TI Call TI -40 to 200 LM95172
EWG
LM95172EWG/NOPB ACTIVE CFP NAC 10 54 Green (RoHS
& no Sb/Br) A42 Level-1-NA-UNLIM -40 to 200 LM95172
EWG
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 20-Nov-2013
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
MECHANICAL DATA
NAC0010A
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WG10A (Rev H)
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