RT9025
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DS9025-05 March 2011 www.richtek.com
Ordering Information
Pin Configurations
(TOP VIEW)
SOP-8
2A, Ultra Low Dropout LDO
General Description
The RT9025 is a high performance positive voltage regulator
designed for use in applications requiring very low Input
voltage and extremely low dropout voltage at up to
2A(Peak). It operates with a VIN as low as 1V and VDD
voltage 3V with programmable output voltage as low as
0.8V. The RT9025 features ultra low dropout that is ideal
for applications where VOUT is very close to VIN.
Additionally, it has an enable pin to further reduce power
dissipation while shutdown and provides excellent
regulation over variations in line, load and temperature.
The RT9025 provides a power good signal to indicate if
the voltage level of Vo reaches 90% of its rating value.
The RT9025 is available in the SOP-8 and SOP-8 (Exposed
Pad) package with 1.05V, 1.2V, 1.5V, 1.8V and 2.5V
internally preset outputs that are also adjustable by using
external resistors.
GNDPGOOD
EN
VDD
VIN NC
ADJ
VOUT
2
3
45
8
7
6
SOP-8 (Exposed Pad)
Features
lUltra Low Dropout Voltage 230mV at 2A
lOutput Current up to 2A
lHigh Accuracy Output Voltage 2%
lPower Good Output
lOutput Voltage Pull Low Resistor when Disable
lOver Current Protection
lThermal Shutdown Protection
lRoHS Compliant and 100% Lead (Pb)-Free
Applications
lNote Book PC Applications
lMotherboard Applications
Note :
Richtek products are :
} RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
} Suitable for use in SnPb or Pb-free soldering processes.
GND
PGOOD
EN
VDD
VIN NC
ADJ
VOUT
2
3
45
8
7
6
GND
9
Package Type
S : SOP-8
SP : SOP-8 (Exposed Pad-Option 1)
RT9025-
Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Z : ECO (Ecological Element with
Halogen Free and Pb free)
Output Voltage
1K : 1.05V/Adj
12 : 1.2V/Adj
15 : 1.5V/Adj
18 : 1.8V/Adj
25 : 2.5V/Adj
RT9025
2DS9025-05 March 2011www.richtek.com
Functional Pin Description
Pin No. Pin Name
Pin Function
1 PGOOD Power Good Open Drain Output.
2 EN Chip Enable (Active High).
3 VIN Supply Input Voltage.
4 VDD Supply Voltage of Control Circuit.
5 NC No Internal Connection.
6 VOUT Output Voltage.
7 ADJ Set the output voltage by the internal feedback resistors
when ADJ is grounded.
If external feedback resistors is used, VOUT = 0.8V x (R2 + R1) / R2.
8,
9 (Exposed Pad)
GND Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
Function Block Diagram
Figure 1. Fixed Voltage Regulator Figure 2. Adjustable Voltage Regulator
Typical Application Circuit
R2
R2R1
0.8 VOUT +
×=
OCP
Error
Amplifier
POR
EN
GND
ADJ
VIN
PGOOD
VOUT
VDD Mode
+
-
+
-
0.8V
0.72V
OTP
SD
VIN
EN
GND
VOUT
ADJ
PGOOD
RT9025
VOUT
10µF
10µF
Chip Enable
100k
VOUT
VDD
1µF
VDD
VIN CIN COUT
VIN
EN
GND
VOUT
ADJ
PGOOD
RT9025
VOUT
10µF
10µFR1
R2
100k
VOUT
VDD
1µF
VDD
VIN CF
Chip Enable
CIN COUT
RT9025
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DS9025-05 March 2011 www.richtek.com
Electrical Characteristics
(VIN = VOUT + 500mV, VEN = VDD = 5V, CIN = COUT = 10µF, TA = 25°C, unless otherwise specified)
Absolute Maximum Ratings (Note 1)
lSupply Input Voltage, VIN ------------------------------------------------------------------------------------------6V
lControl Voltage-------------------------------------------------------------------------------------------------------6V
lOutput Voltage-------------------------------------------------------------------------------------------------------6V
lPower Dissipation, PD @ TA = 25°C
SOP-8------------------------------------------------------------------------------------------------------------------0.833W
SOP-8 (Exposed Pad)----------------------------------------------------------------------------------------------1.333W
lPackage Thermal Resistance (Note 2)
SOP-8, θJA ------------------------------------------------------------------------------------------------------------120°C/W
SOP-8, θJC ------------------------------------------------------------------------------------------------------------60°C/W
SOP-8 (Exposed Pad), θJA ----------------------------------------------------------------------------------------75°C/W
SOP-8 (Exposed Pad), θJC ----------------------------------------------------------------------------------------15°C/W
lLead Temperature (Soldering, 10 sec.)--------------------------------------------------------------------------260°C
lJunction Temperature-----------------------------------------------------------------------------------------------150°C
lStorage Temperature Range--------------------------------------------------------------------------------------- −65°C to 150°C
lESD Susceptibility (Note 3)
HBM (Human Body Mode)-----------------------------------------------------------------------------------------2kV
MM (Machine Mode)------------------------------------------------------------------------------------------------200V
Recommended Operating Conditions (Note 4)
lSupply Input Voltage, VIN ------------------------------------------------------------------------------------------1.4V to 5.5V
lControl Voltage, VDD-------------------------------------------------------------------------------------------------4.5V to 5.5V
lJunction Temperature Range-------------------------------------------------------------------------------------- −40°C to 125°C
lAmbient Temperature Range-------------------------------------------------------------------------------------- −40°C to 85°C
To be Continued
Parameter Symbol
Test Conditions Min
Typ
Max
Unit
VIN
Quiescent Current (GND Current)
(Note 5) IQ VDD = 5V -- 0.6 1.2 mA
VDD
VDD Operation Range VDD V DD Input Range 4.5 -- 5.5 V
VOUT
Fixed Output Voltage V
DD = 5V −2 0 2 %
VOUT Load Regulation (Note 6) ∆VLOAD VDD = 5V, IOUT = 2A,
V
IN = VOUT + 1V -- 0.2 1 %
VOUT Line Regulation (VIN) ∆VLINE_IN
VDD = 5V, VIN = VOUT + 1V to 5V
IOUT = 1mA -- 0.2 0.6 %
VDD = 5V, IOUT = 2A -- 230
300
Dropout Voltage (Note 7) VDROP VDD = 5V, IOUT = 1A -- 115 150
mV
RT9025
4DS9025-05 March 2011www.richtek.com
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a 4-layers high effective thermal conductivity test board of
JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for SOP-8 (Exposed Pad)
package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. Quiescent, or ground current, is the difference between input and output currents. It is defined by IQ = IIN - IOUT under
no load condition (IOUT = 0mA).
Note 6. Regulation is measured at constant junction temperature by using a 2ms current pulse. Devices are tested for load
regulation in the load range from 1mA to 2A.
Note 7. The dropout voltage is defined as VIN -VOUT, which is measured when VOUT is VOUT(NORMAL) − 100mV.
Parameter Symbol
Test Conditions Min
Typ
Max
Unit
Current Limit I
LIM VDD = 5V, VIN = 3.6V -- 3.5 -- A
Short Circuit Current VDD = 5V , VOUT < 0.2V -- 1.8 -- A
In-rush Current VDD = 5V, C
OUT = 10µ
F, Enable
Start-up, ILOAD = 2A -- 0.5 -- A
VOUT Pull Low Resistance V
EN = 0V -- 150
-- Ω
VOUT Rising Time 10% to 90%, VOUT = 1.8V -- 200
600
µs
ADJ
Reference Voltage VREF VDD = 5V, VOUT = 2.5V 0.788
0.8 0.812
V
ADJ Pin Threshold -- 0.2 -- V
Power-On Reset
POR Threshold 2.4 2.7 3.0 V
POR Falling Hysteresis 0.15
0.2 -- V
Power Good
Power Good Rising Threshold V
DD = 5V -- 90 -- %
Power Good Hysteresis VDD = 5V -- 10 -- %
Power Good Sink Capability V
DD = 5V, IOUT = 10mA -- 0.2 0.4 V
Chip Enable
Logic-High VEN_H VDD = 5V 1.2 -- -- V
EN Threshold
Voltage Logic-Low V
EN_L VDD = 5V -- -- 0.6 V
EN Pin Bias Current I
EN VEN = 5V -- 12 -- µA
VDD Shutdown Current I
SHDN VDD = 5V, V EN = 0V -- -- 1 µA
Over Temperature Protection
Thermal Shutdown Temperature TSD -- 160
-- °C
Thermal Shutdown Returned
Temperature -- 90 -- °C
RT9025
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DS9025-05 March 2011 www.richtek.com
Typical Operating Characteristics
Load Transient Response
Time (2.5ms/Div)
IOUT
(1A/Div)
VOUT
(20mV/Div)
VDD = 5V, VIN = 1.8V, VOUT = 1.2V ADJ
Load Transient Response
Time (2.5ms/Div)
IOUT
(1A/Div)
VOUT
(20mV/Div)
VDD = 5V, VIN = 3.3V, VOUT = 2.5V FIX
VIN Line Transient Response
Time (250μs/Div)
VOUT
(50mV/Div)
VIN
(1V/Div)
VDD = 5V, VOUT = 1.2V ADJ, IOUT = 0A
3
2
VIN Line Transient Response
Time (250μs/Div)
VOUT
(50mV/Div)
VDD = 5V, VOUT = 2.5V FIX, I OUT = 0A
4
3
VIN
(1V/Div)
VDD Line Transient Response
Time (250μs/Div)
VOUT
(20mV/Div)
VIN = 1.8V, VOUT = 1.2V ADJ, IOUT = 0A
5
4
VDD
(1V/Div)
VDD Line Transient Response
Time (250μs/Div)
VOUT
(20mV/Div)
VIN = 3.3V, VOUT = 2.5V FIX, IOUT = 0A
5
4
VDD
(1V/Div)
RT9025
6DS9025-05 March 2011www.richtek.com
Dropout Voltage vs. Load Current
0
50
100
150
200
250
300
350
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Load Current (A)
Dropout Vol t age ( mV)
125°C
25°C
-40°C
Short Circuit Protection
Time (500μs/Div)
IOUT
(1A/Div)
VOUT
(1V/Div)
Start Up from VDD
Time (1ms/Div)
VDD
(5V/Div)
VOUT
(1V/Div)
IIN
(1A/Div) VDD = 5V, VIN = V EN = 1.8V,
VOUT = 1.2V ADJ, IOUT = 2A
Start Up from VIN
Time (1ms/Div)
VIN
(1V/Div)
VOUT
(1V/Div)
IIN
(1A/Div) VDD = 5V, VIN = VEN = 1.8V,
VOUT = 1.2V ADJ, IOUT = 2A
Start Up from Enable and PGOOD Delay
Time (1ms/Div)
PGOOD
(1V/Div)
VEN
(5V/Div)
VOUT
(1V/Div)
IIN
(1A/Div) VDD = VEN = 5V, VIN = 1.8V,
VOUT = 1.2V ADJ, IOUT = 2A
Short Circ uit Cu rre nt vs. Te m p era tur e
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
-50-250 255075100
Temperature (°C)
Short Circuit Current (A) 1
RT9025
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DS9025-05 March 2011 www.richtek.com
Fixed Output Voltage Range vs. Temperature
2.40
2.42
2.44
2.46
2.48
2.50
2.52
2.54
2.56
2.58
2.60
-50 -25 0 25 50 75 100 125
Temperature (°C)
Fixed Output Voltage (V)
VIN = 3.3V, VADJ = 0V, VOUT = 2.5V, IOUT = 0A
ADJ Threshold Voltage Range vs. Temperature
0.10
0.12
0.14
0.16
0.18
0.20
0.22
0.24
0.26
0.28
0.30
-50 -25 0 25 50 75 100
Temperature (°C)
ADJ Threshold Voltage (V)
VDD POR Threshold Voltage vs. Temperature
2.40
2.45
2.50
2.55
2.60
2.65
2.70
2.75
2.80
2.85
2.90
2.95
3.00
-50 -25 0 25 50 75 100
Temperature (°C)
POR Voltage (V) 1
Rising
Falling
Quiescent Current vs. Temperature
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
-50 -25 0 25 50 75 100 125
Temperature (°C)
Quiescent Current (µA) 1
VIN = 3.3V, VOUT = 2.5V, IOUT = 0A
VIN = 1.8V, VOUT = 1.2V, IOUT = 0A
Enable Threshold Voltage vs. Temperature
0.60
0.65
0.70
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
-50 -25 0 25 50 75 100
Temperature (°C)
Enable Threshold Voltage (V) 1
Rising
Falling
Reference Voltage vs. Temperature
0.76
0.77
0.78
0.79
0.80
0.81
0.82
0.83
0.84
-50 -25 0 25 50 75 100 125
Temperature (°C)
Reference Voltage (V) 1
RT9025
8DS9025-05 March 2011www.richtek.com
Application information
Adjustable Mode Operation
The output voltage of RT9025 is adjustable from 0.8V to
VIN by external voltage divider resisters as shown in Typical
Application Circuit (Figure 2). The value of resisters R1
and R2 should be more than 10kΩ to reduce the power
loss. The output voltage can be calculated by the following
equation :
Region of Stable COUT ESR vs. Output Current
0.001
0.01
0.1
1
10
0 0.5 1 1.522.5 3
Output Current (A)
Region of Stable C
OUT
ESR (Ω)
VDD = 5V, VIN = 1.8V, VOUT = 1.2V
R1 = R2 = 100kΩ, CIN = COUT = 10µF/X5R
Unstable Region
Stable Region
Unstable Region (Simulation Verity)
Region of Stable COUT ESR (Ω)
Figure 3. Region of Stable COUT ESR vs. Output Current
Current Limit
The RT9025 contains an independent current limit and
the short circuit current protection to prevent unexpected
applications. The current limit monitors and controls the
pass transistor's gate voltage, limiting the output current
to higher than 3.5A typical. When the output voltage is
less than 0.2V, the short circuit current protection starts
the current fold back function and maintains the loading
current 1.8A. The output can be shorted to ground
indefinitely without damaging the part.
Power Good
The power good function is an open-drain output. Connects
100kΩ pull up resistor to VOUT to obtain an output voltage.
The PGOOD pin will output high immediately after the
output voltage arrives 90% of normal output voltage.
Thermal Shutdown Protection
Thermal protection limits power dissipation to prevent IC
over temperature in RT9025. When the operation junction
temperature exceeds 160°C, the over temperature
protection circuit starts the thermal shutdown function
and turns the pass transistor off. The pass transistor turns
on again after the junction temperature cools by 30°C.
RT9025 lowers its OTP trip level from 160°C to 90°C
when output short circuit occurs (VOUT < 0.2V). It limits
Enable
The RT9025 goes into shutdown mode when the EN pin
is in the logic low condition. During this condition, the
pass transistor, error amplifier, and band gap are turned
off, reducing the supply current to 10µA typical. The
RT9025 goes into operation mode when the EN pin is in
the logic high condition. If the EN pin is floating, please
notice the RT9025 internal initial logic level. For RT9025,
the EN pin function pulls low level internally. So the
regulator will be turn off when EN pin is floating.
Input Capacitor
Good bypassing is recommended from input to ground to
improve AC performance. A 10µF input capacitor or greater
located as close as possible to the IC is recommended.
Output Capacitor
The output capacitor must meet both requirements for
minimum amount of capacitance and ESR in all LDOs
application. The RT9025 is designed specifically to work
with low ESR ceramic output capacitor in space-saving
and performance consideration. Using a ceramic capacitor
which value is at least 10µF with ESR is > 15mΩ on the
RT9025 output ensures stability. The RT9025 still works
well with output capacitor of other types due to the wide
stable ESR range. Figure 3 shows the curves of allowable
ESR range as a function of load current for various output
capacitor values. Output capacitor of larger capacitance
can reduce noise and improve load transient response,
stability, and PSRR. The output capacitor should be located
not more than 0.5 inch from the VOUT pin of the RT9025
and returned to a clean analog ground.
where VREF is the reference voltage (0.8V typical).
OUTREF
R1
VV1
R2
=×+
RT9025
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DS9025-05 March 2011 www.richtek.com
IC case temperature under 100°C and provides maximum
safety to customer while output short circuit occurring.
Power Dissipation
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
power dissipation definition in device is:
PD = (VIN − VOUT) x IOUT + VIN x IQ
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junctions to ambient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
Where TJ(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the θJA is
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9025,the maximum junction temperature is 125°C. The
junction to ambient thermal resistance for SOP-8 (Exposed
Pad) package is 75°C/W on the standard JEDEC 51-7 (4
layers, 2S2P) thermal test board. The copper thickness
is 2oz. The maximum power dissipation at TA = 25°C can
be calculated by following formula :
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.33W (SOP-8
Exposed Pad on the minimum layout)
Layout Considerations
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the package design and the PCB design.
However, the package design had been designed. If
possible, it's useful to increase thermal performance by
the PCB design. The thermal resistance θJA can be
decreased by adding a copper under the exposed pad of
SOP-8 (Exposed Pad) package.
As shown in Figure 4, the amount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard SOP-8
(Exposed Pad) pad (Figure 4.a), θJA is 75°C/W. Adding
copper area of pad under the SOP-8 (Exposed Pad) (Figure
4.b) reduces the θJA to 64°C/W. Even further, increasing
the copper area of pad to 70mm2 (Figure 4.e) reduces the
θJA to 49°C/W.
Figure 4. Thermal Resistance vs. Copper Area Layout
Thermal Design
(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W
(b) Copper Area = 10mm2, θJA = 64°C/W
(c) Copper Area = 30mm2, θJA = 54°C/W
(d) Copper Area = 50mm2, θJA = 51°C/W
(e) Copper Area = 70mm2, θJA = 49°C/W
RT9025
10 DS9025-05 March 2011www.richtek.com
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA. For RT9025 packages, the Figure 5 of de-
rating curves allows the designer to see the effect of rising
ambient temperature on the maximum power allowed.
Figure 5. Derating Curve for Package
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
020 40 60 80 100 120 140
Ambient Temperature (°C)
Power Dissipation (W)
Copper Area
70mm2
50mm2
30mm2
10mm2
Min. layout
JEDEC 4-Layers PCB
RT9025
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DS9025-05 March 2011 www.richtek.com
Outline Dimension
A
BJ
F
H
M
C
D
I
8-Lead SOP Plastic Package
Dimensions In Millimeters
Dimensions In Inches
Symbol Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 3.988 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.508 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.050 0.254 0.002 0.010
J 5.791 6.200 0.228 0.244
M 0.400 1.270 0.016 0.050
RT9025
12 DS9025-05 March 2011www.richtek.com
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
A
B
J
F
H
M
C
D
I
Y
X
EXPOSED THERMAL PAD
(Bottom of Package)
8-Lead SOP (Exposed Pad) Plastic Package
Symbol Dimensions In Millimeters
Dimensions In Inches
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
Option 1
X 2.000 2.300 0.079 0.091
Y 2.000 2.300 0.079 0.091
Option 2
X 2.100 2.500 0.083 0.098
Y 3.000 3.500 0.118 0.138
