AUIRFS3004-7P
G D S
Gate Drain Source
Base Part Number Package Type Standard Pack Orderable Part Number
Form Quantity
AUIRFS3004-7P Tube 50 AUIRFS3004-7P
Tape and Reel Left 800 AUIRFS3004-7PTRL
D2Pak 7 Pin
VDSS 40V
RDS(on) typ. 0.90m
max. 1.25m
ID (Silicon Limited) 400A
ID (Package Limited) 240A
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition be yon d those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratin gs are measured under bo ard mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Features
Advanced Process Techn ology
Ultra Low On-Resistance
175°C Operating Temp erature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast
switching speed and improved repetitive avalanche rating. These
features combine to make this design an extremely efficient and
reliable device for use in Automotive applications and wide variety
of other applications.
1 2015-10-20
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
AUTOMOTIVE GRADE
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 400
A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 280
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 240
IDM Pulsed Drain Current 1610
PD @TC = 25°C Maximum Power Dissipation 380 W
Linear Derating Factor 2.5 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy (Thermally Limited) 290
mJ
IAR Avalanche Current See Fig.14,15, 22a, 22b A
EAR Repetitive Avalanche Energy mJ
dv/dt Peak Diode Recovery 2.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case ––– 0.40
°C/W
RJA Junction-to-Ambient ( PCB Mount) ––– 40
D2Pak 7 Pin
HEXFET® Power MOSFET
AUIRFS3004-7P
2 2015-10-20
Notes:
Calculated continuous current based on maxi mum allowable junction temperature. Bond wire current limit is 240A. Note that
current limitations arising from heat ing of the device leads may occur with some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.01mH, RG = 25, IAS = 240A, VGS =10V. Part not recommended for use above this value.
I
SD 240A, di/dt 740A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
C
oss eff. (TR) is a fixed capacitance that gives the same charging time as Coss whil e V DS is rising from 0 to 80% VDSS.
C
oss eff. (ER) is a fixed capacitance that gives the same energy as Coss whil e V DS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to appl ication
note #AN-994
R
is measured at TJ approximately 90°C.
RJC value shown is at time zero
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.038 ––– V/°C Reference to 25°C, ID = 5mA
RDS(on) Static Drain-to-Source On-Resistance ––– 0.90 1.25 m VGS = 10V, ID = 195A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Trans conductance 1300 ––– ––– S VDS = 10V, ID = 195A
RG Gate Resistance ––– 2.0 –––
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 40V, VGS = 0V
––– ––– 250 VDS = 40V,VGS = 0V,TJ =125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Dynamic Electrical Characte ristics @ TJ = 25°C (unless otherwise specified)
Qg Total Gate Charge ––– 160 240
nC
ID = 180A
Qgs Gate-to-Source Charge ––– 42 ––– VDS = 20V
Qgd Gate-to-Drain Charge ––– 65 ––– VGS = 10V
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 95 –––
td(on) Turn-On Delay Time ––– 23 –––
ns
VDD = 26V
tr Rise Time ––– 240 ––– ID = 240A
td(off) Turn-Off Delay Time ––– 91 ––– RG= 2.7
tf Fall Time ––– 160 ––– VGS = 10V
Ciss Input Capacitance ––– 9130 –––
pF
VGS = 0V
Coss Output Capacitance ––– 2020 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 990 ––– ƒ = 1.0MHz, See Fig. 5
Coss eff.(ER) Effective Output Capacitance (Energy Related) ––– 2590 ––– VGS = 0V, VDS = 0V to 32V
Coss eff.(TR) Effective Output Capacitance (Time Related) ––– 2650 ––– VGS = 0V, VDS = 0V to 32V
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 400 A
MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current ––– ––– 1610 integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C,IS = 195A,VGS = 0V
trr Reverse Recovery Time ––– 49 ––– ns TJ = 25°C VDD = 34V
––– 51 ––– TJ = 125°C IF = 240A,
Qrr Reverse Recovery Charge ––– 37 ––– nC TJ = 25°C di/dt = 100A/µs
––– 41 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 3.2 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn -on is dominated by LS+LD)
AUIRFS3004-7P
3 2015-10-20
Fig. 2 Typical Output Characteristics
Fig. 3 Typical Transfer Characteri stics Fig. 4 Normalized O n-Resistance vs. Temperature
Fig. 1 Typical Output Characteristics
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Cha rge vs. Gate-to-Source Voltage
0.1 110 100 1000
VDS, Drain- to- Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
60µs PULSE WIDTH
Tj = 25°C
4.5V
0.1 110 100 1000
VDS, Drai n-to-S ource Voltage (V)
10
100
1000
ID, Drain-to-Source Current (A)
4.5V
60µs PULSE WIDT H
Tj = 175°C
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
3 4 5 6 7 8
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
VDS = 25V
60µs PULSE WIDTH
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 195A
VGS = 10V
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 50 100 150 200 250
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 32V
VDS= 20V
ID= 180A
AUIRFS3004-7P
4 2015-10-20
Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy vs. Drain Current
Fig 9. Maximum Drain Current vs. Case Temperature
0.00.51.01.52.0
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
0110100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100µsec
1msec
10msec
DC
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
60
120
180
240
300
360
420
ID, Drain Current (A)
Limited By Package
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
-60 -40 -20 020 40 60 80 100 120 140 160 180
TJ , Temperature ( °C )
40
42
44
46
48
50
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
Id = 5mA
-5 0 5 10 15 20 25 30 35 40 45
VDS, Drain-to-Source Voltage (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Energy (µJ)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
200
400
600
800
1000
1200
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 44A
80A
BOTTOM 240A
AUIRFS3004-7P
5 2015-10-20
Fig 14. Avalanche Current vs. Pulse width
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
J
J
1
1
2
2
3
3
R
1
R
1
R
2
R
2
R
3
R
3
Ci= iRi
Ci= iRi
C
C
4
4
R
4
R
4
Ri (°C/W) I (sec)
0.00757 0.000006
0.06508 0.000064
0.18313 0.001511
0.14378 0.009800
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
40
80
120
160
200
240
280
320
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 240A
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetiti ve Avalanche Cur ves , Figures 14, 15:
(For further info, see AN-1005 at www.infineon.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 18a, 18b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 13, 14).
t
av = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
Z
thJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
AUIRFS3004-7P
6 2015-10-20
Fig 16. Threshold Voltage vs. Temperature
Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt
Fig. 20 - Typical Stored Charge vs. dif/dt
-75 -50 -25 025 50 75 100 125 150 175 200
TJ , Temperature ( °C )
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VGS(th), Gate threshold Voltage (V)
ID = 250µA
ID = 1.0mA
ID = 1.0A
100 200 300 400 500
diF /dt (A/µs)
2
3
4
5
6
7
8
9
10
IRRM (A)
IF = 96A
VR = 34V
TJ = 25°C
TJ = 125 °C
100 200 300 400 500
diF /dt (A/µs)
2
3
4
5
6
7
8
9
10
11
12
IRRM (A)
IF = 144A
VR = 34V
TJ = 25°C
TJ = 125 °C
100 200 300 400 500
diF /dt (A/µs)
20
40
60
80
100
120
140
QRR (nC)
IF = 96A
VR = 34V
TJ = 25°C
TJ = 125°C
Fig. 17 - Typical Recovery Current vs. dif/dt
100 200 300 400 500
diF /dt (A/µs)
20
40
60
80
100
120
140
160
180
QRR (nC)
IF = 144A
VR = 34V
TJ = 25°C
TJ = 125°C
AUIRFS3004-7P
7 2015-10-20
Fig 21. Peak Diode Recov ery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms
Fig 23a. Switching Time Test Circuit
Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
tp
V
(BR)DSS
I
AS
Fig 23b. Switching Time Waveforms
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
AUIRFS3004-7P
8 2015-10-20
D2Pak - 7 Pin Package Outline (Dimensions are shown in millimeters (inches))
Note: For the most current drawing plea se refer to IR website at http://www.irf.com/package/
D2Pak - 7 Pin Part Marking Information
YWWA
XX XX
Date Code
Y= Year
WW= Work Week
AUFS3004-7P
Lot Code
Part Number
IR Logo
AUIRFS3004-7P
9 2015-10-20
D2Pak - 7 Pin Tape and Reel
Note: For the most current drawing plea se refer to IR website at http://www.irf.com/package/
AUIRFS3004-7P
10 2015-10-20
† Highest passing voltage.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in pe rsonal injury.
Qualification Information
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D2-Pak 7 Pin MSL1
ESD
Machine Model Class M4 (+/- 800V)†
AEC-Q101-002
Human Body Model Class H3A (+/- 6000V)†
AEC-Q101-001
Charged Device Model Class C5 (+/- 2000V)†
AEC-Q101-005
RoHS Compliant Yes
Moisture Sensitivity Level
Revision History
Date Comments
10/20/2015 Updated datasheet with corporate template
Corrected ordering table on page 1.
3/4/2015 Updated datasheet based on new IR corporate template .
Updated part marking from "AUS3004-7P" to "AUFS30 04-7P" on page 10.
