ANALOG DEVICES High Speed, Low Noise Quad Operational Amplifier OP-471 FEATURES @ Excellent Speed .....................-..0.0- 8V/us Typ Low Noise .............00e ees tinv// Hz @ 1kHz Max @ Unity-Gain Stable e High Gain-Bandwidth...................... 6.5MHz Typ Low input Offset Voltage ..................6. 0.8mV Max Low Offset Voltage Drift................... 4uv/ C Max @ High Gain.............. 00... cee eee 500V/mV Min Outstanding CMR ............ cc cece eee 105 dB Min e Industry Standard Quad Pinouts @ Avaiiable in Die Form ORDERING INFORMATION ' Ty = 425C PACKAGE OPERATING Vos MAX TEMPERATURE (uV) CERDIP PLASTIC Loc* RANGE 800 OP471AY* - OP471ATC/883 MIL 800 - - OP471ARC/883 MIL 800 OP471EY - - IND 1500 OP471FY - - IND 1800 - OP471GP - XIND 1800 - opa71astt - XIND * For devices processed in total compliance to MIL-STD-883, add /883 after part number, Consult factory for 883 data sheet. - tT Burn-in is available on commercial and industrial temperature range parts in CerDIP, plastic DIP, and TO-can packages. For availability and burn-in information on SO and PLCC packages, contact your local sales office. GENERAL DESCRIPTION The OP-471 is a monolithic quad op amp featuring low noise, The OP-471 has an input offset voltage under 0.8mV and an input offset voltage drift below 4uV/C, guaranteed over the full military temperature range. Open loop gain of the OP-471 is over 500,000 into a 10kQ load insuring outstanding gain accuracy and linearity. The input bias current is under 25nA PIN CONNECTIONS ouTA[i}# ie] OUT D -INA [2 LA Pisin D aNafspJ Lofajano V+ [a] [43] v +IN B [5] [12] +N C -INB RE ANG OUTB [ia] OUT CC NG. rs] Nc. 14-PIN HERMETIC DIP 16-PIN SOL (-Suffix) (S-Suffix) 14-PIN PLASTIC DIP (P-Suffix) a $5u58 TOzZz OT 12 IL Jee] WnV/\/ Hz Max @ 1kHz, excellent speed, 8V/us typical, a *re-Suttiy gain-bandwidth of 6.5MHz, and unity-gain stability. SIMPLIFIED SCHEMATIC (One of four amplifiers is shown.) Ov+ J | 1 pO OUT NO4 O+IN OvOP-471 limiting errors due to signal source resistance. The OP-471s CMR of over 105dB and PSRR of under 5.6uV/V significantly reduce errors caused by ground noise and power supply fluctuations. The OP-471 offers excellent amplifier matching which is important for applications such as multiple gain blocks, low- noise instrumentation amplifiers, quad buffers and low-noise active filters. The OP-471 conforms to the industry standard 14-pin DIP pinout. It is pin compatible with the OP-11, LM148/149, HA4741, RM4156, MC33074, TL084 and TL074 quad op amps and can be used to upgrade systems using these devices. For applications requiring even lower voltage noise the OP- 470, with a voltage density of 5nV/\/ Hz Max @ 1kHz, is recommended. ABSOLUTE MAXIMUM RATINGS (Note 1) Supply Voltage oo. sc ecccessseseneneessesnenseecesseeseacesecetenteees +18V Differential Input Voltage (Note 3) oo... scsscesesesesseeees +1.0V Differential Input Current (Note 3) .......ceseeesseseseceeees +25mW INPUT Voltage oo... ee ececeeeeeresseeecetsecesessesessenees Supply Voltage Output Short-Circuit Duration ...... eee eeeeeeees Continuous Storage Temperature Range P, RC, TC, Y-Package .0.......cccecceesecesseeeeee 65C to +150C Lead Temperature Range (Soldering, 60 sec) ............- 300C Junction Temperature (T,) .....cccsecceestseeeeees 65C to +150C Operating Temperature Range OP-471A occ .. 55C to +125C OP-471E, OP-471F ou... ceceececesereeeteesereeseree -25C to +85C OP-471G ooo. eccccceceneenseeneeeceaereecetenteascaseesones 40C to +85C PACKAGE TYPE @,, (Note 2) Bc UNITS 14-Pin Hermetic DIP (Y) 94 10 C/W 44-Pin Plastic DIP (P) 76 33 C/W 20-Contact LCC (RC) 78 30 C/W 28-Contact LCC (TC) 70 28 C/W 16-Pin SOL (S) 88 23 C/W NOTES: 1. Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2. @, is specified for worst case mounting conditions, i.e., @., is specified for dvice in socket for CerDIP, P-DIP, and LCC packages; 8; A is specified for device soldered to printed circuit board for SOL package. 3. The OP-471's inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise performance. If differential voltage exceeds +1 OV, the input current should be limited to +25mA. ELECTRICAL CHARACTERISTICS at Vs = +15V, Ta = 25C, unless otherwise noted. OP-471A/E OP-471F OP-471G PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage Vos 0.25 0.8 _ 0.5 15 1.0 1.8 mV Input Offset Current log Vom = OV 4 10 7 20 12 30 nA Input Bias Current lp Vom = OV _ 7 25 _ 18 50 _ 25 60 nA 0.1Hz to 10Hz Input Noise Voltage Enp-p _ 250 500 _ 250 500 _ 250 500 NVp-p (Note 1) fo = 10Hz _ 9 16 _ 9 16 _ 9 16 Input Noise fo = 100Hz _ 12 _ 7 12 _ t 12 Voltage Density &n to= 1kHz 65 4 65 1 65 a Nv He (Note 2) Input Noise fo = 10Hz 17 - 417 17 _ u ! Current Densit in fo 100Hz ~~ 0.7 ~ _ 07 _ _ 07 pA Hz y fo= tkHz - oo = - 04 = - O40 = , Vo = +10V L -S I nit asin Avo Ry 10ka 500 7002 300 500 300 500 v/mv t g Rp ~ 2ka 350, 550 7 87% 7575 Input Voltage Range IVR (Note 3) +n +12 +1 +12 +1 +12 _ Vv Output Voltage Swing Vo R, = 2k0. +12 H13 ~_ +12 413 ~ +12 +13 Vv Common-Mode Rejection CMR Vom = t11V 105 120 _ 95 115 _ 95 115 _ dB P. | ower Supply PSRR Vs = +4.8V lo +18V + 56 56 178 56 178 nV/V Rejection Ratio Slew Rate SR 6.5 8 6.5 8 6.5 8 _ V/usOP-471 ELECTRICAL CHARACTERISTICS at Vs = +15V, Ta = 25C, unless otherwise noted. (Continued) OP-471A/E OP-471F OP-471G PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Supply Current _ 9.2 11 _ 9.2 a} _ 9.2 a A (All Amplifiers) Isy No Load m Gain-Bandwidth Product GBW Ay =+10 _ 6.5 _ _ 6.5 _ _ 6.5 _ MHz Channel Separation cs Vo = 20Vp-p 125 150 _ 125 150 _ 125 150 _ dB fo = 10Hz (Note 1) Input Capacitance Cin _ 2.6 _ _ 2.6 _ _ 2.6 _ pF Input Resistance J _ _ 14 _ : _ Differential-Mode Rin 1 i" Mo Input Resistance : R _ 11 1 1 d Common-Mode INCM Go Ay= +1 Settling Time ts to 0.1% _ 4.5 _ _ 45 _ _ 4.5 _ BS to 0.01% _ 75 _ _ 7.5 _ _ 76 _ NOTES: 1. Guaranteed but not 100% tested. 2. Sample tested. 3. Guaranteed by CMR test. ELECTRICAL CHARACTERISTICS at Vs = +15V, -55C <= Ty = 125C for OP-471A, unless otherwise noted. OP-471A PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Offset Voltage Vos _ 0.4 1.2 mV Average Input Offset Voltage Drift TCVos 1 4 BEC Input Offset Current los Vom = OV _ 6 20 nA input Bias Current lp Vom = OV _ 16 50 nA Vo = 10V Large-Signal Voltage Gain Avo R_= 10ko 375 500 _ Vimv R, = 2kn 250 350 _ Input Voltage Range iVR (Note 1) #1 +12 _ Output Voltage Swing Vo Ry = 2k0 +12 +13 - Common-Mode at _ Rejection CMR Vem = 11V 100 115 dB Power S I wer SUPPIY PSRR Ve = +4.5V to 18V 56 10 VV Rejection Ratio Supply Current Isy No Load 9.3 11 mA (All Amplifiers) NOTE: 1. Guaranteed by CMR test.OP-471 ELECTRICAL CHARACTERISTICS atV, =+15V,-25C sT, $+85C for OP-471 E/F, -40C < T, < +85C for OP-471G, unless otherwise noted. OP-471E OP-471F OP-471G PARAMETER SYMBOL CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage Vos _ 0.3 1 _ 0.6 2.0 _ 1.2 2.5 mV Average Input 1 4 2 _ 4 _ Offset Voltage Drift TCVos , VEC Input Offset Current log Vom = OV _ 5 20 _ 8 40 _ 20 50 nA Input Bias Current lg Vem = OV _ 13 50 _ 25 70 _ 40 75 nA Vo = +10V Large-Signal oe volte Gain Avo R, = 10k 375 600 200 4002S 200 400 vim g R_=2ka 250 400 125 200002O 25 2002S = Input Voltage Range IVR (Note 1) in +12 _ +n +12 _ + #12 _ Vv Output Voltage Swing Vo Ry, 2 2ko +12 +13 _ +12 #13 _ #12 +13 _ =-M Common-Mode CMR Vem = 11V oo 06115 9 #10 9 100 dB Rejection Power Supply or . PSRR Vg = +4.5V to 18V _ 3.2 10 _ 18 31.6 _ 18 31.6 uVv/V Rejection Ratio Supply Current _ 9.3 1 _ 9.3 11 _ 9.3 11 (All Amplifiers) Isy No Load mA NOTE: 1. Guaranteed by CMR test.OP-471 DICE CHARACTERISTICS 1. OUTA 2. -INA 3. +INA 4. V+ 5. +INB 6. -INB 7. OUTB 8. OUTC 9. -INC 10. +INC 11. V- 12. +IND 13. -IND 14. OUTD DIE SIZE 0.163 X 0.106 inch, 17,278 sq. miis (4.14 X 2.69 mm, 11.14 sq. mm) _| WAFER TEST LIMITS at Vs = +15V, Ta = 25C, unless otherwise noted. OP-471GBC PARAMETER SYMBOL CONDITIONS LIMIT UNITS Input Offset Voltage Vos 1.5 mV MAX input Offset Current los Vom = OV 20 nA MAX Input Bias Current lp Vom = OV 50 nA MAX Large-Signal Vo= +10V Voltage Gain Avo R,_ = 10kO, 300 V/mV MIN RL = 2k 175 Input Voltage Range IVR Note 1 +11 V MIN Output Voltage Swing Vo R, = 2kO 12 V MIN Common-Mode Rejection CMR Vom 7 211V 95 dB MIN Power Supply at + Rejection Ratio PSRR Vg = +4.5V to +18V 17.8 uV/V MAX Slew Rate SR 65 V/us MIN Supply Current (All Amplifiers) Isy No Load . 1" mA MAX NOTES: 1. Guaranteed by CMR test. Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaran- teed for standard product dice. Consuit factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.OP-471 TYPICAL PERFORMANCE CHARACTERISTICS VOLTAGE NOISE DENSITY vs FREQUENCY 100 10 VOLTAGE NOISE DENSITY vs SUPPLY VOLTAGE 0.1Hz TO 10Hz NOISE Ta = 25C AT 10Hz = Vg = +18V a = > ~ 40 ~ & = 30 pz 8 = > WwW Zz 20 < S = = AT 1kHz iw a a uw 3 2 10 2 6 > z oO w w z 2 = a 5 o z 5 < o 4 1/f CORNER = 5Hz 4 an) 4 > 2 TIME (SEC) Ta = 25C Ta = 25C Vg = t15V 1 2 1 1 10 100 1k o +5 +10 +45 +20 FREQUENCY (Hz) CURRENT NOISE DENSITY vs FREQUENCY Ty = 25C Vg = 15V CURRENT NOISE (pA/\/Hz ) INPUT OFFSET VOLTAGE (V) 1/ CORNER = 160Hz 0 10 100 tk 75 FREQUENCY (Hz) 10k INPUT BIAS CURRENT vs TEMPERATURE 20 T T 10 Vg = #15V 9 Vom = 0V = <8 = 15 \ \ bk 7 E Zz 2 w uw 6 ed 3 3 3 10 5 5 a < 4 a le r 6 > t 3 a 3 z 5 a = eee Zz 2 qd , 9 0 #25 650 1% TEMPERATURE (C) Q -7% -50 -25 75 100 SUPPLY VOLTAGE (VOLTS) WARM-UP OFFSET VOLTAGE DRIFT INPUT OFFSET VOLTAGE vs TEMPERATURE Vg = 15V Ta = 25C Vg = L15V CHANGE iN OFFSET VOLTAGE (xV) 0 25 50 TEMPERATURE (C) -50 -25 75 100 125 2 TIME (MINUTES) 3 INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE INPUT OFFSET CURRENT vs TEMPERATURE 10 Vg = +15V Ty = 25C Vom = OV Vg = H15V _ 9 kK z = 8 5 3 ra < , a a 5 a z 6 -50 -25 0 2 50 7 100 125 -10.0 5.0 5.0 10.0 12.5 -75 -25 2.5 78 12.5 TEMPERATURE (C) COMMON-MODE VOLTAGE (VOLTS)OP-471 TYPICAL PERFORMANCE CHARACTERISTICS TOTAL SUPPLY CURRENT TOTAL SUPPLY CURRENT vs SUPPLY VOLTAGE vs TEMPERATURE Ta = 425C : Ls Ta = *125C = z a @ rf o > 6 = a a oC a a 2 a fz = Qe * LU u Lu 2 1 100 1k 10k 100k aM o +5 +10 18 +20 - 75 -S0 -25 0 2 50 75 100 125 FREQUENCY (Hz) SUPPLY VOLTAGE (VOLTS) TEMPERATURE (C) OPEN-LOOP GAIN CLOSED-LOOP GAIN PSR vs FREQUENCY vs FREQUENCY vs FREQUENCY 80 Wott Ta = 25C Ta = 25C Ta = 25C Vg = +18V Vg = +15 Vg = +15 60 z = N e z @ 40 g g N 3 g 3 | | I -20 1 10 100 61k 610k 100k 1M 10M 100M 1 10 100 1k 610k 100k 1M 10M 100M 1k 10k 100k IM 10M FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz) GAIN-BANDWIDTH OPEN-LOOP GAIN, PHASE OPEN-LOOP GAIN PRODUCT, PHASE MARGIN SHIFT vs FREQUENCY vs SUPPLY VOLTAGE vs TEMPERATURE 80 2000 T a0 8 Ta = 25C Ty = 25C Vg = t18V Vs =+15V_] 99 Ry, = 10k0 = x= = ~ > 1500 70 6 a a g 8 3 $ > Q a z a z Zz o & PHASE wor 68 5 & a MARGIN = 1000 & 60 az Q = a t z= = 57 wo 3 = a 3 160 8 uw = 1 al a a ww a < 3 180 a. | a 6 500 50 29 a q 200 G 220 0 40 0 1 2 3 5 7 10 Ce a5 410 HIS +20 75 -50 -25 0 25 50 75 100 125 150 FREQUENCY (MHz) SUPPLY VOLTAGE (VOLTS) TEMPERATURE (C)OP-471 TYPICAL PERFORMANCE CHARACTERISTICS MAXIMUM OUTPUT CLOSED-LOOP MAXIMUM OUTPUT SWING VOLTAGE vs OUTPUT IMPEDANCE vs FREQUENCY LOAD RESISTANCE vs FREQUENCY 360 oom I Ta = 26C Ta = 25C | Ta = 28C || oe Vg = 215V Vg = +15V Vg = 15V 5 THD = 1% 300 Fen 8 # - | o 3 = [ Q g w 240 5 g gp z 2 NEGATIVE 3 = 5 2 180 Fa < 3 5 3 5 5 MTT a yao LL ; : g F 8 Fain 4 = Ay=1 < 60 F-HH oo Baie o LLU 1k 10k 400k 1M 10M 100 1k 10k 100 1k 10k ~=-100k 10M FREQUENCY (Hz) LOAD RESISTANCE (0) FREQUENCY (Hz) SLEW RATE CHANNEL SEPARATION TOTAL HARMONIC vs TEMPERATURE vs FREQUENC DISTORTION vs FREQUENCY 9.0 170 rr : 1 te i 7 RES sat 8.5 150 fatebete | tH | | = Vo ~ 10Vp, , g 140 ITN ml Hh 8 Ry = 2ki . @ 8.0 SF Z 130 | , Hh 5 o4 S ee lll Ca b Pf +8R ce a E75 & to} al g = o : 3 = 400 ME LPN tL g z 20 4 2 oof Util tH = 0.01 @ | N = = sob tit LN a 6.5 70 L Ta = 25C Ly | iI 9 / Vg +18V Ay =1 / 89 F 4=20V).) TO 100kHz TFN] 6.0 SO Le Lt l 0.001 -75 -50 -25 0 25 50 75 100 125 10 100s tk = 10k) 100k. 1M_ 10M 10 100 1k 10k TEMPERATURE (C) FREQUENCY (H2) FREQUENCY (Hz) LARGE-SIGNAL SMALL-SIGNAL TRANSIENT RESPONSE TRANSIENT RESPONSE i Ta = 25C Ty = 25C Vg = +15V Vg = +15V Ay=t1 Ay=t1OP-471 CHANNEL SEPARATION TEST CIRCUIT 5k WA 5000 WV - oO V, 20V,.p LG 502 1/4 OP-471 + CHANNEL SEPARATION = 20 toa -O V2 a 2/1000 BURN-IN CIRCUIT +1V 0 12 -1V0 -1V 0 APPLICATIONS INFORMATION VOLTAGE AND CURRENT NOISE The OP-471 is a very low-noise quad op amp, exhibiting a typical voltage noise of only 6.5nV/\/ Hz @ 1kHz. The low noise characteristic of the OP-471 is in part achieved by operating the input transistors at high collector currents since the voltage noise is inversely proportional to the square root of the collector current. Current noise, however, is directly proportional to the square root of the collector current. As a result, the outstanding voltage noise perfor- mance of the OP-471 is gained at the expense of current noise performance which is typical for low noise amplifiers. To obtain the best noise performance ina circuit it is vital to understand the relationship between voltage noise (e,), cur- rent noise (i,), and resistor noise (). TOTAL NOISE AND SOURCE RESISTANCE The total noise of an op amp can be calulated by: En=V (en)? + (in Rg)? + (er)? where: E, = total input referred noise ey, = Op amp voltage noise in = Op amp Current noise e; = source resistance thermal noise Rs = source resistance The total noise is referred to the input and at the output would be amplified by the circuit gain. Figure 1 shows the relationship between total noise at 1kHz and source resistance. For Rg < 1k. the total noise is domi- FIGURE 1: Total Noise vs Source Resistance (Including Resistor Noise) at 1kHz OP-11 OP-400 OP-471 TOTAL NOISE (nV/\/He ) OP-470 RESISTOR NOISE ONLY 100 dk 10k Rg ~ SOURCE RESISTANCE (29) 100k FIGURE 2: Total Noise vs Source Resistance (Including Resistor Noise) at 10Hz Hz) TOTAL NOISE (nv/ RESISTOR 100 1k 10k Rg SOURCE RESISTANCE (1) 100kOP-471 nated by the voltage noise of the OP-471. As Rg rises above 1kQ, total noise increases and is dominated by resistor noise rather than by voltage or current noise of the OP-471. When Rs exceeds 20k, current noise of the OP-471 becomes the major contributor to total noise. Figure 2 also shows the relationship between total noise and source resistance, but at 10Hz. Total noise increases more quickly than shown in Figure 1 because current noise is inversely proportional to the square root of frequency. In Figure 2, current noise of the OP-471 dominates the total noise when Rg > 5k. From Figures 1 and 2 it can be seen that to reduce total noise, source resistance must be kept to a minimum. In applications with a high source resistance, the OP-400, with lower current noise than the OP-471, will provide lower total noise. Figure 3 shows peak-to-peak noise versus source resistance over the 0.1Hz to 10Hz range. Once again, at iow values of Rs, FIGURE 3: Peak-To-Peak Noise (0.1Hz To 10Hz) vs Source Resistance (Includes Resistor Noise) 1000 PEAK-TO-PEAK NOISE (nV) = 3 Ss RESISTOR NOISE ONLY 10 100 1k 10k 100k Rg SOURCE RESISTANCE () the voltage noise of the OP-471 is the major contributor to peak-to-peak noise. Current noise becomes the major contri- butor as Rsincreases. The crossover point between the OP- 471 and the OP-400 for peak-to-peak noise is at Rg = 17k0. The OP-470 is a lower noise version of the OP-471, with a typical noise voltage density of 3.2nV/\/Hz @ 1kHz. The OP-470 offers lower offset voltage and higher gain than the OP-471, but is aslower speed device, with a slew rate of 2V/us compared to a slew rate of 8V/us for the OP-471. For reference, typical source resistances of some signal sources are listed in Table I. TABLE | SOURCE DEVICE IMPEDANCE COMMENTS Strain gauge <5000 Typically used in low-frequency applications. Magnetic <15002 Low Ig very important to reduce tapehead self-magnetization problems when direct coupling is used. OP-471 Ip can be neglected. Magnetic <15000, Similar need for low Ig in direct phonograph coupled applications. OP-471 will not cartridges introduce any self-magnetization problem. Linear variable <16000, Used in rugged servo-feedback differential applications. Bandwidth of interest is transformer 400Hz to 5kHz. For further information regarding noise calculations, see Minimization of Noise in Op-Amp Applications, Applica- tion Note AN-15. NOISE MEASUREMENTS PEAK-TO-PEAK VOLTAGE NOISE The circuit of Figure 4 is a test setup for measuring peak-to- peak voitage noise. To measure the 500nV peak-to-peak FIGURE 4: Peak-To-Peak Voltage Noise Test Circuit (0.1Hz To 10Hz) R3 RS 6002 Lay po 1N448 9090 = y RA 2000 > RB fe OP-15E e 65.4k0 65.40 Rid our 4.99k0 RO Les , rT 306k? _ 5.9k0 c2 RI2 49k GAIN = 50,000 0.032pF Vg = +15V -10-OP-471 noise specification of the OP-471 in the 0.1Hz to 10Hz range, the following precautions must be observed: 1. The device has to be warmed-up for at least five minutes. As shown in the warm-up drift curve, the offset voltage typically changes 13uV due to increasing chip temperature after power-up. In the 10-second measurement interval, these temperature-induced effects can exceed tens- of-nanovolts. 2. For similar reasons, the device has to be well-shielded from air currents. Shielding also minimizes thermocouple effects. 3. Sudden motion in the vicinity of the device can also feed- through to increase the observed noise. FIGURE 5: 0.1Hz To 10Hz Peak-To-Peak Voltage Noise Test Circuit Frequency Response GAIN (dB) 0.01 0.4 1 10 100 FREQUENCY (Hz) FIGURE 6: Noise Voltage Density Test Circuit 4. The test time to measure 0.1Hz-to-10Hz noise should not exceed 10 seconds. As shown in the noise-tester fre- quency-response curve of Figure 5, the 0.1Hz corner is defined by only one pole. The test time of 10 seconds acts as an additional pole to eliminate noise contribution from the frequency band below 0.1Hz. 5. A noise-voltage-density test is recommended when mea- suring noise on a large number of units. A 10Hz noise- voltage-density measurement will correlate well with a 0.1Hz-to-10Hz peak-to-peak noise reading, since both results are determined by the white noise and the location of the 1/f corner frequency. 6. Power should be supplied to the test circuit by well bypassed low-noise supplies, e.g. batteries. These will minimize output noise introduced through the amplifier supply pins. NOISE MEASUREMENT NOISE VOLTAGE DENSITY The circuit of Figure 6 shows a quick and reliable method of measuring the noise voltage density of quad op amps. Each individual amplifier is series-connected and is in unity-gain, save the final amplifier which is in a noninverting gain of 101. Since the ac noise voltages of each amplifier are uncorre- lated, they add in rms fashion to yield: _____ Gout = 101 (Vena + ens? + enc + end) The OP-471 is a monolithic device with four identical amplifi- ers. The noise voltage density of each individual amplifier will match, giving: Gout = 101 (V 4e,2) = 101 (2e,) Rt R2 AA WA 1000 10k. 1/4 Va OP-471 oO four oP-471 + TO SPECTRUM ANALYZER Cour (NV/\V/ Hz ) = 101(2e,) Vg = +15V -11-OP-471 FIGURE 7: Current Noise Density Test Circuit R3 A 1.24k0, R1 50, 100k ep OUT TO SPECTRUM ANALYZER GAIN = 10,000 Vg = +15V NOISE MEASUREMENT CURRENT NOISE DENSITY The test circuit shown in Figure 7 can be used to measure current noise density. The formula relating the voltage output to current noise density is: (Sou) - (sonvie) G n Rg where: G = gain of 10000 Rs = 100k source resistance CAPACITIVE LOAD DRIVING AND POWER SUPPLY CONSIDERATIONS The OP-471 is unity-gain stable and is capable of driving large capacitive loads without oscillating. Nonetheless, good supply bypassing is highly recommended. Proper supply bypassing reduces problems caused by supply line noise and improves the capacitive load driving capability of the OP-471. In the standard feedback amplifier, the op amps output res- istance combines with the load capacitance to form a low- pass filter that adds phase shift in the feedback network and reduces stability. A simple circuit to eliminate this effect is shown in Figure 8. The added components, C1 and R23, decouple the amplifier from the load capacitance and provide additional stability. The values of C1 and R3 shown in Figure 8 are for load capacitances of up to 1000pF when used with the OP-471. in applications where the OP-471s inverting or noninverting inputs are driven by alow source impedance (under 100) or connected to ground, if V+ is applied before V-, or when Vis disconnected, excessive parasitic currents will flow. Most FIGURE 8: Driving Large Capacitive Loads V+ Ri Vin O/V Your q T 4000pF 1002" = PLACE SUPPLY DECOUPLING SEE TEXT CAPACITORS AT OP-471 op-a71 0 BV/us 4 A o-HOP-471 applications use dual tracking supplies and with the device supply pins properly bypassed, power-up will not present a problem. Asource resistance of at least 1000 in series with all inputs (Figure 8) will limit the parasitic currents to a safe level if V- is disconnected. It should be noted that any source resistance, even 1000, adds noise to the circuit. Where noise is required to be kept at aminimum, a germanium or Schottky diode can be used to clamp the V- pin and eliminate the parasitic current flow instead of using series limiting resistors. For most applications, only one diode clamp is required per board or system. UNITY-GAIN BUFFER APPLICATIONS When R; < 1000 and the input is driven with a fast, large- signal pulse (>1V), the output waveform will look as shown in Figure 9. During the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input, and a current, limited only by the output short-circuit protection, will be drawn by the signal generator. With Ry 2 5000, the output is capable of handling the current require- ments (IL < 20mA at 10V); the amplifier will stay in its active mode and a smooth transition will occur. When R> 3kQ, a pole created by Ry and the amplifiers input capacitance (2.6pF) creates additional phase shift and reduces phase margin. A small capacitor (20 to 50pF) in parallel with Ry; helps eliminate this problem. APPLICATIONS LOW NOISE AMPLIFIER A simple method of reducing amplifier noise by paralleling amplifiers is shown in Figure 10. Amplifier noise, depicted in Figure 11,is around 5nV/\/ Hz @1kHz (R.T.I.). Gain foreach paralleled amplifier and the entire circuit is 100. The 2000 resistors limit circulating currents and provide an effective output resistance of 500. The amplifier is stable with a 10nF capacitive load and can supply up to 30mA of output drive. HIGH-SPEED DIFFERENTIAL LINE DRIVER The circuit of Figure 12 is a unique line driver widely used in professional audio applications. With +18V supplies the line driver can deliver a differential signal of 30V)_, into a 1.5k0 load. The output of the differential line driver looks exactly like a transformer. Either output can be shorted to ground without changing the circuit gain of 5, so the amplifier can easily be set for inverting, noninverting, or differential opera- tion. The line driver can drive unbalanced loads, like a true transformer. ~13- HIGH OUTPUT AMPLIFIER The amplifier shown in Figure 13 is capable of driving 20V,_p into a floating 4000 load. Design of the amplifier is based ona bridge configuration. At amplifies the input signal and drives the load with the help of A2. Amplifier A3 is a unity-gain inverter which drives the load with help from A4. Gain of the high output amplifier with the component values shown is 10, but can easily be changed by varying R1 or R2. FIGURE 10: Low Noise Amplifier +15 Vin O- 14 R3 OP-471E R1 2000 50n RE Ra 2000 ne a 3 = s PHO Vout = 100Vin R9 1/4 OP-471E R7 2000, | g ca R12 V4 R10 OP-471E 10 2000 500 R11 sk. FIGURE 11: Noise Density of Low Noise Amplifier, G = 100 NOISE DENSITY (4.1nV/.\/ Hz /DIV REFERRED TO INPUT)OP-471 FIGURE 12: High-Speed Differential Line Driver -OUT O +OUT FIGURE 13: High Output Amplifier | RS | 4/4 R2 MWA- okn RI 9 we 4 44 1 R3 OP-a71E WV 3] a a 500 R4 OP-471E [VW 4A? 50, Ska. R6 A 5K R7 V4 R8 50 WV 500. 14 OP-471E Aa + OP-471E A3 TiaOP-471 QUAD PROGRAMMABLE GAIN AMPLIFIER The combination of the quad OP-471 and the DAC-8408, a quad 8-bit CMOS DAC, creates a space-saving quad pro- grammable gain amplifier. The digital code present at the DAC, which is easily set by a microprocessor, determines the ratio between the fixed DAC feedback resistor and the impe- dance the DAC ladder presents to the op amp feedback loop. Gain of each amplifier is: Vout _ 256 VIN n FIGURE 14: Quad Programmable Gain Amplifier where n equals the decimal equivalent of the 8-bit digital code present at the DAC. If the digital code present at the DAC consists of all zeros, the feedback loop will be open causing the op amp output to saturate. The 20MO resistors placed in parallel with the DAC feedback loop eliminates this problem with a very small reduction in gain accuracy. DAC-8408ET 3, RreA parses Viva OS FB AAA +15 DACA IO Voy iO VourD | | | | i | ,! RrpB VinB O | ww | r | LI | DAC B | 1/4 | OP-471E | ! | Rrge = Vine O- i z WW Var: | I | | los _ DAC C 1/4 | | OP-471E | | + | ; | | OuT2c/ap ; 24 = LL RreD Vino 22| Ree WN | = | VrerD , . | q | LL N | | loutip 123 | | DAC DATA BUS J | PINS 9{LSB)16(MSB) | | {Le ND _| = Bs -15-OP-471 LOW PHASE ERROR AMPLIFIER The simple amplifier depicted in Figure 15 utilizes monolithic matched operational amplifiers and a few resistors to sub- stantially reduce phase error compared to conventional amplifier designs. At a given gain, the frequency range fora specified phase accuracy is over a decade greater than fora standard single op amp amplifier. The low phase error amplifier performs second-order fre- quency compensation through the response of opamp A2in the feedback loop of Al. Both op amps must be extremely well matched in frequency response. At low frequencies, the A1 feedback loop forces Vo/(K1 + 1) = Vin. The A2 feedback loop forces Vo/(K1 + 1) = Vo/(K1 + 1) yielding an overall transfer function Of Vo/Vin = K1 + 1. The DC gain is deter- FIGURE 15: Low Phase Error Amplifier R2=R1 R1 K1 mime mm) VQ ASSUME: Al AND A2 ARE MATCHED. Vo = (Ki + 1) Vin w Ao(s) = zs mined by the resistor divider at the output, Vo, and is not directly affected by the resistor divider around A2. Note, that like aconventional single op amp amplifier, the DC gainis set by resistor ratios only. Minimum gain for the low phase error amplifier is 10. Figure 16 compares the phase error performance of the low phase error amplifier with a conventional single op amp amplifier and a cascaded two-stage amplifier. The low phase error amplifier shows a much lower phase error, particularly for frequencies where w/Bw, < 0.1. For example, phase error of -0.1 occurs at 0.002 w/Baw,for the single op amp amplifier, but at 0.11 w#/8w, for the low phase error amplifier. For more detailed information on the low phase error ampli- fier, see Application Note AN-107. FIGURE 16: Phase Error Comparison SINGLE OP AMP, CONVENTIONAL ne CASCADED (TWO STAGES) PTET | LOW PHASE ERROR AMPLIFIER PHASE SHIFT (DEG) 0.001 ' ' 0.06: 0.05 FREQUENCY RATIO (1/8)(co/a) O41 ' 0.01 5 0.5