CS45-16IO1 - Zilog - Datasheet.Directory

CS45-16io1

Single Thyristor

Thyristor

2 1

3

Part number

CS45-16io1

Backside: anode

TAV

T

VV1.37

RRM

45

1600

=

V= V

I= A

Features / Ad vantages: Applications: Package:

● Thyristor for line frequency

● Planar passivated chip

● Long-term stability

● Line rectifying 50/60 Hz

● Softstart AC motor control

● DC Motor control

● Power converter

● AC power control

● Lighting and temperature control

TO-247

● Industry standard outline

● RoHS compliant

● Epoxy meets UL 94V-0

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified

CS45-16io1

V = V

A²s

kA²s

Symbol Definition

Ratings

typ. max.

I

V

IA

V

T

1.36

R0.4 K/W

min.

45

VV

50T = 25°C

VJ

T = °C

VJ

mA3V = V

T = 25°C

VJ

I = A

T

V

T = °C

C

110

P

tot

310 WT = 25°C

C

45

1600

forward voltage drop

total power dissipation

Conditions Unit

1.73

T = 25°C

VJ

125

V

T0

V0.88T = °C

VJ

150

r

T

11 mΩ

V1.37T = °C

VJ

I = A

T

V

45

1.85

I = A90

threshold voltage

slope resistance for power loss calculation only

µA

125

VV1600T = 25°C

VJ

IA71

P

GM

Wt = 30 µs 10

max. gate power dissipation

P

T = °C

C

150

Wt = 5

P

GAV

W0.5

average gate power dissipation

C

J

22

j

unction capacitance V = V400 T = 25°Cf = 1 MHz

RVJ

pF

I

TSM

t = 10 ms; (50 Hz), sine T = 45°C

VJ

max. forward surge current

T = °C

VJ

150

I²t T = 45°C

value for fusing

T = °C150

V = 0 V

R

V = 0 V

R

V = 0 V

t = 8,3 ms; (60 Hz), sine

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

VJ

R

VJ

R

thJC

thermal resistance junction to case

T = °C

VJ

150

520

560

970

940

A

440

475

1.35

1.31

1600

300 µs

RMS forward current

T(RMS)

TAV

180° sine

average forward current

(di/dt)

cr

A/µs

150repetitive, I =T

VJ

= 125°C; f = 50 Hz

critical rate of rise of current

V

GT

gate trigger voltage V= 6 V T = °C25

(dv/dt) T=125°C

critical rate of rise of voltage

A/µs500

V/µs

t = µs;

IA;V = ⅔ V

R = ∞; method 1 (linear voltage rise)

VJ

DVJ

135 A

T

P

G

=0.3

di /dt A/µs;

G

=0.3

DDRM

cr

V = ⅔ V

D DRM

GK

1000

1.5 V

T= °C-40

VJ

I

GT

gate trigger current V= 6 V T = °C25

DVJ

80 mA

T= °C-40

VJ

1.6 V

200 mA

V

GD

gate non-trigger voltage T= °C

VJ

0.2 V

I

GD

gate non-trigger current 10 mA

V = ⅔ V

D DRM

125

latching current T= °C

VJ

150 mAI

L

25tµs

p

=10

IA;

G

= 0.3 di /dt A/µs

G

=0.3

holding current T= °C

VJ

100 mAI

H

25V= 6 V

D

R = ∞

GK

gate controlled delay tim e T= °C

VJ

2µst

gd

25

IA;

G

= 0.3 di /dt A/µs

G

=0.3

V = ½ V

D DRM

turn-off time T= °C

VJ

150 µst

q

di/dt = A/µs;15 dv/dt = V/µs;20

V =

R

100 V; I A;

T

=45 V = ⅔ V

D DRM

tµs

p

= 200

non-repet., I = 45 A

T

150

R

thCH

thermal resistance case to heatsink K/W

Thyristor

1700

RRM/DRM

RSM/DSM

max. non-repetitive reverse/forward blocking voltage

max. re pe titive reverse/forward bl ocking volt a ge

R/D

reverse current, drain current

T

R/D

200

0.25

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified

CS45-16io1

Ratings

000000

YYWWZ

Logo

Part Number

DateCode

Assembly Code

abcdef

Product Marking

Assembly Line

CS45-12io1 TO-247AD (3) 1200

Package

T

VJ

°C

M

D

Nm1.2

mounting torque 0.8

T

stg

°C150

storage temperature -55

Weight g6

Symbol Definition typ. max.min.Conditions

virt ua l j un ctio n temp eratu re

Unit

F

C

N120

mount ing for ce w i th cli p 20

I

RMS

RMS current 70 A

per terminal

150-40

CS45-16io1R ISOPLUS247 (3) 1600

TO-247

Similar Part Package Voltage class

CS45-08io1 TO-247AD (3) 800

Delivery Mode Quantity Code No.Part Number Marking on ProductOrdering

CS45-16io1 467693Tube 30CS45-16io1Standard

threshold voltage V0.88

mΩ

V

0 max

R

0 max

slope resistance * 8.5

Equivalent Circuits for Simulation

T =

VJ

IV

0

R

0

Thyristor

150°C

* on die level

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified

CS45-16io1

S

ØPØ P1 D2

D1

E1

4

123

L

L1

2x b2

3x b

b4

2x e

2x E2

D

E

Q

AA2

A1

C

Sym. Inches Millimeter

min. max. min. max.

A 0.185 0.209 4.70 5.30

A1 0.087 0.102 2.21 2.59

A2 0.059 0.098 1.50 2.49

D 0.819 0.845 20.79 21.45

E 0.610 0.640 15.48 16.24

E2 0.170 0.216 4.31 5.48

e 0.215 BSC 5.46 BSC

L 0.780 0.800 19.80 20.30

L1 - 0.177 - 4.49

Ø P 0.140 0.144 3.55 3.65

Q 0.212 0.244 5.38 6.19

S 0.242 BSC 6.14 BSC

b 0.039 0.055 0.99 1.40

b2 0.065 0.094 1.65 2.39

b4 0.102 0.135 2.59 3.43

c 0.015 0.035 0.38 0.89

D1 0.515 - 13.07 -

D2 0.020 0.053 0.51 1.35

E1 0.530 - 13.45 -

Ø P1 - 0.29 - 7.39

2 1

3

Outlines TO-247

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified

CS45-16io1

0.01 0.1 1

200

250

300

350

400

450

0.5 1.0 1.5 2.0

0

20

40

60

80

100

10

0

10

1

10

2

10

3

10

4

0.0

0.1

0.2

0.3

0.4

ITSM

[A]

IT

[A]

VT [V]

t[ms]

ZthJC

[K/W]

23456789011

100

1000

10000

I2t

[A2s]

t[ms]

IT(AV)M

[A]

TC[°C]

0 255075100125150

0

20

40

60

80

Fig. 1 Forward characteristics Fig. 3 I2t versus time (1-10 ms)

t[s]

Fig. 6 Max. forward current

at case temperature

Fig. 2 Surge overload current

Fig. 8 Transient thermal impedance

T

VJ

= 25°C

T

VJ

= 125°C

T

VJ

=45°C

50 Hz, 80% V

RRM

T

VJ

=125°C

T

VJ

= 45°C

V

R

=0 V

125°C

150°C

02040

0

20

40

60

80

IF(AV) [A]

P(AV)

[W]

Fig. 7a Power dissipation versus direct output current

Fi

g

. 7b and ambient tem

p

erature

0 50 100 150

Tamb [°C]

dc =

1

0.5

0.4

0.33

0.17

0.08

10 100 1000

1

10

100

1000

1 10 100 1000 10000

0.1

1

10

IG[mA]

VG

[V]

4: P

GAV

=0.5W

5: P

GM

=1W

6: P

GM

=10W

tgd

[μs]

IG[mA]

typ. Limit

T

VJ

=125°C

Fig. 4 Gate trigger characteristics Fig. 5 Gate controlled delay time

6

4

5

2

1

3

1: I

GD

,T

VJ

=150°C

2: I

GT

,T

VJ

=25°C

3: I

GT

,T

VJ

=-40°C

R

thHA

0.6

0.8

1.0

2.0

4.0

8.0

dc =

1

0.5

0.4

0.33

0.17

0.08

R

thi

[K/W] t

i

[s]

0.044 0.011

0.039 0.0001

0.047 0.02

0.09 0.4

0.18 0.12

Thyristor

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified