Description
Features
Internal Block Digram
1
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from a single power supply over a wide range of voltages. Operation from split power supplies is also possible
and the low power supply curr
- -AND relationships.
collector outputs to achieve wired
The LM339 consists of four independent voltage comparators. These were designed specifically to operate
outputs can be connected to other open
ent drain is independent of the magnitude of the power supply voltage. The
Wide supply voltage range
Low supply current drain independent of supply voltage.
Low input biasing current
Low input offset current
Low input offset voltage
Input common-mode voltage range includes GND
Differential input voltage range equal to the power supply voltage
Low output saturation voltage
Output voltage compatible with TTL, MOS and CMOS logic
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§
§
§
§
§
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14
1
14 1
DIP - 14
SOP 14
PIN CONNECTIONS
3
2
1
*
)
*
)
1
2
3
4
5
6
7
14
8
9
10
11
12
13
Output 2
– Input 1
Output 1
Output 3
Output 4
+ Input 1
– Input 2
+ Input 2
+ Input 4
– Input 4
+ Input 3
– Input 3
VCC Gnd
)
*
)
*
4
(Top View)
symbol (each comparator)
OUT
IN–
IN+
Package
LM339
Absolute Maximum Ratings
2
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Parameter Value
VCC Single Supply
Split Supplies
36
±18
V
V36 V
V-0.3 to VCC V
tSShort-Circuit duration of Output 100 ms
50 mA
TPlastic Package 150 °C
Tstg Storage Temperature -65 to +150 °C
TLLead Temperature, 1mm from Case for 10 Seconds 260 °C
PD
A=+25 °C
Plastic Package
°C
1.0
8.0
W
m°C
*
restricted to the Recommended Operating Conditions.
1.
2. VIN
Supply Voltages
Power
IN
VCC=5V, ÒA=25
PARAMETER
TEST CONDITIONS MIN
TYP
MAX
UNIT
Response time
RL connected to 5V through
100-mV input step with 5 -mV overdrive
1.3 µ
s
5.1k,
CL
=15pF* (See Note ) TTL-level input step 0.3
* C L
includes probe and jig capacitance.
NOTE : The response time specified is the interval between the input step function and the instant when the output
crosses 1.4V.
Switching Characteristics
may occur.
device
Maximum Ratings are those values which damage to the
V
Split Supplies.
Power
<-0.3V.
Notes:
CR
I
DR
I
Power Dissipation T
Derate 25
Above
beyond
°C
Functional operation should be
Symol
Input Differential Voltage Range
Common Mode Voltage Range (1)
Input
Current, per pin (2)
Temperature
Input
Junction
LM339
UNIT
W/
3
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Ele ctrical Characteristics
at specified free -air temperature, V CC
PARAMETER TEST CONDITIONS* MIN
TYP
MAX
UNIT
VIO
VCC =5V to 30V 25 2 5 mV
Input offset voltage VIC = VICRmin
, VO=1.4V Full range 9
llO
VO=1.4V 25 5 50 nA
Input offset current Full range 150
IIB
VO=1.4V 25 -25 -250
nA
Input bias current Full range -400
VICR
25 0 to
Vcc-1.5
V
Common -mode input voltage range** Full range 0 to
Vcc-2
AVD
Large -signal differential voltage
amplification
VCC=15V, VO=1.4V to 11.4V,
RL 15k to VCC 25 50 200 V/mV
IOH
VOH=5V, V ID=1V 25 0.1 50 nA
High -level output current VOH=30V, VID=1V Full range 1 µA
VOL
IOL=4mA, VID= -1V 25 150 400 mV
Low-level output voltage Full range 700
IOL
Low-level output current VOL=1.5V, VID= -1V 25 6 mA
ICC
RL= VCC=5V 25 0.8 2 mA
Supply current VCC=30V Full range 2.5
to 70 -mode
** The voltage at either input or common -mode should not be allowed to go negative by more than 0.3 V. The upper
end of the common -mode voltage range is VCC -1.5 V, but either or both inputs can go to 30 V without damage.
= 5V (unless otherwise noted)
. All characteristics are measured with zero common
oC
oC
oC
oC
oC
oC
oC
oC
oC
oCoCinput voltage unless
otherwise specified.
* Full range (MIN to ), for the LM339 is 0
MAX
LM339
4
BEIJING ESTEK ELECTRONICS CO.,LTD
Typical Performance Characteristics
(VCC =1.5V, TA=+25°C (each comparator))
Figure 1. Normalized Input Offset Voltage Figure 2. Input Bias Current
Figure 3. Output Sink Current versus
Output Saturation Voltage
1.40
LM339
5BEIJING ESTEK ELECTRONICS CO.,LTD
Typical Applications Circuit
with Hystersis with Hysteresis
V
ref
= V
CC
R1
R
ref
+ R1
R2
R1 / / Rref
Amount of Hysteresis
VH
V
H
= R2
R2 + R3 [(V
O(max)
-V
O(min)]
V
ref
V
CC
R1
R
ref
+ R1
R1 / / Rref
/ / R2
VH
= R1 / / R
ref
R1/ / Rref
+ R2 [V
O(max)
-V
O(min)]
Rref / / /R1
+ V
CC
Vin
V
ref
+ V
CC
+ VCC
V
in
V
ref
R
ref
R
ref
±
+
±
+VO
V
O
10k R1
R2
R3
10 k
1.0 M
R3
R2
1.0 M
10 k
R1
10 k
10 k
Figure Driving Logic
Logic Device
VCC
(V)
RL
k
CMOS
TTL
1/4 MC14001
1/4 MC7400
+15
+5.0
100
10
R
S
= Source Resistance
R1
R
S
T1 = T2 = 0.69 RC
f
=
7.2
C(
µ
F)
R2 = R3 = R4
R2 // R3 // R4
±
+
+
±
VCC
V
in
Vref
V
CC
.
4.0 V
V
CC
+
C
330 k
R4 330 k
R3
R1
100 k10 k
R1
T1 T2
V
CC
V
O
R
SR
L
R2
330 k
Figure 1. Inverting Comparator
1
Figure . Noninverting Comparator
2
3.
Figure . Squarewave Oscillator
4
LM339
6
BEIJING ESTEK ELECTRONICS CO.,LTD
10
. Zero Crossing Detector
(Single Supply)
Figure 5 Figure 6. Zero Crossing Detector
(Split Supplies)
V
in(min)
0.4 V Peak for 1% phase distortion
(
∆Θ
).
R1 + R2 = R3
R3
3
R5 for small error in zero crossing
Vin
10 k
D1
R1
8.2 k
6.8 k
R2
15 k
R3
+15 V
Θ
VCC
10 k
V
in VEE
V
in V
in(min)
V
CC
V
O
V
EE
∆Θ
Θ
10 M
R5
220 k
R4
220 k
V
O
V
O
+
D1 prevents input from going negative by more than 0.6 V
Ordering Information
REV No:01-060818
PACKAG E MARKINGORDERING NUMBER
LM339M LM339
SOP-14 / DIP-14
LM339
Postalcode:100039
Http://www.estek.com.cn
Tel: 86-010-58895780 / 81 / 82 / 83 / 84 Fax : 010-58895793
Email:sales@estek.com.cn
Rm 6A07,Changyin Office Building ,No.88,Yong Ding Road,Hai Dian District ,Beijing
Address : 6A06--6A07