S-19405 Series
AUTOMOTIVE, 125°C OPERATION,
3.8 μA CURRENT CONSUMPTION
WATCHDOG TIMER WITH RESET FUNCTION
www.ablic.com
© ABLIC Inc., 2017-2020 Rev.1.4_00
1
The S-19405 Series is a watchdog timer developed using CMOS technology, which can operate with low current
consumption of 3.8 μA typ. The reset function and the low voltage detection function are available.
ABLIC Inc. offers FIT rate calculated based on actual customer usage conditions in order to support customer functional
safety design.
For more information regarding our FIT rate calculation, contact our sales representatives.
Caution This product can be used in vehicle equipment and in-vehicle equipment. Before using the product for
these purposes, it is imperative to contact our sales representatives.
Features
• Detection voltage: 2.0 V to 5.0 V, selectable in 0.1 V step
• Detection voltage accuracy: ±2.0%
• Input voltage: VDD = 0.9 V to 6.0 V
• Hysteresis width: 5% typ.
• Current consumption during watchdog timer operation: 3.8 μA typ.
• Reset time-out period: 14.5 ms typ. (CPOR = 2200 pF)
• Watchdog time-out period: 24.6 ms typ. (CWDT = 470 pF)
• Watchdog operation is switchable: Enable, Disable
• Watchdog operation voltage range: VDD = 2.5 V to 6.0 V
• Watchdog input edge is selectable: Rising edge, falling edge
• Operation temperature range: Ta = −40°C to +125°C
• Lead-free (Sn 100%), halogen-free
• AEC-Q100 qualified*1
*1. Contact our sales representatives for details.
Applications
• For automotive use (engine, transmission, suspension, ABS, related-devices for EV / HEV / PHEV, etc.)
Packages
• TMSOP-8
• HSNT-8(2030)
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
2
Block Diagrams
1. S-19405 Series A / B Type
CWDT
WDT circuit
Voltage detection
circuit
Reference
voltage circuit
VDD
VSS
CPOR
WDO
W
EN Noise
filter
WDI Noise
filter
RST
Figure 1
2. S-19405 Series D / E Type
CWDT
WDT circuit
Voltage detection
circuit
Reference
voltage circuit
VDD
VSS
CPOR
WDO
W
EN Noise
filter
WDI Noise
filter
RST
Figure 2
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
3
3. S-19405 Series G / H Type
CWDT
WDT circuit
Voltage detection
circuit
Reference
voltage circuit
VDD
VSS
CPOR
WDO
W
EN Noise
filter
WDI Noise
filter
RST
Figure 3
4. S-19405 Series J / K Type
CWDT
WDT circuit
Voltage detection
circuit
Reference
voltage circuit
VDD
VSS
CPOR
WDO
W
EN Noise
filter
WDI Noise
filter
RST
Figure 4
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
4
AEC-Q100 Qualified
This IC supports AEC-Q100 for the operation temperature grade 1.
Contact our sales representatives for details of AEC-Q100 reliability specification.
Product Name Structure
Users can select the product type, detection voltage, and package type for the S-19405 Series. Refer to
"1. Product name" regarding the contents of product name, "2. Product type list" regarding the product types,
"3. Packages" regarding the package drawings.
1. Product name
S-19405 x xx A - xxxx U 4
Package abbreviation and IC packing specifications*1
K8T2: TMSOP-8, Tape
A8T1: HSNT-8(2030), Tape
Detection voltage
20 to 50
(e.g., when the detection voltage is 2.0 V, it is expressed as 20.)
Environmental code
U: Lead-free (Sn 100%), halogen-free
Operation temperature
A: Ta = −40°C to +125°C
Product type*2
A, B, D, E, G, H, J, K
*1. Refer to the tape drawing.
*2. Refer to "2. Product type list".
2. Product type list
Table 1
Product Type WEN Pin Logic Constant Current Source Pull-down
for WEN Pin Input Edge Output Pull-up
Resistor
A Active "H" Available Rising edge Available
B Active "H" Available Falling edge Available
D Active "L" Unavailable Rising edge Available
E Active "L" Unavailable Falling edge Available
G Active "H" Available Rising edge Unavailable
H Active "H" Available Falling edge Unavailable
J Active "L" Unavailable Rising edge Unavailable
K Active "L" Unavailable Falling edge Unavailable
3. Packages
Table 2 Package Drawing Codes
Package Name Dimension Tape Reel Land
TMSOP-8 FM008-A-P-SD FM008-A-C-SD FM008-A-R-SD
−
HSNT-8(2030) PP008-A-P-SD PP008-A-C-SD PP008-A-R-SD PP008-A-L-SD
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
5
Pin Configurations
1. TMSOP-8
7
6
5
8
2
3
4
1
Top view
Figure 5
Table 3
Pin No. Symbol Description
1 RST
_
_____
_
Reset output pin
2 CPOR Reset time-out adjustment pin
3 CWDT Watchdog time-out period adjustment pin
4 VSS GND pin
5 WEN Watchdog enable pin
6
WDO
_
______
_
Watchdog output pin
7 WDI Watchdog input pin
8 VDD Voltage input pin
2. HSNT-8(2030)
81
54
Top view
Bottom view
18
45
*1
Figure 6
Table 4
Pin No. Symbol Description
1 RST
_
_____
_
Reset output pin
2 CPOR Reset time-out adjustment pin
3 CWDT Watchdog time-out period adjustment pin
4 VSS GND pin
5 WEN Watchdog enable pin
6 WDO
_
______
_
Watchdog output pin
7 WDI Watchdog input pin
8 VDD Voltage input pin
*1. Connect the heat sink of backside at shadowed area to the board, and set electric potential GND.
However, do not use it as the function of electrode.
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
6
Pin Functions
Refer to " Operations" for details.
1. RST
________
pin
This is a reset output pin. It outputs "L" when detecting a low voltage.
Be sure to connect an external pull-up resistor (RextR) to the RST
_______
pin in the product without an output pull-up
resistor.
2. WDO
_________
pin
This is the watchdog output (time-out detection) pin.
Be sure to connect an external pull-up resistor (RextW) to the WDO
________
pin in the product without an output pull-up
resistor. Table 5 shows the WDO
________
pin and RST
_______
pin output statuses.
Table 5
Operation Status WDO
_
______
_
Pin RST
_
_____
_
Pin
Normal operation "H" "H"
Low voltage detection "L" "L"
Time-out detection "L" "H"
When watchdog timer is in Disable "H" "H"
3. CPOR pin
This is a pin to connect an adjustment capacitor for reset time-out period (CPOR) in order to generate the reset
time-out period (tRST). CPOR is charged and discharged by an internal constant current circuit, and the
charge-discharge duration is tRST.
Refer to " Recommended Operation Conditions" and consider variation of CPOR to select an appropriate CPOR.
tRST is calculated by using the following equation.
tRST [ms] = CPOR delay coefficient × CPOR [nF] + tRST0 [ms]
Table 6
Item Min. Typ. Max.
CPOR delay coefficient 3.9 6.5 9.1
tRST0 [ms] 0.0 0.2 0.6
4. CWDT pin
This is a pin to connect an adjustment capacitor for watchdog time-out period (CWDT) in order to generate the
watchdog time-out period (tWDU). CWDT is charged and discharged by an internal constant current circuit.
Refer to " Recommended Operation Conditions" and consider variation of CWDT to select an appropriate CWDT.
tWDU is calculated by using the following equation.
tWDU [ms] = CWDT delay coefficient 1 × CWDT [nF] + tWDU0 [ms]
Table 7
Item Min. Typ. Max.
CWDT delay coefficient 1 30 50 70
tWDU0 [ms] 0.0 1.1 3.0
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
7
5. WEN pin
This is a pin to switch Enable / Disable of the watchdog timer.
The voltage detection circuit independently operates at all times regardless of the watchdog timer operation.
In addition, the WEN pin has a noise filter. When the power supply voltage is 5.0 V, noise with a minimum pulse
width of 200 ns can be eliminated.
5. 1 S-19405 Series A / B / G / H type (WEN pin logic active "H" product)
The watchdog timer goes to Enable if the input is "H", and the charge-discharge operation is performed at the
CWDT pin.
The WEN pin is connected to a constant current source (0.3 μA typ.) and is pulled down internally.
5. 2 S-19405 Series D / E / J / K type (WEN pin logic active "L" product)
The watchdog timer goes to Enable if the input is "L", and the charge-discharge operation is performed at the
CWDT pin.
The WEN pin is not pulled down internally.
6. WDI pin
This is an input pin to receive a signal from the monitored object. By inputting an edge at an appropriate timing, the
WDI pin confirms the normal operation of the monitored object.
The WDI pin is connected to a constant current source (0.3 μA typ.) and is pulled down internally.
If the WEN pin is in Disable after the initialization and reset release are performed subsequent to the power supply
voltage rise, the WDI pin will be able to receive input signals after the WEN pin goes to Enable and then the input
setup time (tiset) elapses.
In addition, the WDI pin has a noise filter. When the power supply voltage is 5.0 V, noise with a minimum pulse
width of 200 ns can be eliminated.
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
8
Absolute Maximum Ratings
Table 8
(Ta = −40°C to +125°C unless otherwise specified)
Item Symbol Absolute Maximum Rating Unit
VDD pin voltage VDD VSS − 0.3 to VSS + 7.0 V
WDI pin voltage VWDI VSS − 0.3 to VDD + 0.3 ≤ VSS + 7.0 V
WEN pin voltage VWEN VSS − 0.3 to VDD + 0.3 ≤ VSS + 7.0 V
CPOR pin voltage VCPOR VSS − 0.3 to VDD + 0.3 ≤ VSS + 7.0 V
CWDT pin voltage VCWDT VSS − 0.3 to VDD + 0.3 ≤ VSS + 7.0 V
RST
_______
pin voltage A / B / D / E type VRST
_______ VSS − 0.3 to VDD + 0.3 ≤ VSS + 7.0 V
G / H / J / K type VSS − 0.3 to VSS + 7.0 V
WDO
________
pin voltage A / B / D / E type VWDO
________ VSS − 0.3 to VDD + 0.3 ≤ VSS + 7.0 V
G / H / J / K type VSS − 0.3 to VSS + 7.0 V
Operation ambient temperature Topr −40 to +125 °C
Storage temperature Tstg −40 to +150 °C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
Thermal Resistance Value
Table 9
Item Symbol Condition Min. Typ. Max. Unit
Junction-to-ambient thermal
resistance*1 θJA
TMSOP-8
Board A − 160 − °C/W
Board B − 133 − °C/W
Board C − − − °C/W
Boa
r
d D − − − °C/W
Board E − − − °C/W
HSNT-8(2030)
Board A − 181 − °C/W
Board B − 135 − °C/W
Board C − 40 − °C/W
Board D − 42 − °C/W
Board E − 32 − °C/W
*1. Test environment: compliance with JEDEC STANDARD JESD51-2A
Remark Refer to " Power Dissipation" and "Test Board" for details.
Recommended Operation Conditions
Table 10
Item Symbol Condition Min. Typ. Max. Unit
VDD pin voltage VDD Voltage detection circuit 0.9 − 6.0 V
Watchdog timer circuit 2.5 − 6.0 V
Set detection voltage −VDET(S) 0.1 V step 2.0 − 5.0 V
External pull-up resistor
for RST
_______
pin RextR G / H / J / K type 10 100 − kΩ
External pull-up resistor
for WDO
________
pin RextW G / H / J / K type 10 100 − kΩ
Adjustment capacitance
for reset time-out period CPOR − 0.1 2.2 1000 nF
Adjustment capacitance
for watchdog time-out period CWDT − 0.1 0.47 1000 nF
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
9
Electrical Characteristics
Table 11 (1 / 2)
(WEN pin logic active "H" product, VDD = 5.0 V, Ta = −40°C to +125°C unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Circuit
Detection voltage*1 −VDET − −VDET(S)
× 0.98 −VDET(S) −VDET(S)
× 1.02 V 1
Hysteresis width VHYS − −VDET
× 0.03
−VDET
× 0.05
−VDET
× 0.07 V 1
Current consumption during
watchdog timer operation ISS1 V
WEN = VDD − 3.8 9.0
μA 2
Current consumption during
watchdog timer stop ISS2 V
WEN = 0 V − 2.7 7.0
μA 2
Reset output voltage "H" VROH Only A / B / D / E type VDD − 1.0 − −
V 4
Reset output voltage "L" VROL
External pull-up resistor of 100 k
Ω
is
connected for G / H / J / K type
− −
0.4 V 5
Reset output pull-up
resistance RRUP Only A / B / D / E type 2.0 5.88 12.5 MΩ −
Reset output current IROUT V
DS = 0.4 V
VDD = 1.5 V 0.48 1.1 − mA 6
VDD = 1.8 V 0.8 1.6 − mA 6
VDD = 2.5 V 1.0 2.6 − mA 6
VDD = 3.0 V 1.4 3.3 − mA 6
Reset output leakage current IRLEAK V
DS = 6.0 V, VDD = 6.0 V − −
0.096 μA 7
Watchdog output voltage "H" VWOH Only A / B / D / E type VDD − 1.0 − −
V 8
Watchdog output voltage "L" VWOL
External pull-up resistor of 100 k
Ω
is
connected for G / H / J / K type
− −
0.4 V 9
Watchdog output pull-up
resistance RWUP Only A / B / D / E type 2.0 5.88 12.5 MΩ −
Watchdog output current IWOUT V
DS = 0.4 V
VDD = 1.5 V 0.48 1.1 − mA 10
VDD = 1.8 V 0.8 1.6 − mA 10
VDD = 2.5 V 1.0 2.6 − mA 10
VDD = 3.0 V 1.4 3.3 − mA 10
Watchdog output leakage
current IWLEAK V
DS = 6.0 V, VDD = 6.0 V − −
0.096 μA 11
Input pin voltage 1 "H" VSH1 WEN pin 0.7 × VDD − −
V 12
Input pin voltage 1 "L" VSL1 WEN pin − − 0.3 × VDD V 12
Input pin voltage 2 "H" VSH2 WDI pin 0.7 × VDD − −
V 12
Input pin voltage 2 "L" VSL2 WDI pin − − 0.3 × VDD V 12
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
10
Table 11 (2 / 2)
(WEN pin logic active "H" product, VDD = 5.0 V, Ta = −40°C to +125°C unless otherwise specified)
Item Symbol Condition Min. Typ. Max. Unit
Test
Circuit
Input pin current 1 "H" ISH1
WEN pin,
VDD = 6.0 V,
Input pin voltage = 6.0 V
A / B / G /
H type − 0.3 1.0
μA 12
D / E / J /
K type −0.1 − 0.1 μA 12
Input pin current 1 "L" ISL1 WEN pin, VDD = 6.0 V,
Input pin voltage = 0 V −0.1 − 0.1 μA 12
Input pin current 2 "H" ISH2 WDI pin, VDD = 6.0 V,
Input pin voltage = 6.0 V − 0.3 1.0
μA 12
Input pin current 2 "L" ISL2 WDI pin, VDD = 6.0 V,
Input pin voltage = 0 V −0.1 − 0.1 μA 12
Input pulse width "H"*2 t
high1 Timing Diagram 1 1.5 − − μs 13
Input pulse width "L"*2 t
low1 Timing Diagram 1 1.5 − − μs 13
Reset time-out period tRST CPOR = 2200 pF,
Timing Diagram 2, 5 8.7 14.5 20 ms 3
Watchdog time-out period tWDU CWDT = 470 pF,
Timing Diagram 4, 5 15 24.6 34 ms 3
Watchdog output delay
time tWOUT Timing Diagram 2, 3-2 − 25 40
μs 3
Reset output delay time tROUT Timing Diagram 2, 3-1 − 25 40
μs 3
Input setup time tiset Timing Diagram 4 1.0 − − μs 3
*1. −VDET: Actual detection voltage, −VDET(S): Set detection voltage
*2. Inputs to the WEN pin and the WDI pin should be greater than or equal to the min. value specified in " Electrical
Characteristics".
Timing Diagrams on Electrical Characteristics
(1) Timing Diagram 1
t
high1
t
low1
V
SH2
V
SH2
V
SL2
V
SL2
W
EN
WDI
t
high1
t
low1
V
SH1
V
SH1
V
SL1
V
SL1
Figure 7 Input Pulse Width
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
11
(3) Timing Diagram 3-1 (4) Timing Diagram 3-2
VDD
-V
DET
V
CPU
V
CPL
RST
V
ROL
CPO
R
Δt
1*3
t
ROUT
VDD
-V
DET
V
CWU
V
CWL
WDO,
RST
V
WOL
,V
ROL
CWDT
Δt
2*3
t
WOUT
, t
ROUT
Figure 9
V
DD
Falling during CPOR Pin Charge Operation
Figure 10
V
DD
Falling during CWDT Pin Charge Operation
*1. The CPOR pin voltage fall delay time (Δt) is sufficiently small compared to the reset time-out period (tRST).
*2. The time (ΔtRST) the CPOR pin voltage (VCPOR) reaches the CPOR charge lower limit threshold (VCPL) from 0 V is
proportional to the adjustment capacitance for reset time-out period (CPOR). Thus, large CPOR results in large ΔtRST.
Refer to "12. Initialization time (tINIT) vs. Power supply voltage rise time (tr)" in " Characteristics (Typical
Data)".
*3. CPOR pin voltage forced fall delay time (Δt1) and the CWDT pin voltage forced fall delay time (Δt2) is sufficiently small
compared to tRST in Timing Diagram 2.
Remark VCPU: CPOR charge upper limit threshold (1.25 V typ.), VCPL: CPOR charge lower limit threshold (0.20 V typ.)
VCWU: CWDT charge uppe
limit th
r
eshold (1.25 V typ.), VCWL: CWDT charge lower limit threshold (0.20 V typ.)
(2) Timing Diagram 2
VDD
+V
DE
T
0 V
1234
V
CPU
CPOR
V
CPL
0 V
WDO, V
WOH
,V
ROH
RST
t
RST
t
WOUT
, t
ROUT
Δt
RST*2
Δt*
1
t
INIT
Figure 8
V
DD Rising
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
12
(5) Timing Diagram 4
V
SH1
V
SL1
12
V
CWU
V
CWL
t
iset
CWDT
WEN
31 32
･･･
Δt
*1
Δt
WDL*2
t
WDU
t
SH1
t
acp
Figu
r
e 11 Counter Reset due to
V
WEN
(6) Timing Diagram 5
1234
VCPU
VCPL
12
VCWU
VCWL
Δt*3 Δt*4
ΔtWDL ΔtRST
tRST
(Δt + ΔtWDL)*3tWDU
･･･
31 32
(Δt + ΔtRST)*4
CWDT
CPOR
Figu
r
e 12 Watchdog Time-out Detection
*1. CWDT pin voltage forced fall delay time (Δt) is sufficiently small compared to the watchdog time-out period (tWDU).
*2. The CWDT pin voltage rise delay time (tiset + ΔtWDL) is sufficiently small (less than 1%) compared to tWDU.
*3. The delay time (Δt + ΔtWDL) from when the CPOR pin voltage (VCPOR) falls to the CPOR charge lower limit threshold
(VCPL) to when the CWDT pin voltage (VCWDT) reaches the CWDT charge lower limit threshold (VCWL) is sufficiently
small (less than 1%) compared to tWDU.
*4. The delay time (Δt + ΔtRST) from when VCWDT falls to VCWL to when V
CPOR reaches VCPL is sufficiently small
(less than 5%) compared to reset time-out period (tRST).
Remark tiset: Input setup time (less than 1 μs)
The time from when VWEN exceeds VSH1 (tSH1) to when the WDI pin is able to receive input signals (tacp).
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
13
(7) Timing Diagram 6-1 (8) Timing Diagram 6-2
WDI
12
CWDT V
CWU
V
CWL
0 V
Δt
WDL*3
Δt
*1
WDI
12
CWDT V
CWU
V
CWL
0 V
Δt
*
2
Δt
WDL*3
Figure 13
V
WDI Rising Edge Figure 14
V
WDI Falling Edge
(9) Timing Diagram 6-3
WDI
*4
CWDT V
CWU
V
CWL
0 V
t
WDL2
Δt
WDL*3
t
WDL
Figure 15
V
WDI Rising o
r
Falling Edges
*1. The delay time (Δt) from the WDI pin voltage (VWDI) rising edge to the CWDT pin voltage (VCWDT) rising start is
sufficiently small (less than 1%) compared to tWDU in Timing Diagram 4 and 5.
*2. The delay time (Δt) from the VWDI falling edge to the VCWDT rising start is sufficiently small (less than 1%) compared to
tWDU in Timing Diagram 4 and 5.
*3. The time (ΔtWDL) VCWDT reaches VCWL from 0 V is proportional to the adjustment capacitance for watchdog time-out
period (CWDT). Thus, large CWDT results in large ΔtWDL.
*4. As indicated by the waveform illustrated with dashed lines, if VCWDT does not fall to 0 V when the VWDI rising or falling
edge is input, ΔtWDL may approach 0. Similar phenomena may occur in Timing Diagrams 6-1 to 6-3 as well.
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
14
Test Circuits
Refer to " Recommended Operation Conditions" when setting constants of external pull-up resistors (RextR, RextW)
and external capacitors (CPOR, CWDT).
(1) A / B / D / E type (2) G / H / J / K type
VDD
VSS
V
+
+
CPOR
CWDT
WDI
WEN
WDO
V
RST
VDD
VSS
V
+
+
CPOR
CWDT
WDI
WEN
WDO
V
RST
Figure 16 Test Circuit 1
VSS
A
CPOR
CWDT
WDI
WEN
WDO
VDD
+
RST
Figure 17 Test Circuit 2
(1) A / B / D / E type (2) G / H / J / K type
VSS
V
+
CPOR
CWDT
WDI
WEN
WDO
VDD
RST
VSS
V
+
CPOR
CWDT
WDI
WEN
WDO
VDD
RST
Figure 18 Test Circuit 3
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
15
VDD
VSS V+
CPOR
CWDT
WDI
WEN
WDO
RST
Figure 19 Test Circuit 4
(1) A / B / D / E type (2) G / H / J / K type
VDD
VSS V+
CPOR
CWDT
WDI
WEN
WDO
RST
VDD
VSS V+
CPOR
CWDT
WDI
WEN
WDO
RST
Figure 20 Test Circuit 5
VDD
VSS
A
CPOR
CWDT
WDI
WEN
WDO
RST +
VDD
VSS
A
CPOR
CWDT
WDI
WEN
WDO
RST +
Figure 21 Test Circuit 6 Figure 22 Test Circuit 7
VDD
VSS
V
CPOR
CWDT
WDI
WEN
WDO
+
RST
Figure 23 Test Circuit 8
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
16
(1) A / B / D / E type (2) G / H / J / K type
VDD
VSS
V
+
CPOR
CWDT
WDI
WEN
WDO
RST
VDD
VSS
V
+
CPOR
CWDT
WDI
WEN
WDO
RST
Figure 24 Test Circuit 9
VDD
VSS
A
CPOR
CWDT
WDI
WEN
WDO +
RST
VDD
VSS
A
CPOR
CWDT
WDI
WEN
WDO +
RST
Figure 25 Test Circuit 10 Figure 26 Test Circuit 11
(1) A / B / D / E type (2) G / H / J / K type
VDD
VSS
V
+
CPOR
CWDT
WEN, WDI
WDO
A
+RST
VDD
VSS
V
+
CPOR
CWDT
WEN, WDI
WDO
A
+RST
Figure 27 Test Circuit 12
(1) A / B / D / E type (2) G / H / J / K type
VDD
VSS
V
+
CPOR
CWDT
WEN, WDI
WDO
RST
VDD
VSS
V
+
CPOR
CWDT
WEN, WDI
WDO
RST
Figure 28 Test Circuit 13
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
17
Standard Circuits
1. S-19405 Series A / B / D / E type
WDO
RST
VDD
V
DD
WEN
WDI
C
POR*1, *3
C
WDT*2, *3
VSS CPOR CWDT
*1. Connect the adjustment capacitor for reset time-out period (CPOR) directly between the CPOR pin and
the VSS pin.
*2. Connect the adjustment capacitor for watchdog time-out period (CWDT) directly between the CWDT pin
and the VSS pin.
*3. A capacitor of 100 pF to 1 μF can be used for CPOR and CWDT. Even if the capacitance is within this range,
cautions are still needed when the value is extremely large. Refer to "1. Low voltage operation when CPOR
is extremely large" in " Precautions for Use".
Figure 29
2. S-19405 Series G / H / J / K type
WDO
RST
VDD
V
DD
WEN
WDI
C
POR*3, *5
C
WDT*4, *5
VSS CPOR CWDT
R
extW*1
R
extR*2
*1. R
extW is an external pull-up resistor for the WDO
________
pin.
*2. R
extR is an external pull-up resistor for the RST
_______
pin.
*3. Connect the adjustment capacitor for reset time-out period (CPOR) directly between the CPOR pin and
the VSS pin.
*4. Connect the adjustment capacitor for watchdog time-out period (CWDT) directly between the CWDT pin
and the VSS pin.
*5. A capacitor of 100 pF to 1 μF can be used for CPOR and CWDT. Even if the capacitance is within this range,
cautions are still needed when the value is extremely large. Refer to "1. Low voltage operation when CPOR
is extremely large" in " Precautions for Use".
Figure 30
Caution The above connection diagrams and constants will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constants.
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
18
Operations
1. Voltage detector circuit
1. 1 Basic operation
(1) When the power supply voltage (VDD) is release voltage (+VDET) of the detector or higher, the Nch transistor
(N2) is turned off and "H" is output to the RST
_______
pin. Since the Pch transistor (P1) is turned on,
the input voltage to the comparator (C1) is RB • VDD
RA + RB .
(2) Even if VDD decreases to +VDET or lower, "H" is output to the RST
_______
pin when VDD is the detection voltage (−VDET)
or higher. When VDD decreases to −VDET (point A in Figure 32) or lower, N2 which is controlled by C1 is turned
on, and then "L" is output to the RST
_______
pin. At this time, P1 is turned off, and the input voltage to C1 is
RB • VDD
RA + RB + RC .
(3) If VDD further decreases to the IC's minimum operation voltage or lower, the RST
_______
pin output is "H".
(4) When VDD increases to the IC's minimum operation voltage or higher, "L" is output to the RST
_______
pin. In addition,
even if VDD exceeds −VDET, the output is "L" when VDD is lower than +VDET.
(5) When VDD increases to +VDET (point B in Figure 32) or higher, N2 is turned off, and "H" is output to the RST
_______
pin after elapse of tINIT + tRST.
VDD
VSS
RST
_
______
−
+
Reference
voltage circuit
P1
N2
R
A
R
B
R
C
C1
Delay
circuit
Figure 31 Operation of Voltage Detector Circuit
Hysteresis width (V
HYS
)
A
B
V
DD
V
SS
Minimum operation voltage
RST
_
______
pin output,
WDO
_
_______
pin output
V
SS
(1) (2) (3) (5) (4)
Release voltage (+V
DET
)
Detection voltage (−V
DET
)
t
INIT
+ t
RST
Figure 32 Timing Chart of Voltage Detector Circuit
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
19
1. 2 From power-on to reset release
The S-19405 Series initiates the initialization if the VDD pin voltage exceeds the release voltage (+VDET).
The charge-discharge operation to the CPOR pin is initiated after the passage of the initialization time (tINIT), and
the WDO
________
pin output and the RST
_______
pin output change from "L" to "H" after the operation is performed 4 times.
Refer to Figure 33.
tINIT changes according to the power supply voltage rise time (tr). Refer to "12. Initialization time (tINIT) vs. Power
supply voltage rise time (tr)" in " Characteristics (Typical Data)" for the relation between tINIT and tr.
Power-on
End of
initialization Reset release
VDD
CPOR
0 V
1234
RST
WDO
Figure 33
1. 3 Operation of low voltage detection
The voltage detection circuit detects a low voltage if the power supply voltage falls below the detection voltage, and
then "L" is output from the WDO
________
pin and the RST
_______
pin. The output is maintained until the charge-discharge
operation of the CPOR pin is performed 4 times.
The S-19405 Series can detect a low voltage even if either the CPOR pin or the CWDT pin performs the
charge-discharge operation. In this case, no influence is exerted on the status of the WEN pi.
Low voltage
detection
VDD
CWDT
0 V
CPOR
1234
RST
WDO
End of initialization
Power-on
End of initialization
Low voltage
release Reset release Low voltage
detection
Figure 34
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
20
2. Watchdog timer
2. 1 From reset release to initiation of charge-discharge operation to CWDT pin
The charge-discharge operation to the CWDT pin differs depending on the status of the WEN pin at the reset release.
2. 1. 1 When WEN pin is in Enable at reset release
Since the watchdog timer is in Enable, the S-19405 Series initiates the charge-discharge operation to the CWDT
pin.
VDD
CWDT
WEN
0 V
CPOR
RST
WDO
Power-on
End of
initialization Reset release
Figure 35 WEN Pin = "H"
2. 1. 2 When WEN pin is in Disable at reset release
Since the watchdog timer is in Disable after the CPOR pin performs the charge-discharge operation 4 times, the
S-19405 Series does not initiate the charge-discharge operation to the CWDT pin. If the input to the WEN pin
changes to "H" in this status, the S-19405 Series initiates the charge-discharge operation to the CWDT pin.
VDD
CWDT
WEN
0 V
CPOR
(WDT )
(WDT )
RST
WDO
Power-on End of
initialization Reset release
Figure 36 WEN Pin = "L" → "H"
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
21
2. 2 Watchdog time-out detection
The watchdog timer detects a time-out after the charge-discharge operation to the CWDT pin is performed 32 times,
then the WDO
________
pin output changes from "H" to "L".
VDD
CWDT
WDI
0 V
CPOR
23451
2341
29 30 31 32
RST
WDO
Power-on
End of
initialization Reset release Watchdog
time-out
Reset
time-out
Figure 37
2. 3 Internal counter reset due to edge
When the WDI pin detects an edge during the charge-discharge operation to the CWDT pin, the internal counter
which counts the number of times of the charge-discharge operation is reset. The CWDT pin initiates the discharge
operation when an edge is detected and initiates the charge-discharge operation again after the discharge operation
is completed.
2. 3. 1 Counter reset due to rising edge
(S-19405AxxA, S-19405DxxA, S-19405GxxA, S-19405JxxA)
Rising edge
VDD
CWDT
WDI
0 V
CPOR
2345129 30 31 32
RST
WDO
Watchdog
time-out
Reset release
End of
initialization
Power-on
Figure 38
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
22
2. 3. 2 Counter reset due to falling edge
(S-19405BxxA, S-19405ExxA, S-19405HxxA, S-19405KxxA)
VDD
CWDT
WDI
0 V
CPOR
2345129 30 31 32
RST
WDO
Power-on
End of
initialization Reset release Falling edge Watchdog
time-out
Figure 39
2. 4 Counter reset due to WEN pin during the charge-discharge operation to CWDT pin
When the WEN pin changes from "H" to "L" during the charge-discharge operation to the CWDT pin, the CWDT pin
performs the discharge operation. In addition, the internal counter which counts the number of times of the
charge-discharge operation for the CWDT pin is also reset.
If the WEN pin changes to "H" again in this status, the CWDT pin initiates the charge-discharge operation.
Enable
VDD
CWDT
WEN
0 V
CPOR
3291 2 30 31 32
1234
RST
WDO
End of
initializationPower-on Reset release
Watchdog
time-out
Enable Enable
Disable Disable
Figure 40
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
23
Precautions for Use
A capacitor of 100 pF to 1 μF can be used for the adjustment capacitor for reset time-out period (CPOR) and the
adjustment capacitor for watchdog time-out period (CWDT). Even if the capacitance is within this range, cautions are still
needed when the value is extremely large.
1. Low voltage operation when CPOR is extremely large
When the S-19405 Series detects a low voltage during the CPOR charge-discharge operation, it will take time for
the CPOR discharge operation to be performed if CPOR is extremely large. Therefore, the discharge operation may
not be completed by the time the power supply voltage (VDD) exceeds the release voltage (+VDET). In this case,
since the charge-discharge operation is performed after the discharge operation is completed, a delay time of the
same length as the CPOR discharge operation time occurs by the time the reset time-out period (tRST) count starts.
V
DD
C
POR*1
C
POR*2
Low voltage detection
t
RST
+V
DET
*3
t
RST
V
CPL
V
CPL
*1. When the capacitance is sufficiently small.
*2. When the capacitance is extremely large.
*3. Delay time of the same length as the CPOR discharge operation time
Figure 41
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
24
2. Re-applying power supply
If the power supply voltage (VDD) falls to 0.9 V or lower, a standby status for 20 μs is required by the time low
voltage detection is released in order for the discharge operation of internal circuit to be performed fully. If an
appropriate amount of time is not secured for the standby status to be completed by the time the power supply is
re-applied, the initialization start will be delayed. For this reason, a delay time of the same length as the time until
the standby status has been completed occurs by the time the tRST count starts after the power supply rises.
2. 1 If the time from when VDD falls below 0.9 V to when it rises again is longer than 20 μs
V
DD
C
POR
t
RST
+V
DET
V
CPL
0.9 V
20
μ
s
Nomal operation Standby
t
INIT
Nomal operation
Figure 42
2. 2 If the time from when VDD falls below 0.9 V to when it rises again is shorter than 20 μs
V
DD
C
POR
t
RST
+V
DET
V
CPL
0.9 V
*1
20 μs
t
INIT
Standby
Nomal operation Nomal operation
*1. Delay time of the same length as the time until standby status at power-on has been completed
Figu
r
e 43
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
25
3. Low voltage detection at instantaneous voltage drop
In the S-19405 Series, when the period of 0.9 V ≤ VDD ≤ −VDET is shorter than 20 μs, the WDO
________
pin and the RST
_______
pin may not output a low voltage detection signal. Even in this case, the S-19405 Series carries out the
charge-discharge operation for CPOR in the same manner at power-on. For this reason, a delay time of the same
length as the CPOR charge-discharge operation time occurs by the time the tWDU count starts after the power
supply rises.
V
DD
C
POR
+V
DET
< 20
μ
s
−V
DET
C
WDT
WDO
RST
0.9 V
"H"
"H"
t
WDU
V
CWL
*
1
Undetection
Undetection
*1. Delay time of the same length as the CPOR discharge operation time (tINIT + tRST)
Figu
r
e 44
Precautions
• Since input pins (the WEN pin and the WDI pin) in the S-19405 Series are CMOS configurations, make sure that an
intermediate potential is not input when the S-19405 Series operates.
• Since the WDO
________
pin and the RST
_______
pin are affected by external resistance and external capacitance, use the
S-19405 Series after performing thorough evaluation with the actual application.
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• ABLIC Inc. claims no responsibility for any disputes arising out of or in connection with any infringement by
products including this IC of patents owned by a third party.
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
26
Characteristics (Typical Data)
1. Current consumption during watchdog timer stop (I
SS2
) vs.
Input voltage (V
DD
)
2. Current consumption during watchdog timer operation (I
SS1
) vs.
Input voltage (V
DD
)
WDT = OFF, −VDET(S) = 4.0 V, Ta = +25°C
024
0.0
31
5.0
56
3.0
2.0
1.0
I
SS2
[μA]
V
DD
[V]
4.0
WDT = ON, −VDET(S) = 4.0 V, WDI input
4.0 5.0 6.0
3.0
5.54.5 6.5
5.0
4.5
4.0
3.5
I
SS1
[μA]
V
DD
[V]
+°C
+°C− °C
3. Current consumption during watchdog timer operation (I
SS1
) vs.
Temperature (Ta)
4. Detection voltage (
−
V
DET
)
,
Release voltage
(
+
V
DET
)
vs. Temperature (Ta)
WDT = ON,
−
V
DET(S)
= 4.0 V, V
DD
= 5.0 V, WDI input
−25 0 25 50 75 100 125−40
0.0
5.0
Ta [°C]
4.0
3.0
2.0
1.0
I
SS1
[μA]
−VDET(S) = 4.0 V
−25 0 25 50 75 100 125−40
3.5
3.0
Ta [°C]
4.5
4.0
−V
DET
,+V
DET
[V]
+V
DET
−V
DET
5. Reset time-out period (t
RST
) vs. Temperature (Ta)
6. Watchdog time-out period (t
WDU
) vs. Temperature (Ta)
VDD = 5.0 V, CPOR = 2200 pF
−25 0 25 50 75 100 125−40
0
Ta [°C]
40
30
20
10
t
RST
[ms]
VDD = 5.0 V, CWDT = 470 pF
−25 0 25 50 75 100 125−40
0
Ta [°C]
40
30
20
10
t
WDU
[ms]
7. Reset output delay time (t
ROUT
) vs. Temperature (Ta) 8. Watchdog output delay time (t
WOUT
)
vs.
Temperature (Ta)
VDD = −VDET(S) + 1.0 V → −VDET(S) − 1.0 V,
CPOR = 2200 pF
−25 0 25 50 75 100 125−40
0
Ta [°C]
40
30
20
10
t
ROUT
[μs]
VDD = 5.0 V, CWDT = 470 pF
−25 0 25 50 75 100 125−40
0
Ta [°C]
40
30
20
10
t
WOUT
[μs]
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
Rev.1.4_00 S-19405 Series
27
9. Reset time-out period (tRST) vs. CPOR 10. Watchdog time-out period (tWDU) vs. CWDT
VDD = 5.0 V, Ta = +25°C
0.0001
t
RST
[s]
0.0001
C
POR
[μF]
10
0.01
0.1
10.001 0.10.01
0.001
1
VDD = 5.0 V, Ta = +25°C
0.0001
t
WDU
[s]
0.001
C
WDT
[μF]
0.1
1
10.001 0.10.01
0.01
10
11. Nch driver output current (I
WOUT
) vs. Input voltage (V
DD
)
12. Initialization time (t
INIT
) vs. Power supply voltage rise time (t
r
)
VDS = 0.4 V, −VDET(S) = 4.0 V
024
2.0
315
6.0
4.0
I
WOUT
[mA]
V
DD
[V]
+ °C
+ °C
− °C
0.0
VDD = VWEN = 0 V → 6 V, CPOR = 100 pF,
Ta = +25°C
100
10
1
0.1
0.01
t
INIT
[ms]
0.001 1000
0.01 0.1 1 10 100
t
r
[ms]
−
−−
AUTOMOTIVE, 125°C OPERATION, 3.8
μ
A CURRENT CONSUMPTION WATCHDOG TIMER WITH RESET FUNCTION
S-19405 Series Rev.1.4_00
28
Power Dissipation
0 25 50 75 100 125 150 175
0.0
0.2
0.4
0.6
0.8
1.0
Ambient temperature (Ta) [°C]
Power dissipation (P
D
) [W]
T
j
= +125°C max.
TMSOP-8
B
A
0 25 50 75 100 125 150 175
0
1
2
3
4
5
Ambient temperature (Ta) [°C]
Power dissipation (P
D
) [W]
T
j
= +125°C max.
HSNT-8(2030)
B
E
D
C
A
Board Power Dissipation (PD) Board Powe
r
Dissipation (PD)
A 0.63 W A 0.55 W
B 0.75 W B 0.74 W
C − C 2.50 W
D − D 2.38 W
E − E 3.13 W
(1)
1
2
3
4
(2)
1
2
3
4
Board B
Item Specification
Thermal via -
Material FR-4
Number of copper foil layer 4
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
Size [mm] 114.3 x 76.2 x t1.6
2
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
-
-
74.2 x 74.2 x t0.070
Thermal via -
Material FR-4
Board A
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Number of copper foil layer
ICMountArea
TMSOP-8 Test Board
No. TMSOP8-A-Board-SD-1.0
ABLIC Inc.
(1)
1
2
3
4
(2)
1
2
3
4
(3)
1
2
3
4
Thermal via Number: 4
Diameter: 0.3 mm
Number of copper foil layer 4
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
Board C
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Material FR-4
Board B
Item Specification
Thermal via -
Material FR-4
Number of copper foil layer 4
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
Size [mm] 114.3 x 76.2 x t1.6
2
Copper foil layer [mm]
Land pattern and wiring for testing: t0.070
-
-
74.2 x 74.2 x t0.070
Thermal via -
Material FR-4
Board A
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Number of copper foil layer
ICMountArea
HSNT-8(2030) Test Board
No. HSNT8-A-Board-SD-2.0
enlargedview
ABLIC Inc.
(4)
1
2
3
4
(5)
1
2
3
4
Thermal via Number: 4
Diameter: 0.3 mm
Number of copper foil layer 4
Pattern for heat radiation: 2000mm
2
t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.070
74.2 x 74.2 x t0.070
Thermal via -
Size [mm] 114.3 x 76.2 x t1.6
Material FR-4
Board D
Item Specification
Size [mm] 114.3 x 76.2 x t1.6
Material FR-4
Number of copper foil layer
Copper foil layer [mm]
Board E
Item Specification
4
Copper foil layer [mm]
Pattern for heat radiation: 2000mm
2
t0.070
74.2 x 74.2 x t0.035
74.2 x 74.2 x t0.035
ICMountArea
HSNT-8(2030) Test Board
No. HSNT8-A-Board-SD-2.0
enlargedview
enlargedview
ABLIC Inc.
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
2.90±0.2
85
0.2±0.1
0.65±0.1
0.13±0.1
14
TMSOP8-A-PKG Dimensions
No. FM008-A-P-SD-1.2
FM008-A-P-SD-1.2
mm
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
0.30±0.05
1.00±0.1
1.05±0.05
1.5
2.00±0.05
4.00±0.1
3.25±0.05
4.00±0.1
1
4
58
TMSOP8-A-Carrier Tape
Feed direction
No. FM008-A-C-SD-2.0
FM008-A-C-SD-2.0
+0.1
-0
mm
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
16.5max.
13.0±0.3
QTY. 4,000
(60°)
(60°)
13±0.2
Enlarged drawing in the central part
TMSOP8-A-Reel
No. FM008-A-R-SD-1.0
FM008-A-R-SD-1.0
mm
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
2.0±0.1
No. PP008-A-P-SD-2.0
0.5
0.23±0.1
(1.70)
mm
PP008-A-P-SD-2.0
The heat sink of back side has different electric
potential depending on the product.
Confirm specifications of each product.
Do not use it as the function of electrode.
0.08 +0.05
-0.02
HSNT-8-A-PKG Dimensions
14
5
8
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
No. PP008-A-C-SD-1.0
PP008-A-C-SD-1.0
HSNT-8-A-Carrier Tape
0.60±0.05
0.25±0.05
Feed direction
2.0±0.05
4.0±0.1
ø1.5
ø1.0
134
5
2
6
2.3±0.05
4.0±0.1
78
+0.1
-0
+0.1
-0
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
QTY.
No. PP008-A-R-SD-1.0
PP008-A-R-SD-1.0
HSNT-8-A-Reel
5,000
11.4±1.0
9.0
ø13±0.2
(60°) (60°)
Enlarged drawing in the central part
+1.0
- 0.0
No.
TITLE
UNIT
ANGLE
ABLIC Inc.
mm
PP008-A-L-SD-1.0
0.50
0.30
1.6
No. PP008-A-L-SD-1.0
HSNT-8-A
-Land Recommendation
Disclaimers (Handling Precautions)
1. All the information described herein (product data, specifications, figures, tables, programs, algorithms and
application circuit examples, etc.) is current as of publishing date of this document and is subject to change without
notice.
2. The circuit examples and the usages described herein are for reference only, and do not guarantee the success of
any specific mass-production design.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the reasons other than the products
described herein (hereinafter "the products") or infringement of third-party intellectual property right and any other
right due to the use of the information described herein.
3. ABLIC Inc. is not liable for any losses, damages, claims or demands caused by the incorrect information described
herein.
4. Be careful to use the products within their ranges described herein. Pay special attention for use to the absolute
maximum ratings, operation voltage range and electrical characteristics, etc.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by failures and / or accidents, etc. due to
the use of the products outside their specified ranges.
5. Before using the products, confirm their applications, and the laws and regulations of the region or country where they
are used and verify suitability, safety and other factors for the intended use.
6. When exporting the products, comply with the Foreign Exchange and Foreign Trade Act and all other export-related
laws, and follow the required procedures.
7. The products are strictly prohibited from using, providing or exporting for the purposes of the development of
weapons of mass destruction or military use. ABLIC Inc. is not liable for any losses, damages, claims or demands
caused by any provision or export to the person or entity who intends to develop, manufacture, use or store nuclear,
biological or chemical weapons or missiles, or use any other military purposes.
8. The products are not designed to be used as part of any device or equipment that may affect the human body, human
life, or assets (such as medical equipment, disaster prevention systems, security systems, combustion control
systems, infrastructure control systems, vehicle equipment, traffic systems, in-vehicle equipment, aviation equipment,
aerospace equipment, and nuclear-related equipment), excluding when specified for in-vehicle use or other uses by
ABLIC, Inc. Do not apply the products to the above listed devices and equipments.
ABLIC Inc. is not liable for any losses, damages, claims or demands caused by unauthorized or unspecified use of
the products.
9. In general, semiconductor products may fail or malfunction with some probability. The user of the products should
therefore take responsibility to give thorough consideration to safety design including redundancy, fire spread
prevention measures, and malfunction prevention to prevent accidents causing injury or death, fires and social
damage, etc. that may ensue from the products' failure or malfunction.
The entire system in which the products are used must be sufficiently evaluated and judged whether the products are
allowed to apply for the system on customer's own responsibility.
10. The products are not designed to be radiation-proof. The necessary radiation measures should be taken in the
product design by the customer depending on the intended use.
11. The products do not affect human health under normal use. However, they contain chemical substances and heavy
metals and should therefore not be put in the mouth. The fracture surfaces of wafers and chips may be sharp. Be
careful when handling these with the bare hands to prevent injuries, etc.
12. When disposing of the products, comply with the laws and ordinances of the country or region where they are used.
13. The information described herein contains copyright information and know-how of ABLIC Inc. The information
described herein does not convey any license under any intellectual property rights or any other rights belonging to
ABLIC Inc. or a third party. Reproduction or copying of the information from this document or any part of this
document described herein for the purpose of disclosing it to a third-party is strictly prohibited without the express
permission of ABLIC Inc.
14. For more details on the information described herein or any other questions, please contact ABLIC Inc.'s sales
representative.
15. This Disclaimers have been delivered in a text using the Japanese language, which text, despite any translations into
the English language and the Chinese language, shall be controlling.
2.4-2019.07
www.ablic.com