© Semiconductor Components Industries, LLC, 2008
March, 2008 - Rev. 8
1Publication Order Number:
2N6071/D
2N6071A/B Series
Preferred Device
Sensitive Gate Triacs
Silicon Bidirectional Thyristors
Designed primarily for full‐wave AC control applications, such as
light dimmers, motor controls, heating controls and power supplies; or
wherever full‐wave silicon gate controlled solid‐state devices are
needed. Triac type thyristors switch from a blocking to a conducting
state for either polarity of applied anode voltage with positive or
negative gate triggering.
Features
•Sensitive Gate Triggering Uniquely Compatible for Direct Coupling
to TTL, HTL, CMOS and Operational Amplifier Integrated Circuit
Logic Functions
•Gate Triggering: 4 Mode - 2N6071A, B; 2N6073A, B; 2N6075A, B
•Blocking Voltages to 600 V
•All Diffused and Glass Passivated Junctions for Greater Parameter
Uniformity and Stability
•Small, Rugged, Thermopad Construction for Low Thermal
Resistance, High Heat Dissipation and Durability
•Device Marking: Device Type, e.g., 2N6071A, Date Code
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MT1
G
MT2
http://onsemi.com
TRIACS
4.0 A RMS, 200 - 600 V
TO-225
CASE 077
STYLE 5
1
2
3
REAR VIEW
SHOW TAB
x = 1, 3, 5
y = A, B
Y = Year
WW = Work Week
G = Pb-Free Package
MARKING DIAGRAM
YWW
2N
607xyG
1. Cathode
2. Anode
3. Gate
Preferred devices are recommended choices for future use
and best overall value.
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
2N6071A/B Series
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2
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating Symbol Value Unit
*Peak Repetitive Off‐State Voltage (Note 1)
(TJ = *40 to 110°C, Sine Wave, 50 to 60 Hz, Gate Open)
2N6071A,B
2N6073A,B
2N6075A,B
VDRM,
VRRM
200
400
600
V
*On‐State RMS Current (TC = 85°C) Full Cycle Sine Wave 50 to 60 Hz IT(RMS) 4.0 A
*Peak Non-repetitive Surge Current (One Full cycle, 60 Hz, TJ = +110°C) ITSM 30 A
Circuit Fusing Considerations (t = 8.3 ms) I2t 3.7 A2s
*Peak Gate Power (Pulse Width ≤1.0 ms, TC = 85°C) PGM 10 W
*Average Gate Power (t = 8.3 ms, TC = 85°C) PG(AV) 0.5 W
*Peak Gate Voltage (Pulse Width ≤1.0 ms, TC = 85°C) VGM 5.0 V
*Operating Junction Temperature Range TJ-40 to +110 °C
*Storage Temperature Range Tstg -40 to +150 °C
Mounting Torque (6‐32 Screw) (Note 2) - 8.0 in. lb.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such
that the voltage ratings of the devices are exceeded.
2. Torque rating applies with use of a compression washer. Mounting torque in excess of 6 in. lb. does not appreciably lower case‐to‐sink thermal
resistance. Main terminal 2 and heatsink contact pad are common.
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
*Thermal Resistance, Junction-to-Case RqJC 3.5 °C/W
Thermal Resistance, Junction-to-Ambient RqJA 75 °C/W
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds TL260 °C
*Indicates JEDEC Registered Data.
2N6071A/B Series
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3
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted; Electricals apply in both directions)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
*Peak Repetitive Blocking Current
(VD = VDRM = VRRM; Gate Open) TJ = 25°C
TJ = 110°C
IDRM,
IRRM -
-
-
-
10
2
mA
mA
ON CHARACTERISTICS
*Peak On‐State Voltage (Note 3) (ITM = "6.0 A Peak) VTM - - 2 V
*Gate Trigger Voltage (Continuous DC), All Quadrants
(Main Terminal Voltage = 12 Vdc, RL = 100 W, TJ = -40°C)
VGT
- 1.4 2.5
V
Gate Non-Trigger Voltage, All Quadrants
(Main Terminal Voltage = 12 Vdc, RL = 100 W, TJ = 110°C)
VGD
0.2 - -
V
*Holding Current
(Main Terminal Voltage = 12 Vdc, Gate Open, Initiating Current = "1 Adc)
TJ = -40°C
TJ = 25°C
IH
-
-
-
-
30
15
mA
Turn‐On Time (ITM = 14 Adc, IGT = 100 mAdc) tgt - 1.5 - ms
QUADRANT
(Maximum Value)
Type IGT @ TJ
I
mA
II
mA
III
mA
IV
mA
Gate Trigger Current (Continuous DC)
(Main Terminal Voltage = 12 Vdc, RL = 100 W)
2N6071A
2N6073A
2N6075A
+25°C 5 5 5 10
-40°C 20 20 20 30
2N6071B
2N6073B
2N6075B
+25°C 3 3 3 5
-40°C 15 15 15 20
DYNAMIC CHARACTERISTICS
Critical Rate of Rise of Commutation Voltage
@ VDRM, TJ = 85°C, Gate Open, ITM = 5.7 A, Exponential Waveform,
Commutating di/dt = 2.0 A/ms
dv/dt(c) - 5 - V/ms
3. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
*Indicates JEDEC Registered Data.
Trigger devices are recommended for gating on Triacs. They provide:
1. Consistent predictable turn‐on points.
2. Simplified circuitry.
3. Fast turn‐on time for cooler, more efficient and reliable operation.
SAMPLE APPLICATION:
TTL‐SENSITIVE GATE 4 AMPERE TRIAC
TRIGGERS IN MODES II AND III
0 V
-VEE VEE = 5.0 V
MC7400
14
7
+
510
W
2N6071A LOAD
4
115 VAC
60 Hz
2N6071A/B Series
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4
+ Current
+ Voltage
VTM
IH
Symbol Parameter
VDRM Peak Repetitive Forward Off State Voltage
IDRM Peak Forward Blocking Current
VRRM Peak Repetitive Reverse Off State Voltage
IRRM Peak Reverse Blocking Current
Voltage Current Characteristic of Triacs
(Bidirectional Device)
IDRM at VDRM
on state
off state
IRRM at VRRM
Quadrant 1
MainTerminal 2 +
Quadrant 3
MainTerminal 2 - VTM
IH
VTM Maximum On State Voltage
IHHolding Current
MT1
(+) IGT
GATE
(+) MT2
REF
MT1
(-) IGT
GATE
(+) MT2
REF
MT1
(+) IGT
GATE
(-) MT2
REF
MT1
(-) IGT
GATE
(-) MT2
REF
-
MT2 NEGATIVE
(Negative Half Cycle)
MT2 POSITIVE
(Positive Half Cycle)
+
Quadrant III Quadrant IV
Quadrant II Quadrant I
Quadrant Definitions for a Triac
IGT -+ IGT
All polarities are referenced to MT1.
With in-phase signals (using standard AC lines) quadrants I and III are used.
SENSITIVE GATE LOGIC REFERENCE
IC Logic Functions Firing Quadrant
I II III IV
TTL 2N6071A Series 2N6071A Series
HTL 2N6071A Series 2N6071A Series
CMOS (NAND) 2N6071B Series 2N6071B Series
CMOS (Buffer) 2N6071B Series 2N6071B Series
Operational Amplifier 2N6071A Series 2N6071A Series
Zero Voltage Switch 2N6071A Series 2N6071A Series
2N6071A/B Series
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5
IT(AV), AVERAGE ON‐STATE CURRENT (AMP)
140120100806040200-20-40-60
0.3
0.5
0.7
1.0
2.0 2.0
3.0
0.5
0.3
0.7
1.0
120
3.0
-60 -40 -20 0 20 40 60 80 100 140
OFF‐STATE VOLTAGE = 12 Vdc
ALL MODES
OFF‐STATE VOLTAGE = 12 Vdc
ALL MODES
TJ, JUNCTION TEMPERATURE (°C)TJ, JUNCTION TEMPERATURE (°C)
120°
90°
30°
dc
0
2.0
4.0
8.0
6.0
4.03.02.01.0
IT(RMS), RMS ON‐STATE CURRENT (AMP)
3.0 0
0
2.0
4.0
6.0
0 1.0 2.0
8.0
4.0
α = 30°
60°
90°
120°
180°
dc
IT(AV), AVERAGE ON‐STATE CURRENT (AMP)
80
3.0
90
70
100
0 1.0 2.0
110
4.0
60°
120°
dc
α = CONDUCTION ANGLE
a
a
a
α = CONDUCTION ANGLE
a
70
80
3.0
100
0 1.0 2.0
90
α
a
110
120°
180°
dc
90°
α = 30°
a
a
α = CONDUCTION ANGLE
4.0
IT(RMS), RMS ON‐STATE CURRENT (AMP)
180°
α = 30°
90°
α = CONDUCTION ANGLE
60°
60°
T , CASE TEMPERATURE ( C)
C°
T , CASE TEMPERATURE ( C)
C°
P , AVERAGE POWER (WATTS)
(AV)
VGT
P , AVERAGE POWER (WATTS)
(AV)
IGT
α = 180°
Figure 1. Average Current Derating Figure 2. RMS Current Derating
Figure 3. Power Dissipation Figure 4. Power Dissipation
Figure 5. Typical Gate-Trigger Voltage Figure 6. Typical Gate-Trigger Current
, GATE TRIGGER VOLTAGE (NORMALIZED)
, GATE TRIGGER CURRENT (NORMALIZED)
2N6071A/B Series
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6
, TRANSIENT THERMAL IMPEDANCE (
40
7.0
5.0
3.0
2.0
1.0
0.7
0.5
0.3
0.2
0.1
0 1.0 2.0 3.0 4.0 5.0
VTM, ON‐STATE VOLTAGE (VOLTS)
TJ = 110°C
TJ = 25°C
3.0
2.0
1.0
0.7
0.5
0.3
-60 -40 -20 0 20 40 60 80 100 120 140
TJ, JUNCTION TEMPERATURE (°C)
GATE OPEN
APPLIES TO EITHER DIRECTION
34
32
30
28
26
24
22
20
18
16
14
1.0 2.0 3.0 4.0 5.0 7.0 10
NUMBER OF FULL CYCLES
TJ= -40 to +110°C
f = 60 Hz
0.20.1 0.5 1.0 2.0 5.0 10 20 50 100 200 500 1.0 k 2.0 k 5.0 k 10 k
MAXIMUM
TYPICAL
0.1
0.2
0.5
1.0
2.0
3.0
5.0
10
0.3
t, TIME (ms)
IH, HOLDING CURRENT (NORMALIZED)
ITM, ON‐STATE CURRENT (AMP)
PEAK SINE WAVE CURRENT (AMP)
ZθJC(t) °C/W)
30
20
10
Figure 7. Maximum On-State Characteristics
Figure 8. Typical Holding Current
Figure 9. Maximum Allowable Surge Current
Figure 10. Thermal Response
2N6071A/B Series
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7
ORDERING INFORMATION
Device Package Shipping†
2N6071A TO-225
500 Units / Box
2N6071AG TO-225
(Pb-Free)
2N6071AT TO-225 50 Units / Tube
2000 Units / Box
2N6071ATG TO-225
(Pb-Free)
50 Units / Tube
2000 Units / Box
2N6071B TO-225
500 Units / Box
2N6071BG TO-225
(Pb-Free)
2N6071BT TO-225 50 Units / Tube
2000 Units / Box
2N6071BTG TO-225
(Pb-Free)
50 Units / Tube
2000 Units / Box
2N6073A TO-225
500 Units / Box
2N6073AG TO-225
(Pb-Free)
2N6073B TO-225
2N6073BG TO-225
(Pb-Free)
2N6075A TO-225
2N6075AG TO-225
(Pb-Free)
2N6075B TO-225
2N6075BG TO-225
(Pb-Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
2N6071A/B Series
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8
PACKAGE DIMENSIONS
TO-225
CASE 77-09
ISSUE Z NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 077-01 THRU -08 OBSOLETE, NEW STANDARD
077-09.
-B-
-A- M
K
FC
Q
H
V
G
S
D
J
R
U
132
2 PL
M
A
M
0.25 (0.010) B M
M
A
M
0.25 (0.010) B M
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.425 0.435 10.80 11.04
B0.295 0.305 7.50 7.74
C0.095 0.105 2.42 2.66
D0.020 0.026 0.51 0.66
F0.115 0.130 2.93 3.30
G0.094 BSC 2.39 BSC
H0.050 0.095 1.27 2.41
J0.015 0.025 0.39 0.63
K0.575 0.655 14.61 16.63
M5 TYP 5 TYP
Q0.148 0.158 3.76 4.01
R0.045 0.065 1.15 1.65
S0.025 0.035 0.64 0.88
U0.145 0.155 3.69 3.93
V0.040 --- 1.02 ---
__
STYLE 5:
PIN 1. MT 1
2. MT 2
3. GATE
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
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Phone: 81-3-5773-3850
2N6071/D
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